| Commit message (Collapse) | Author | Age | Files | Lines |
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This CL adds support for honeybuns C1, which is the user facing usbc
port that also support ALT-DP mode. This CL adds support for both
gingergread and quiche.
Note that gingerbread is being checked in with a TODO for specifying
the PPC driver for C1. This is necessary to allow gingerbread to still
build while the solution for asymmetric port hardware is finalized.
BUG=b:183289386
BRANCH=None
TEST=Verified port C1 attaches to display adapters, usbpd hubs, and
type-c monitors
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Iafbd5a38917601fc5055857662dd0e893d503948
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699456
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This CL adds config options and board level structs to fully support
USB-PD on port C0 for both gingerbread and quiche.
This includes all the svdm response functions required for support of
DP Alt-mode as a UFP_D. This also includes honeybuns specific version
of usb-pd policy functions.
BUG=b:175660576
BRANCH=None
TEST=Verify that C0 port can establish PD contract, enter ALT-DP mode
and extend display over DP/HDMI connectors.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I11edee85e63381f00114e9fbe012a37fd8174279
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699455
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This CL updates both quiche and gingerbread to P1 hardware level. This
includes an MCU with 256 kB flash, some GPIO pin assignments to
address EXTi conflicts, and removing the I2C2 port.
BUG=b:183288657
BRANCH=None
TEST=make BOARD=quiche and make BOARD=gingerbread
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I6a5d3d365b6c9ed704ced8506fa4a97ca7b668c7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699454
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This CL adds configs/structs required for USB-EP support for both
quiche and gingerbread. This CL also adds usbc support code to RO so
that Rd is being presented on both CC lines in RO.
In addition, there is some clean up for I2C port names and the debug
gpio utility function.
BUG=b:172493899
BRANCH=None
TEST=tested on quiche and verified that the USB-EP was enumerated
RST EP0 3220
RST EP0 3220
RST EP0 3220
RST EP0 3220
SETAD ae
[8.069004 Jumping to image RW]
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I8d65ba55eecc2b82047a8cd433611f639af0c5ed
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699453
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Sam Hurst <shurst@google.com>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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Honeybuns does not have an AP and therefore it needs to verify its own
RW signature in RO. This functionality is enabled with RWSIG config
option and task. This CL adds support to both enable RWSIG and make
the RO and RW images asymmetric.
Note that RO only needs to enable USB-EP support for fwupd support and
support RW signature verification. Therefore, RO is limited to support
these key features.
BUG=b:167462264
BRANCH=None
TEST=verifed on both quiche and gingerbread that will boot into RO and
following RW signature verification, jump to the RW image.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I1cdf0965e06881ebb48205a517d308641e6cdb49
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699452
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This CL adds routines required to support USB-PD messaging to the UCPD
driver. UCPD is performs TCPC type functions, but is not a TCPC. UCPD
does utilize the common TCPCI APIs as entry points called from the
port's PD task. In addition, UCPD has its own task to manage more
easily transmit requests from TCPM layer and GoodCRC messages which
must be intiated in the UCPD driver itself.
BUG=b:167601672
BRANCH=None
TEST=verfied type-c attaches properly on quiche
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I0c02bee4badc479125832a6b5a6fa156e998c201
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2247117
Tested-by: Scott Collyer <scollyer@chromium.org>
Auto-Submit: Scott Collyer <scollyer@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL adds boards specific parts required to enable TCPMv2.0 for
both quiche and gingerbread. TCPMv2 configs are included, though, only
type-c support is being selected.
The reason for this intermediate point is an attempt to have more
manageable amounts of changes for CL reviews.
BUG=b:167601672
BRANCH=None
TEST=verfied type-c attaches properly on quiche
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I2a4c3bf4089fb3e167d06921b177d8c4e61a021f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2215424
Tested-by: Scott Collyer <scollyer@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Auto-Submit: Scott Collyer <scollyer@chromium.org>
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This CL adds config options and tables required to pull in i2c support
for honeybuns. In addition, config options for CBI were added to
facilitate i2c testing.
BUG=b:148493929
BRANCH=None
TEST=ran i2cscan on quiche
> i2cscan
Scanning 0 usbc.................
0x18.
0x19.
0x1a.
0x1b.
0x1c.
0x1d.
0x1e.
0x1f.
0x20.
0x21.
0x22.
0x23.
0x24.
0x25.
0x26.
0x27...........................
0x42..............................
0x60.......................
Scanning 1 usb_mst.
0x08.
0x09.
0x0a.
0x0b.
0x0c.
0x0d.
0x0e.
0x0f.
0x10.
0x11.
0x12.
0x13.
0x14.
0x15.
0x16.
0x17..........................................
0x41................................
0x61.........
0x6a.............
Scanning 2 eeprom.........................................
0x30................................
0x50.......................................
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Ib1b8b795a2a07a5b1cbe167b17c3f70a8d9703b2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213943
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL replaces the placeholder chip family/variant with the correct
version for the STM32G4.
BUG=b:168616400
BRANCH=None
TEST=make buidall
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Id6e70d8048f7454302178dd8c6b47ba587b75a95
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2419495
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL adds a function in baseboard that will sequence through a list
of gpio controlled power rails and chip resets. The table includes a
delay prior to executing the next entry. The table is intended to be
in board.c as the rails and delays can very much be board specific.
BUG=b:167430750
BRANCH=None
TEST=Verified that power rails come up and status LED is on.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I830dee9eb28d4648d274d8cbc49b6972cd70dba5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213837
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This CL contains a skelton image. It is a derivative of honeybuns.
BUG=b:154667178
BRANCH=none
TEST=make BOARD=Gingerbread and verify that image builds successfully
Signed-off-by: Udaya Kiran Ammu <udaykiran@google.com>
Change-Id: I63a0e07956ed4cf430c09b94c9cd221fae3c4dd4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2161461
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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