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* galtic/galtic360: Modify keyboard config.Michael5 Chen12021-09-251-1/+1
| | | | | | | | | | | | | | | | Base on keyboard printing, modify keyboard function key define. BUG=b:175857578 BRANCH=dedede TEST=manual Check keyboard function key behavior. Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: Ie63a338a8f08d6d1541f53bdfc34da83753823af Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3162474 Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Henry Sun <henrysun@google.com>
* galtic360/galith360: Implement gyro sensor function.Michael5 Chen12021-09-143-28/+152
| | | | | | | | | | | | | | | | Base gyro sensor: ICM40608 and BMI160 Lid accel sensor: KX022 and BMA253 BUG=b:198254720 BRANCH=dedede TEST=manual Run command "watch ectool motionsense lid_angle" Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: I640a76d3164914eda8439b6dd4af53f6f09fd7f5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3159425 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* lid_angle: Create a common callback for lid angle changesWai-Hong Tam2021-08-051-3/+1
| | | | | | | | | | | | | | | | | | | | | | Each board defines its own callback lid_angle_peripheral_enable(). The implementation is very similar. Create a common implementation and reduce the duplicated code. This CL removes the board callbacks which are identifical to the common callback. If it is slightly different, keep it and add the __override tag. The check of TEST_BUILD is unnecessary as the board callback is not linked in the test build. BRANCH=None BUG=b:194922043 TEST=Build all the images. Change-Id: I73d381730f35b80eff69399cdfc5fb54f839aee0 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069175 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* dedede: Make scope of SSFC definition per boardParth Malkan2021-07-193-1/+97
| | | | | | | | | | | | | | | | | | | | | | SSFC bit definition started diverging between coreboot and EC. To avoid conflicts move the definitions of SSFC bits within EC to per board instead of at a baseboard level. Base sensor and Lid sensor components are common across all boards Base Sensor - bits 0-2 Lid Sensor - bits 3-5 In addition, Sasuke uses bits 6-8 for usb superspeed mux Cret board uses bits 9-11 in coreboot for audio codec BRANCH=firmware-dedede-13606.B BUG=b:187694527 TEST=make buildall Signed-off-by: Parth Malkan <parthmalkan@google.com> Change-Id: Ib0f732e5d41668135ff180c545ff4bb6a1cb1427 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3021932 Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Marco Chen <marcochen@chromium.org>
* dedede: Enable CONFIG_ASSERT_CCD_MODE_ON_DTS_CONNECTRob Barnes2021-07-021-1/+1
| | | | | | | | | | | | | | | | | | Enable CONFIG_ASSERT_CCD_MODE_ON_DTS_CONNECT on all dedede boards. This will assert GPIO_CCD_MODE_ODL when a debug device is connected to a CCD port. GPIO_CCD_MODE_ODL must be configured as an open drain so EC and Cr50 don't drive fight. BUG=b:190189242 TEST=Build dedede BRANCH=None Change-Id: I2d71312967f2d4a693ac9753279f49478e8c092c Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2976759 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Diana Z <dzigterman@chromium.org>
* keeby/dedede: Gate temp sensor access by GPIOAseda Aboagye2021-06-291-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | On dedede and keeby boards, the thermistors are powered by the EC's GPIO_EN_PP3300_A pin. If the thermistors are read before they are powered then the EC may force a thermal shutdown due to the bad reading. This commit simply defines CONFIG_TEMP_SENSOR_POWER_GPIO along with a CONFIG_TEMP_SENSOR_FIRST_READ_DELAY_MS to ensure we don't get any false positive thermal shutdowns. BUG=b:192053176 BRANCH=dedede TEST=Build and flash lalala. Unplug AC charger from DUT, press refresh+power button to reset DUT, verify that DUT boots up automatically. TEST=Repeat above test with madoo. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I2a49e2f896c4120a8f01f440ea22c9b3763c6589 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2988364 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* galtic: Remove config for firmware qualJacky Wang2021-04-261-3/+0
| | | | | | | | | | | | | | | 1.Remove CONFIG_SYSTEM_UNLOCKED BUG=b:183560885 BRANCH=firmware-dedede-13606.B TEST=BOARD=galtic Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: Idf644f7fe13f449f931af33fc4d7fb5ac663a4c1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2850295 Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* LED On/Off: Make battery LED optionalDiana Z2021-04-221-4/+5
| | | | | | | | | | | | | | | Currently, all boards using the LED On/Off module have battery LEDs. However, if we'd like to expand support to Chromeboxes then the battery LED must become optional. BRANCH=None BUG=b:185508707 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ieae098829ebe6c8b103f23d5abdbf70e7bcbdf2d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2832692 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* galtic: Update the EC battery config setting.Jacky Wang2021-04-082-0/+30
| | | | | | | | | | | | | | | | | Config the EC battery setting depend on battery spec. BUG=b:175350831 BRANCH=firmware-dedede-13606.B TEST=BOARD=galtic 1. Check battery found on EC log. 2. Check battery cutoff function on EC console. 3. Check battery charging FET status when battery full. Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: Ifcfcf0f14f89d4ce2fea1f1abd7db89f0d26fbb0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2809778 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* dedede/raa489000: Enable ASGATE when sourcingAseda Aboagye2021-04-011-0/+5
| | | | | | | | | | | | | | | | | | | | With the previous change to disable the ASGATE from the charger side, this actually ended up breaking sourcing VBUS. This commit enables the ASGATE when we are attempting to source VBUS. BUG=b:183220414 BRANCH=dedede TEST=Build and flash madoo, plug in a Type-C sink, verify that VBUS is sourced. TEST=Verify that DUT can PR_Swap with peripheral. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I1938f2b827e57a04ef72e2ad35ad6ff29ce18712 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2795073 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org>
* Reland "dedede/raa489000: Disable ASGATE from READY state"Aseda Aboagye2021-04-011-7/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a reland of f7fbc629f0655229cc7ffdadfb18c9e13118e3d2 Original change's description: > dedede/raa489000: Disable ASGATE from READY state > > On the boards which use the RAA489000, we keep the ADC enabled while > giving VBUS control to the charger side. This can cause a situation > where VBUS is not quite zero volts when a charger is removed. This > commit uses the charger side registers to control the ASGATE when > selecting our active charge port. This is done in addition to the > existing implementation which uses the TCPCI registers to control > ASGATE. When we place the parts into low power mode, we move the VBUS > control from the TCPC side of the IC to the charger side. It should > be safe to issue both commands as if the TCPC side has control, the IC > ignores the setting from the charger side registers. > > BUG=b:183220414 > BRANCH=dedede > TEST=Build and flash madoo, plug in charger to port, unplug, verify > that VBUS falls to < 200mV and decays from there. > > Signed-off-by: Aseda Aboagye <aaboagye@google.com> > Change-Id: I8e8c8cc32575d18c9d3d1210ed3c5cf69ad5ca4b > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2793058 > Tested-by: Aseda Aboagye <aaboagye@chromium.org> > Reviewed-by: Diana Z <dzigterman@chromium.org> > Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Bug: b:183220414 Change-Id: I36db53f3e13ba848308cd7e0c94a1b5a3551c600 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2797549 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org>
* Add a common header for board_is_sourcing_vbus()Simon Glass2021-03-311-2/+0
| | | | | | | | | | | | | | | | This function prototype is defined in lots of files, none of which is visible to Zephyr. Add a prototype in one place and remove the others. BUG=b:183296099 BRANCH=none TEST=make buildall Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ia324327a69b117483ab9ee5c85eba93c0fb5ad9c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2789799 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Revert "dedede/raa489000: Disable ASGATE from READY state"Aseda Aboagye2021-03-311-12/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit f7fbc629f0655229cc7ffdadfb18c9e13118e3d2. Reason for revert: Breaks sourcing of VBUS. Original change's description: > dedede/raa489000: Disable ASGATE from READY state > > On the boards which use the RAA489000, we keep the ADC enabled while > giving VBUS control to the charger side. This can cause a situation > where VBUS is not quite zero volts when a charger is removed. This > commit uses the charger side registers to control the ASGATE when > selecting our active charge port. This is done in addition to the > existing implementation which uses the TCPCI registers to control > ASGATE. When we place the parts into low power mode, we move the VBUS > control from the TCPC side of the IC to the charger side. It should > be safe to issue both commands as if the TCPC side has control, the IC > ignores the setting from the charger side registers. > > BUG=b:183220414 > BRANCH=dedede > TEST=Build and flash madoo, plug in charger to port, unplug, verify > that VBUS falls to < 200mV and decays from there. > > Signed-off-by: Aseda Aboagye <aaboagye@google.com> > Change-Id: I8e8c8cc32575d18c9d3d1210ed3c5cf69ad5ca4b > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2793058 > Tested-by: Aseda Aboagye <aaboagye@chromium.org> > Reviewed-by: Diana Z <dzigterman@chromium.org> > Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Bug: b:183220414 Change-Id: Ibf6c161adca9981a065e969b6c3b73dd408ef1ba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2796411 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
* dedede/raa489000: Disable ASGATE from READY stateAseda Aboagye2021-03-301-7/+12
| | | | | | | | | | | | | | | | | | | | | | | | | On the boards which use the RAA489000, we keep the ADC enabled while giving VBUS control to the charger side. This can cause a situation where VBUS is not quite zero volts when a charger is removed. This commit uses the charger side registers to control the ASGATE when selecting our active charge port. This is done in addition to the existing implementation which uses the TCPCI registers to control ASGATE. When we place the parts into low power mode, we move the VBUS control from the TCPC side of the IC to the charger side. It should be safe to issue both commands as if the TCPC side has control, the IC ignores the setting from the charger side registers. BUG=b:183220414 BRANCH=dedede TEST=Build and flash madoo, plug in charger to port, unplug, verify that VBUS falls to < 200mV and decays from there. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I8e8c8cc32575d18c9d3d1210ed3c5cf69ad5ca4b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2793058 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* genvif: Use VIF overrides by defaultAbe Levkoy2021-03-301-0/+3
| | | | | | | | | | | | | | Use board-specific override files when generating VIFs for boards. BUG=b:172276715 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I197365018ceb8197c22d631cebf4cbce1c0119f7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785506 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* galtic: Add GPIO_EC_ENTERING_RW2Michael5 Chen12021-03-262-1/+16
| | | | | | | | | | | | | | | | | | | | This commit add a new GPIO, GPIO_EC_ENTERING_RW2 which does the same thing as GPIO_EC_ENTERING_RW. However, it's on a pin that's more will behaved around init time. This commit also overrides the board_pulse_ec_entering_rw() function such that both lines can be pulsed. BUG=b:181740591 BRANCH=dedede TEST=make board=galtic Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: Ibc65bafed0374e6356311b0e4c2133ea3be7d4f6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2786885 Reviewed-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* dedede/raa489000: Set LPM exit debounce to 100msAseda Aboagye2021-03-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | For some reason, when the RAA489000 TCPC exits low power mode, CC status doesn't appear changed when using a servo v4. This causes us to think no connection is present and immediately but the IC back into low power mode. If we wait 100ms before querying the CC status reg, it seems that then the right values are reported. This commit adds a workaround by setting the LPM exit debounce time to 100ms. BUG=b:182429150,b:181308089 BRANCH=dedede TEST=Build and flash a board, verify that servo v4 with an external charger is detected. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: Ic0c2406fa20d0dad82adee865cd87c46d7126b9f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2752250 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* Galtic: Correct active charge port selectionDiana Z2021-03-051-1/+1
| | | | | | | | | | | | | | | | | | During active charge port selection, any port which is not the new active port should have sinking disabled. The current code could leave sinking enabled on C0 when a better charger is inserted into C1, and also shuts off C1 when it is selected with no battery. BRANCH=None BUG=b:176214112 TEST=on galtic, sysjump with no battery and a charger in C1. Observe no brown outs Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ic07a9c5ab35a9edd29717beb7acc9e1c51159b04 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2738055 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* galtic: Enable AP throttlingJacky Wang2021-03-041-0/+1
| | | | | | | | | | | | | | | | | | Add the CONFIG_THROTTLE_AP define to compile common code for throttling the CPU based on the temp sensors. BUG=b:177628854 BRANCH=firmware-dedede-13606.B TEST=make BOARD=galtic 1. Use "watch ectool temps all" to check temperature. 2. Verified pass with EE team. Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: I1e79a38f16afeb54791260e6ad2d486164ebadaf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2734064 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* galtic: Fine tune tusb544 EQ settingJacky Wang2021-03-041-0/+103
| | | | | | | | | | | | | | | | Modify strength value setting of tusb544. BUG=b:179224587 BRANCH=firmware-dedede-13606.B TEST=make BOARD=galtic 1. Verified pass by EE. 2. Use "ectool i2cread" to check setting value. Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: I06849c9d94584e484a58cc5e614ce7d4fb60fce6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2726784 Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* galtic: Update EC thermal tableJacky Wang2021-02-231-0/+34
| | | | | | | | | | | | | | Update EC thermal table for throttle and shutdown point. BUG=b:177628854 BRANCH=firmware-dedede-13606.B TEST=make BOARD=galtic 1. Verified pass by thermal team. Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: Icaaad93cdf933f5351cda7192e4b14c90f326d35 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2710129 Reviewed-by: Diana Z <dzigterman@chromium.org>
* magolor and friends: Adjust OCPC PID constantsAseda Aboagye2021-02-171-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Thus far, it seems that boards that use the same OCPC PID constants behave similarly. Therefore, this commit updates the constants that were most recently used on madoo to the other OCPC boards that use the same charger IC such that the behaviour meets the criteria at go/ocpc-testing. - Converges around the target current. - Average steady state error is less than 4% of target. - Current is reduced to target level in less than 5s when load is suddenly released. BUG=None BRANCH=dedede TEST=Build and flash magolor. Verify that battery can charge to 100%. Verify that it meets or exceeds the constraints above. TEST=Verify that DUT can come out of battery cutoff from sub board. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I206854c097c307b941a64547f9b74c8259a7d499 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2691585 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* Dedede: Add RAA489000 output current settingDiana Z2021-01-291-6/+2
| | | | | | | | | | | | | | | | | Boards using the RAA489000 TCPC should set output current on their ports through the TCPC driver. This commit adds a board function to do this for every dedede board currently using the RAA489000. BRANCH=None BUG=b:178064507 TEST=on madoo, verify OCP occurs if more than 1.5A is drawn on a non-PD port, verify register is set to allow 3.0A for port partners requesting that current in their sink capabilities Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ieb7df916c122d5de1adaa7371a58ad5cf2954ee4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2658377 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Galtic: Add TCPC dump commandDiana Z2021-01-291-0/+1
| | | | | | | | | | | | | Galtic has plenty of flash space, so add TCPC dump command. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: If570484a5e043fa372c553c656ee97469000a6bc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2653795 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Madoo: Fix main board charger can't wake from hibernateKo_Ko2021-01-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | In madoo's design, there is a protection IC between USB connector and TCPC. When EC is hibernate, the CC lines will be disconnected, which cause the result that TCPC can't detect AC power and Chromebook won't wake the system. Enalbing ADC for all modes by setting 0x4C bit 0 to 1 (to be more precise is that we don't clear bit 0 during hibernation) can prevent issue mention above. BUG=b:174971576 BRANCH=dedede TEST=flash code and make sure ac in can wake system from hibernation Signed-off-by: Ko_Ko <Ko_Ko@compal.corp-partner.google.com> Change-Id: I2a83c69e34cbc4bfdff90d760f32817a7924dc26 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2626803 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Ko Ko <ko_ko@compal.corp-partner.google.com> Tested-by: Ko Ko <ko_ko@compal.corp-partner.google.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Galtic: Increase stack sizesDiana Z2021-01-151-4/+4
| | | | | | | | | | | | | | | | The keyscan task may overflow during the hibernate key sequence, so increase its stack size. Additionally, align stack sizes with the larger ones chosen previously for drawcia. BRANCH=dedede BUG=b:177479440 TEST=make -j buildall, galtic can successfully enter hibernate with alt+h+volume up Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ic25eebf4c2a29542a642e73dcab1f69c049fdae5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628895 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* galtic: Config the EC GPIO settingJacky Wang2021-01-153-33/+15
| | | | | | | | | | | | | | Base on schematics, config the EC GPIO related setting. BUG=b:177181431 BRANCH=firmware-dedede-13606.B TEST=BOARD=galtic Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: Iaa294965a4e6e8d34b816fa96c69b974b7368fbe Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2620727 Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* galtic: Config the thermal sensor settingJacky Wang2021-01-103-4/+16
| | | | | | | | | | | | | | | | | Update thermal sensor configuration setting. BUG=b:176525921 BRANCH=firmware-dedede-13606.B TEST=BOARD=galtic Use "ectool temps all" to check thermal sensor temperature. Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: Ide95e7be7d21bab979a53aa0d2b06f7a8b88cf7a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2612311 Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Tested-by: Henry Sun <henrysun@google.com> Commit-Queue: Henry Sun <henrysun@google.com>
* Move tcpic.h header into include/driverSimon Glass2021-01-071-1/+1
| | | | | | | | | | | | | | | | | | This header cannot currently be accessed by Zephyr since it is in a driver directory, not an include directory. This header has quite a bit of public stuff in it, so it seems reasonable to consider everything public. Move the header file and update all users. BUG=b:175434113 BRANCH=none TEST=make buildall -j30 build volteer on zephyr Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ibba37f47a06783fafb5095f853f2a68d92b6df87 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2607745
* TCPMv2: Update source-out configsDiana Z2020-12-241-10/+0
| | | | | | | | | | | | | | | | | | | | Now that the DPM will be handling source-out decisions for TCPMv2, remove references to its old configuration options from TCPMv2 boards in order to avoid any confusion as to what code is running now. Also remove the charge manager notifications of sink attach/detach since the policy is being centralized into the DPM. Note that the previous configuration options only ever allocated one 3.0 A port, and so the default number of 3.0 A ports has been set to 1. BRANCH=None BUG=b:168862110,b:141690755 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ie452e3da32b04226503539daa67b6b9f4a58aa58 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597431 Reviewed-by: Keith Short <keithshort@chromium.org>
* galtic: Implement LED functionJacky Wang2020-12-234-86/+83
| | | | | | | | | | | | | | | | | | | | Update LED behavior by Marketing spec. BUG=b:175743432 BRANCH=firmware-dedede-13606.B TEST=BOARD=galtic Verify LED behavior with below items 1. DC mode : S0/S3/S5 2. AC mode : S0/S3/S5 3. battery low : S0/S3/S5 4. Battery Error : S0/S3/S5 Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: I95fdd4726003896918b41dc047d3a92bdf05b0a5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2596564 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Henry Sun <henrysun@google.com> Tested-by: Henry Sun <henrysun@google.com>
* galtic: Implement keyboard function.Michael5 Chen2020-12-222-0/+61
| | | | | | | | | | | | | | The galtic/galnat keyboard without keyboard numpad. The galith keyboard with keyboard numpad. BUG=b:175857578 BRANCH=dedede TEST=make BOARD=galtic Signed-off-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: I6c143105e67fab207ef50be87ea06caa22e59107 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597128 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* task_set_event: remove the wait argumentDawid Niedzwiecki2020-12-141-2/+2
| | | | | | | | | | | | | | | | | | | | There is an option in the task_set_event function which force the calling task to wait for an event. However, the option is never used thus remove it. This also will help in the Zephyr migration process. BUG=b:172360521 BRANCH=none TEST=make buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: Ic152fd3d6862d487bcc0024c48d136556c0b81bc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2521599 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* galtic: Config the EC battery setting.Jacky Wang2020-12-112-287/+14
| | | | | | | | | | | | | | | | | | | | Config the EC battery setting depend on battery spec. BUG=b:175350831 BRANCH=firmware-dedede-13606.B TEST=BOARD=galtic 1. Check battery found on EC log. 2. Check battery cutoff function on EC console. 3. Check battery charging FET status when battery full. Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: I691a4726791522e6dd548ef482665f231eb2d656 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2584549 Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Galtic: Modify Charger and TCPC configurations.Jacky Wang2020-12-105-139/+121
| | | | | | | | | | | | | | Base on schematics, update charger IC and TCPC setting. BUG=b:173343043 BRANCH=none TEST=make BOARD=galtic Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: Ie47e296d7c653805acc2c14f94c26376a99a718d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2543570 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* galtic: Initial EC imageMichael5 Chen2020-11-168-0/+1422
Create the initial EC image for the galtic variant by copying the waddledee reference board EC files into a new directory named for the variant. (Auto-Generated by create_initial_ec_image.sh version 1.2.0). BUG=b:172781886 BRANCH=none TEST=make BOARD=galtic Signed-off-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: Iad25f89a85e76132fa3175be6c963a40f2c0399e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2525256 Reviewed-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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