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* ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ishJack Rosenthal2021-11-051-834/+0
| | | | | | | | | | | | | | | | | | | | | | In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* USB MUX: Update mux HPD update interface to use mux_state_tDiana Z2021-09-161-1/+2
| | | | | | | | | | | | | | | | | Since the drivers are now taking a mux_state_t set of flags to update, go ahead and unify the usb_mux API this way as well. It makes the parameters more apparent than the 1/0 inputs, and aligns the stack to use the same parameters. BRANCH=None BUG=b:172222942 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ie943dbdf03818d8497c0e328adf2b9794585d96e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095438 Commit-Queue: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* adc: Remove adc_chip.h where adc.h is usedCaveh Jalali2021-08-271-1/+0
| | | | | | | | | | | | | | This removes the use of adc_chip.h where adc.h is also used. In this case, adc_chip.h is redundant. BRANCH=none BUG=b:181271666 TEST=buildall passes Change-Id: Id7baf9aef949447a4d47934242f9bae97c971262 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3120317 Reviewed-by: Keith Short <keithshort@chromium.org>
* usb_mux: retimer: mux as chained mux and retimerDenis Brockus2020-02-281-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes retimers appear as generic muxes. By allowing a chain of muxes they can be stacked up to the new configurations that zork requires and will continue to work as they did before on configurations that only have a single mux. The code used to have two different arrays, 1) muxes and 2) retimers. On one of the zork configurations the processor MUX stopped being the primary mux and the retimer took its place. In a different configuration of that same platform it left the primary and secondary alone but the mux_set FLIP operation had to be ignored. Since the same interfaces needed to be available for both it stopped making sense to have two different structures and two different methods of handling them. This consolodates the two into one. The platforms that do not have retimers, this change will not make any difference. For platforms like zork, it will remove the retimers and make them chained muxes. So testing on trembyle makes sense to verify, BUG=b:147593660 BRANCH=none TEST=verify USB still works on trembyle Change-Id: I286cf1e302f9bd3dd7e81098ec08514a2a009fe3 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2066794 Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Temp sensor: Remove action_delay_sec fieldDiana Z2020-02-141-2/+2
| | | | | | | | | | | | | | The action_delay_sec field hasn't actually been referenced by any code since 2013. Removing the corresponding struct field. BUG=None BRANCH=None TEST=builds Change-Id: Ia7334c26b85d0161ff61bb51fbdda61bb921595a Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2054945 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Fizz: add fan table for excelsiorJeff Chase2020-02-121-0/+16
| | | | | | | | | | | | | BUG=b:149103675 BRANCH=none TEST=build, install, set OEM to 10, check fan speed, set min fan speed Change-Id: I032c48c5d7696a482b0cf4083b88dcd4f341f434 Signed-off-by: Jeff Chase <jnchase@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2047931 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com> Reviewed-by: David Huang <David.Huang@quantatw.com>
* battery: stub out battery_is_present if disabledPeter Marheine2020-01-081-6/+0
| | | | | | | | | | | | | | | | | | | | | | | There are a number of potential callers that care if there is a battery, but for boards that don't support batteries (chromeboxes) we can let them skip implementing this stub. Tests default to battery present, but they can provide their own per-test implementation if desired. Some PD battery presence checks have been disabled when battery support is disabled; these are irrelevant when there is no battery, and they cause linking failures because they depend on both the charge manager and battery presence. BUG=b:146504182 BRANCH=none TEST=buildall Change-Id: Ifad6a9e356c8ac2146b09bc83b359a7c55adc1a7 Signed-off-by: Peter Marheine <pmarheine@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1980099 Reviewed-by: Scott Collyer <scollyer@chromium.org>
* Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNTKarthikeyan Ramasubramanian2019-11-011-3/+3
| | | | | | | | | | | | | | | | | Certain SKUs of certain boards have lesser number of USB PD ports than defined by CONFIG_USB_PD_PORT_COUNT. Hence rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* volteer: Add RTC resetKeith Short2019-09-291-8/+0
| | | | | | | | | | | | | | | Add support for the RTC reset on Volteer. This change also deduplicates the board_rtc_reset() function which was identical on boards that enabled CONFIG_BOARD_HAS_RTC_RESET. BUG=b:141321096 BRANCH=none TEST=make buildall Change-Id: Ifc6959f8271400174fd4999a3c70800b03b9c2d0 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1816869 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-201-4/+4
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-191-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* cleanup: refactor CPRINTF("[%T ...]\n") to CPRINTSJack Rosenthal2019-07-171-1/+1
| | | | | | | | | | | | | | | | Looking at where the non-standard %T printf modifier is used in EC codebase, the majority is cases where CPRINTS could have been used instead of CPRINTF. This is a somewhat-mechanical refactor of these cases, which will make implementing a standard printf easier. BUG=chromium:984041 BRANCH=none TEST=buildall Change-Id: I75ea0be261bfbfa50fb850a0a37fe2ca6ab67cb9 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1703128 Reviewed-by: Evan Green <evgreen@chromium.org>
* intel_x86/power: Consolidate chipset specific power signals arrayVijay Hiremath2019-06-131-16/+0
| | | | | | | | | | | | | | | Currently chipset specific power signals are defined at board/baseboard level. These power signals are moved to chipset specific file to minimize the redundant power signals array defined for each board/baseboard. BUG=b:134079574 BRANCH=none TEST=make buildall -j Change-Id: I351904f7cd2e0f27844c0711beb118d390219581 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636837 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* TCPC: Make tcpc_config handle other bus typesDaisuke Nojiri2019-06-101-2/+8
| | | | | | | | | | | | | | | | | | | | | Currently, tcpc_config assumes TCPCs are on I2C bus. ITE's EC has an embedded TCPC. This patch adds bus_type field to struct tcpc_config_t so that a TCPC location on other type of bus can be specified. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=buildall Change-Id: Ieac733011700b351e6323f46070dcf46d9e1154b Reviewed-on: https://chromium-review.googlesource.com/1640305 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* tcpm: Refactor tcpc_config to include a flags fieldScott Collyer2019-04-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | tcpc_config contained a field for both the alert polarity and open drain/push pull configuration. There is also a possible difference in TCPC reset polarity. Instead of adding yet another field to describe this configuration, it would be better to convert alert polairty, open drain and reset polarity into a single flags field. This CL modifies the tcpc_config struct to use a single flags field and adds defines for what existing flag options can be. BUG=b:130194031 BRANCH=none TEST=make -j buildall Change-Id: Ifb7e7604edb7021fb2d36ee279049eb52fefc99e Signed-off-by: Scott Collyer <scollyer@google.com> Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1551581 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* Fizz: Apply VR1 fix for all variantsDaisuke Nojiri2019-03-301-10/+8
| | | | | | | | | | | | | | | | | | | CL:1529983 was applied to only Teemo. This patch applies the same fix to the rest. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/128960577 BRANCH=firmware-fizz-10139.B TEST=make buildall -j Change-Id: I675327aa5682ab94ce6d41d82d006f3cdf749e54 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1535173 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1544251 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
* Fizz: Teemo PMIC TPS650830 VR1 setting for hang up issueSue Chen2019-03-301-0/+11
| | | | | | | | | | | | | | | | | | | | | Set PMIC register V100ACNT (0x37) to 0x1B [1:0] : 11b Forced PWM Operation. [5:4] : 01b Output Voltage Selet Vnom (1V) To improve +V1P00A ripple around 18mV. BUG=b:128960577 BRANCH=firmware-fizz-10139.B TEST=make buildall -j Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I1e620a6c2eebcf2dec8c66989f1469072621ba92 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1529983 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 4d510cbb5c27314b11bb92c4e9af361501605ad7) Reviewed-on: https://chromium-review.googlesource.com/1529982 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-261-3/+3
| | | | | | | | | | | | | | | | | Mechanical replacement of bit operation where operand is a constant. More bit operation exist, but prone to errors. Reveal a bug in npcx: chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow] BUG=None BRANCH=None TEST=None Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common: replace 1 << digits, with BIT(digits)Gwendal Grignou2019-03-261-1/+1
| | | | | | | | | | | | | | | | Requested for linux integration, use BIT instead of 1 << First step replace bit operation with operand containing only digits. Fix an error in motion_lid try to set bit 31 of a signed integer. BUG=None BRANCH=None TEST=compile Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518659 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Fizz: Add Jax supportDaisuke Nojiri2018-11-191-19/+25
| | | | | | | | | | | | | | | | | | | If OEM_ID is equal to 8 (Jax), the EC works as follows: - Set barrel jack adapter spec to (19V, 3.42A). - Set fan_count to zero Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:116588924 BRANCH=none TEST=Boot Fizz with OEM=8. Change-Id: Id6489b65a0bb71cd56d4fcf5e2fdbacb630aa99a Reviewed-on: https://chromium-review.googlesource.com/1308258 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* usb-c: use higher priority task for interruptsJett Rink2018-11-141-7/+1
| | | | | | | | | | | | | | | | | This should be the last step to make all boards on ToT follow go/usb-pd-slow-response-time. Theses boards all have the higher priority tasks, but they aren't being used since the tcpc interrupt wasn't scheduling calls on it. BRANCH=none BUG=b:112088135 TEST=builds Change-Id: I2c39e661e804f88edd5b34636b93e6e63a5af57f Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1283452 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Fizz: Remove remote temp sensor 2Daisuke Nojiri2018-09-201-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fizz has been shipped with TMP431, which has only one remote sensor. This patch removes the one which doesn't exist on the boards. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium:880705 BRANCH=none TEST=Verify local and remote sensor report expected temperatures. Verify the fan spins as expected. > temps TMP431_Internal : 304 K = 31 C 37% TMP431_Sensor_1 : 301 K = 28 C $ ectool temps all 0: 304 K 1: 301 K Change-Id: I2346444f1331faaf32b407a18ba96302b7a166e6 Reviewed-on: https://chromium-review.googlesource.com/1234735 Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit d8de510aa7bdfb7c43621c7d48b7ca3ab372e3c7) Reviewed-on: https://chromium-review.googlesource.com/1234746 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* chgmgr: Allow charge_manager_update_charge to accept NULLDaisuke Nojiri2018-09-201-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Currently, charge_manager_update_charge does not handle NULL pointer for struct charge_port_info any differently. It's not sanity-checked either (thus memory access violation can occur). This patch will make charge_manager_update_charge accept NULL pointer and set available current and voltage to zero. This also helps callers' intentions be clear because callers can explicitly specify NULL (instead of passing a pointer to chg = {0}, which is initialized somewhere else). Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=buildall Change-Id: I518662ab6a3a07f93da5d34cf62a6f856884f67d Reviewed-on: https://chromium-review.googlesource.com/1226125 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* ss-mux: remove unused port_addr initializationv2.0.0Jett Rink2018-09-171-1/+0
| | | | | | | | | | | | | | | | | | | We do not need to set the port_addr variable most places because the SS-MUX is also the TCPC and the tcpc_config_t information is used instead. Remove unused variable setting to avoid confusion. BRANCH=none BUG=none TEST=buildall. phaser USB-C communication (and muxs) still work which is a nominal case for all of these changes. Change-Id: I72ee5da251956eb133091974e8dce5ac7f8787c6 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1200064 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Edward Hill <ecgh@chromium.org>
* ss-mux: update semantics for TCPC/MUX only used as MUXJett Rink2018-09-051-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | This converts the compile time option of CONFIG_USB_PD_TCPM_TCPCI_MUX_ONLY into a runtime option to better support draggon egg designs and reduce CONFIG complexity in general. Introduce new mux_read/write to read from tcpc_config_t or mux driver depending on new flag setting. Audited all mux drivers for any use of tcpc_read/write and updated to mux_read/write. BRANCH=none BUG=b:110937880 TEST=On Bip with CL stack: Verified by connecting DP monitor at boot; Verified plug / unplug of DP cable works; Change-Id: I968893b886ff0ccc4074beae5ec42973814ae77c Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1200062 Commit-Ready: Gaggery Tsai <gaggery.tsai@intel.corp-partner.google.com> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* espi: Rename CONFIG_HOSTCMD_ESPI_VW_SIGNALS to ↵Furquan Shaikh2018-07-271-1/+1
| | | | | | | | | | | | | | | | | | | | | CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS This change renames CONFIG_HOSTCMD_ESPI_VW_SIGNALS to CONFIG_HOSTCMD_ESPI_VW_SIGNALS in order to make it clear that this config option indicates that chipset sleep signals (SLP_S3 and SLP_S4) are tranmitted over virtual wires instead of physical lines with eSPI. BUG=b:111859300 BRANCH=None TEST=make -j buildall Change-Id: Iab4423abc9102164d4f43296a279c24355445341 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1151048 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Fizz: Add Wukong for BJ configurationDaisuke Nojiri2018-06-141-4/+6
| | | | | | | | | | | | | | | | | | Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:71524814 BRANCH=none TEST=None Change-Id: I70deadb6f8c01c36d13f186e95244dc7a317fcbb Reviewed-on: https://chromium-review.googlesource.com/1090326 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 77997e8422b1ef5d511019a8a1e38fa743eab082) Reviewed-on: https://chromium-review.googlesource.com/1098716 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Fizz: Add Bleemo for BJ configurationDaisuke Nojiri2018-06-131-0/+1
| | | | | | | | | | | | | | | | | | | Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:80482240 BRANCH=none TEST=None Change-Id: I50187f58346fe4e6fa88d6a1e07e1dcf72214f07 Reviewed-on: https://chromium-review.googlesource.com/1089329 Reviewed-by: Daniel Johansson <dajo@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: Daniel Johansson <dajo@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit eb92965cce47fe0acd95440a6cefaf07666bf98d) Reviewed-on: https://chromium-review.googlesource.com/1093458 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* Fizz: Add fan table for BleemoDaisuke Nojiri2018-06-121-0/+1
| | | | | | | | | | | | | | | | | | Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:80482240 BRANCH=none TEST=Verify fan speed follow temperature change on Teemo. Change-Id: Ie8ae7febc1a1c1753a4ce26b6c8ff119e277852b Reviewed-on: https://chromium-review.googlesource.com/1083934 Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> (cherry picked from commit 72dad0df6815d476360e085104af61bdd9dec449) Reviewed-on: https://chromium-review.googlesource.com/1098176 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Fizz: Move BJ adapter spec table to ECDaisuke Nojiri2018-06-081-0/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the BIOS carries the table which maps (OEM,SKU) to barrel jack adapter spec. This patch moves this table to the EC. Then, the EC will independently manage the max voltage and current for BJ. This would remove the dependency on AP-EC communication, thus improves the stability This patch also corrects the mapping between SKUs and BJ wattages. SKU BJ(W) * KBL-R i7 8550U 4 90 * KBL-R i5 8250U 5 90 * KBL-R i3 8130U 6 90 * KBL-U i7 7600 3 65 * KBL-U i5 7500 2 65 * KBL-U i3 7100 1 65 * KBL-U Celeron 3965 7 65 * KBL-U Celeron 3865 0 65 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:109762580 CQ-DEPEND=CL:1089370 BRANCH=none TEST=Verify BJ adapter is set expectedly on Teemo. Change-Id: I70c8987670e7495a32fdcbc572779fdc9362e22f Reviewed-on: https://chromium-review.googlesource.com/1089328 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 270e3240fab531d15cddc7c50202e5820e90bb53) Reviewed-on: https://chromium-review.googlesource.com/1091975 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
* Fizz: Add fan for WukongRyan.Zhang2018-06-071-34/+73
| | | | | | | | | | | | | | | | | | | | This patch also makes EC print board version, OEM ID, SKU ID on console. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:70294260 BRANCH=none TEST=Verify fan speed follows temperature changes on Teemo. Verify CBI is read correctly on start-up. Change-Id: I45a767adbb437005b0f18ff34b4e9d6b0450a0e0 Reviewed-on: https://chromium-review.googlesource.com/1083933 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1089036 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
* Fizz: add CONFIG_BOARD_HAS_RTC_RESETRyan Zhang2018-06-071-0/+8
| | | | | | | | | | | | | | | | | | | | | This patch resets the RTC of the SoC when the system doesn't leave S5. If it fails 5 times, the system will go back to and stay in G3. BUG=b:79323716 BRANCH=fizz TEST=Boot Fizz differently: 1. AC plug-in 2. Power button press 3. reboot EC command 4. servo reset button 5. Recovery mode Change-Id: I728c99c342fb888600599acbe25f72a478ccf948 Signed-off-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1020583 Reviewed-on: https://chromium-review.googlesource.com/1089035 Reviewed-by: Duncan Laurie <dlaurie@google.com>
* Fizz: Increase VR3 voltage to avoid boot failureDaisuke Nojiri2018-05-301-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | When V3P3A_EC is higher than V3P3A_DSW + 0.07V, system 3.3V rail is powered by V3P3A_EC. V3P3A_EC LDO will shut down when PU27 triggers OTP. This patch increases VR3 voltage by 3%, which gives us 3.399. This is more than the maximum voltage PU27 can provide, thus, V3P3A_DSW will win the voltage race (against V3P3A_EC). Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:80114849 BRANCH=Fizz TEST=Boot Fizz Change-Id: Ieb6fbc4ad056a79dc1eef5eae7a91385575bac0b Reviewed-on: https://chromium-review.googlesource.com/1069594 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit d674a0e3cb15ee7f542c16f5930f0ef4a5f000ea) Reviewed-on: https://chromium-review.googlesource.com/1076707 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
* espi: rename remaining eSPI optionsJett Rink2018-05-231-1/+1
| | | | | | | | | | | | | Change prefix from CONFIG_ESPI to CONFIG_HOSTCMD_ESPI for consistency. BRANCH=none BUG=chromium:818804 TEST=Full stack builds and works on yorp (espi) and grunt (lpc) Change-Id: I8b6e7eea515d14a0ba9030647cec738d95aea587 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1067513 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* fizz/nami: Use chipset_pre_init_callbackFurquan Shaikh2018-04-191-2/+1
| | | | | | | | | | | | | | | | This change updates fizz/nami boards to use chipset_pre_init_callback instead of hook. BUG=b:78259506 BRANCH=None TEST=make -j buildall Change-Id: Ib09c033c2f0c2c3d324c90776f7bbd8365a71f52 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1018735 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* chgstv2: Check charger power in prevent_power_on.Aseda Aboagye2018-04-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | charge_prevent_power_on() had sections which were gated on the following CONFIG_* option: CONFIG_CHARGER_LIMIT_POWER_THRESH_BAT_PCT However, the block of code that this gated didn't even take the battery percentage into account and made it very confusing as to why. This commit simply changes the CONFIG_* option used to gate to be the following: CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON This better reflects the checks that were actually being made. Additionally, this CONFIG_* option is defined by default for boards that have a chipset task and is initialized to 15W, which is the power that indicates that the charger is likely to speak USB PD. BUG=b:76174140 BRANCH=None TEST=make -j buildall Change-Id: Ic9158dd7109ce6082c6d00157ff266842363b295 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/977431 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* fan: Allow board to configure fans at run timeDaisuke Nojiri2018-03-061-11/+16
| | | | | | | | | | | | | | | This patch splits struct fan_t into two parts: base configuration and RPM configuration. RPMs are expected to be different from model to model while a base configuration is most likely shared. BUG=b:73720175 BRANCH=none TEST=make buildall Change-Id: Iff17573f110e07e88d097dd848cf91ee98b83176 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/949382 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* host_command: Count suppressed host commands individuallyDaisuke Nojiri2018-02-161-7/+0
| | | | | | | | | | | BUG=chromium:803955 BRANCH=none TEST=Verify counters are printed every hour and before sysjump as follows: [12.540051 HC Suppressed: 0x97=25 0x98=0 0x115=0] Change-Id: I1c1aecf316d233f967f1d2f6ee6c9c16cc59bece Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/912150
* CBI: Make data offset and size variableDaisuke Nojiri2018-02-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently CBI data offset and size are fixed. This patch makes them variable. Each data item consists of <tag><size><value> where <tag> is a numeric value assigned to each data item, <size> is the number of bytes used for <value>. BUG=b:70294260 BRANCH=none TEST=Use 'ectool cbi set' to set board version, oem, sku. Verify the contents by cbi console command and ectool cbi get. 1. ectool cbi set 0 0x202 2 2 (Init CBI and write board ver. of size 2) 2. ectool cbi set 1 1 1 (write oem id of size 1) 3. ectool cbi set 2 2 1 (write sku id of size 1) 4. ectool cbi get 0 514 (0x202) 5. ectool cbi get 1 1 (0x1) 6. ectool cbi get 2 2 (0x2) 7. Run cbi console command: CBI_VERSION: 0x0000 TOTAL_SIZE: 18 BOARD_VERSION: 514 (0x202) OEM_ID: 1 (0x1) SKU_ID: 2 (0x2) 43 42 49 8c 00 00 12 00 00 02 02 02 01 01 01 02 01 02 Change-Id: I5a30a4076e3eb448f4808d2af8ec4ef4c016ae5e Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/920905 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* Fizz: Update thermal table by projectRyan Zhang2018-02-081-14/+44
| | | | | | | | | | | | | | | | | | | | | | | | | 1. Prochot/Shutdown Point a. Prochot on: >=81C, off: <=77C b. Shutodwn: >=82C 2. custom fan table There are three projects sharing two tables, and use Kench & Teemo's table before getting correct OEM ID because it raises fan speed quicker than the other one. a. Kench & Teemo & default b. Sion BUG=b:70294260 BRANCH=master TEST=EC can get two fan tables with different cbi value. Change-Id: Ie1bffbcf5c353a9aae5806f6c2b41554eed22b7d Signed-off-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/886121 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Fizz: Monitor input current (version 2.0)Daisuke Nojiri2018-02-081-23/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fizz has three FETs connected to three registers: PR257, PR258, PR7824. These control the thresholds of the current monitoring system. PR257 PR7824 PR258 For BJ (65W or 90W) off off off For 4.35A (87W) on off off For 3.25A (65W) off off on For 3.00A (60W) off on off The system power consumption is capped by PR259, which is stuffed differently depending on the SKU (65W v.s. 90W or U42 v.s. U22). So, we only need to monitor type-c adapters. For example: a 90W system powered by 65W type-c charger b 65W system powered by 60W type-c charger c 65W system powered by 87W type-c charger In a case such as (c), we actually do not need to monitor the current because the max is capped by PR259. AP is expected to read type-c adapter wattage from EC and control power consumption to avoid over-current or system browns out. The current monitoring system doesn't support less than 3A (e.g. 2.25A, 2.00A). These currents most likely won't be enough to power the system. However, if they're needed, EC can monitor PMON_PSYS and trigger H_PROCHOT by itself. BUG=b:72883633,b:64442692,b:72710630 BRANCH=none TEST=Boot Fizz on 60W/87W/BJ charger. Verify GPIOs are set as expected. Change-Id: Ic4c0e599f94b24b5e6c02bbf1998b0b89ecad7bf Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/900491 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Enable PD communication in RO for external displayDaisuke Nojiri2018-02-031-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | This patch makes EC enable PD communication if it's running in manual recovery mode. This is required to show recovery screen on a type-c monitor. This patch also makes EC-EFS ignore power availability. It will make EC verify & jump to RW even if power is sourced by a barrel jack adapter. This should allow depthcharge to show screens (e.g. broken, warning) on a type-c monitor. BUG=b:72387533 BRANCH=none TEST=On Fizz with type-c monitor, verify - Recovery screen is displayed in manual recovery mode. - Critical update screen is displayed in normal mode. - Warning screen is displayed in developer mode. Monitors tested: Dingdong, Dell S2718D Change-Id: Ib53e02d1e5c0f5b2d96d9a02fd33022f92e52b04 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/898346 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Fizz: Suppress EC_CMD_PD_GET_LOG_ENTR debug logDaisuke Nojiri2018-02-031-0/+1
| | | | | | | | | | | | | | | | Host command handler prints every single host command except when commands are repeated back-to-back. Some commands do not provide useful info when studying feedback reports or what is worse they may hide critical info by flooding the EC log. BUG=chromium:803955 BRANCH=none TEST=Observe 'HC 0x115' is not printed. Change-Id: I4901b27bbfedd54dc0d364b16c49d4ed0dea0fc4 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/896694 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Fizz: Remove board_has_working_reset_flagsDaisuke Nojiri2018-01-221-12/+0
| | | | | | | | | | | | | | | | This function is no longer used because proto0 boards have been deprecated. This function is called before I2C is initialized. This function tries to read board info and causes watchdog to trigger because timeout is set to zero. BUG=none BRANCH=none TEST=boot Fizz. reboot by 'reboot ap-off'. Observe no watchdog reset. Change-Id: I3bdebe4fb34dbef552fc89a170efa87d753078c0 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/879355 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* host_command: Suppress individual host command debug logDaisuke Nojiri2018-01-221-0/+6
| | | | | | | | | | | | | | | | | | Host command handler prints every single host command except when commands are repeated back-to-back. This patch allows each board decide which commands should be ignored. When debug printf is suppressed, a global counter is incremented. Developers know there were commands processed but not reported to the console. BUG=chromium:803955 BRANCH=none TEST=Observe 0x97 and 0x98 were not printed. Global suppress counter is incremented. Change-Id: I05e8cde9039f602e8fc06c20e89b328e797bd733 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/876952 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* CBI: Read board info from EEPROMDaisuke Nojiri2018-01-181-0/+5
| | | | | | | | | | | | | | | This patch adds Cros Board Info APIs. It reads board info from EEPROM. This patch sets CONFIG_CBI for Fizz to make it use CBI. BUG=b:70294260 BRANCH=none TEST=Read data from EEPROM. Change-Id: I7eb4323188817d46b0450f1d65ac34d1b7e4e220 Reviewed-on: https://chromium-review.googlesource.com/707741 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Fizz: override DP EQ setting for Deterministic JitterDevin Lu2018-01-091-0/+9
| | | | | | | | | | | | | | Set lower EQ of DP port to 4.5db. BUG=b:71613170 BRANCH=none TEST=use ectools to read PS8751 reg offset 0xd3 as 0x98 Change-Id: Iedc0002028ead6f0f6fa7aeef4ad2845b028a76b Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/851756 Reviewed-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Fizz: Set default BJ voltage and currentDaisuke Nojiri2017-12-201-4/+2
| | | | | | | | | | | | | BUG=b:64442692 BRANCH=none TEST=make runtests && buildall. Boot Fizz and let coreboot set the adapter current and voltage. Change-Id: I1afc37b7d7b8a5d88becdae2ec6644a86022dfba Reviewed-on: https://chromium-review.googlesource.com/831398 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* config: Add CONFIG_BUTTON_TRIGGERED_RECOVERY.Aseda Aboagye2017-12-181-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | The CONFIG_BUTTON_RECOVERY option was a little confusing especially when we have the CONFIG_DEDICATED_RECOVERY_BUTTON option. This commit renames CONFIG_BUTTON_RECOVERY to CONFIG_BUTTON_TRIGGERED_RECOVERY to help make things a little clearer. Additionally, to avoid copy paste, defining CONFIG_BUTTON_TRIGGERED_RECOVERY will populate the recovery_buttons table with either the volume buttons or a dedicated recovery button depending what the board is configured for. Lastly, if CONFIG_DEDICATED_RECOVERY_BUTTON is defined, CONFIG_BUTTON_TRIGGERED_RECOVERY is defined as well since it's implicit. BUG=chromium:783371 BRANCH=None TEST=make -j buildall Change-Id: Idccaa4d049ace0df3b98b35bdd38ac9dbd843200 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/830917 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Fizz: Remove power control of V3P3_USBPDDaisuke Nojiri2017-12-141-7/+2
| | | | | | | | | | | | | | | PU62 used to be used to turn on power to PS8751 but it's been removed. PS8751 is powered directly from PP3300_EC. So, EC doesn't need to enable it. BUG=b:65212601 BRANCH=none TEST=On Kench EVT SKU5, verify type-c port is powered. Change-Id: I2a1ce28efe09212a4ce7e7b57c0560e42e137cec Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/826256 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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