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Add support for entering recovery mode via the REFRESH_PWR key
combination. This is needed on a platform with a closed source EC when
the EC cannot be trusted to handle the normal ESC+REFRRESH+PWR
combination. Add an interrupt handler for the RBOX key combo and when it
is detected, generate an EC reset pulse via RBOX. The recovery state is
latched into NVMEM so it can be queried by coreboot/verstage on
the next boot.
This change also ensures that all EC resets initiated by the Cr50 have a
minimum pulse width of 30 ms to meet the EC requirement.
BUG=b:122715254,b:119275910,
BRANCH=cr50
TEST=make buildall. Verified boot to recovery mode screen after pressing
REFRESH+PWR. Verified recovery mode entry from S0 and S5 states.
Change-Id: I840ee1024bbfba00e47050eeb8b1ede244148c05
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1389061
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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