| Commit message (Collapse) | Author | Age | Files | Lines |
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This CL fixes a logic error where CBI FW_CONFIG field was being
checked. In addition, the CBI config option to bypass the write
protection check was added as the CBI is only being used to store the
dock_mf preference and doesn't need to be write protected.
BUG=b:164157329
BRANCH=quiche
TEST=Verified on Gingerbread that the status LED color matches with
the dock's MF preference. In addition, verified that following a power
cycle, the MF preference is read properly from the CBI.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Ie3d5b8d4af73b1d09b3f58f1a990b7c77cb4a6fe
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3116666
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This CL modifies both power button press/release polairty and power
button LED control signals to be board specific instead of platform
specific.
Previously there were platform specific macros for
BUTTON_PRESSED_LEVEL and BUTTON_RELEASED_LEVEL. But, these levels will
depend on how the power button circuit is designed. This CL moves
these macros to board.h.
In addition, macros are added to for the GPIO signals used for
green/red LED control. This allows for boards that don't support the
power button LED at all.
BUG=b:164157329
BRANCH=quiche
TEST=Verfied power button works on both quiche and
gingerbread. Previously, this was only working on quiche because
gingerbread has opposite polarity for the power button signal. Also,
verfied that power button/status LED turns off when dock is off.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Iee838ee158d23252e8b429f51a1dd1a71d8e94a0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2868225
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL adds support for new GPIO signals used by the EC to notify
usb/mst hubs about type-c attach and over current protection events.
The usb3 only port on quiche/baklava uses a PPC, and previously the
PPC was only being used to enable/disable VBUS and did not have
interrupt support. However, there can still protection events that
must be handled.
This CL also adds a simple usbc state machine to be able to determine
attached.src state while in RO. The USB hub needs to be notified when
VBUS is present (BPWRDET) otherwise it will just go into suspend state
and there can be USB enumeration issues.
BUG=b:185066262
BRANCH=quiche
TEST=manual
For OCP, I set the PPC source current limit to 1.5A and connected to a
chromebook. This triggers the OCP event.
For BPWRDET/UFP_PLUG_DET verified that when attached, these signals
are high, when detached, are low as expected.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Ia147b970ea3dc298545aec4dedaa035ad2a1db30
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2818522
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Sam Hurst <shurst@google.com>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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The vendor for MP4245 buck boost converter recommends averaging 5
samples to get more accurate voltage measurements. This CL adds a 4
sample sliding window to add averaging to the vbus adc measurements. 4
samples was chosen to reduce complexity by allowing use of a circular
sample buffer.
In addition to adding averaging, the function to disable VBUS has been
modified so that VOUT from the mp4245 is no longer disabled. Since
VBUS is turned on/off via the PPC, the mp4245 votlage output can be
left enabled always. When VBUS is turned off, the mp4245 setpoint is
set back to 5V and the pd_transition_voltage function is used to wait
until this voltage level is reached.
Previously, the mp4245 output was being turned off and then the output
voltage was being checked until it reached 5V. This check was likely
incorrect wihtout setting the voltage setpoint.
BUG=b:185066238
BRANCH=quiche
TEST=connected to host machine and verified that voltage ramps up/down
as expected.
Ramp up case:
[10.127896 C0: PE_SRC_Transition_Supply]
[10.166617 vbus[3]: new = 8651 mV, avg = 6883 mV, target = 20000 mV]
[10.169337 vbus[4]: new = 9889 mV, avg = 8071 mV, target = 20000 mV]
[10.172023 vbus[5]: new = 11328 mV, avg = 9350 mV, target = 20000 mV]
[10.174712 vbus[6]: new = 12766 mV, avg = 10659 mV, target = 20000 mV]
[10.177403 vbus[7]: new = 14085 mV, avg = 12017 mV, target = 20000 mV]
[10.180095 vbus[8]: new = 15165 mV, avg = 13336 mV, target = 20000 mV]
[10.182786 vbus[9]: new = 16563 mV, avg = 14645 mV, target = 20000 mV]
[10.185486 vbus[10]: new = 18001 mV, avg = 15954 mV, target = 20000 mV]
[10.188180 vbus[11]: new = 19480 mV, avg = 17302 mV, target = 20000 mV]
[10.190875 vbus[12]: new = 19959 mV, avg = 18501 mV, target = 20000 mV]
[10.193569 vbus[13]: new = 20160 mV, avg = 19400 mV, target = 20000 mV]
[10.199136 C0: PE_SRC_Ready]
Ramp down case:
> pd 0 swap power
> [40.216075 C0: PE_PRS_SRC_SNK_Send_Swap]
[40.244508 C0: PE_PRS_SRC_SNK_Transition_To_Off]
[40.255491 vbus[3]: new = 16124 mV, avg = 18082 mV, target = 5000 mV]
[40.258323 vbus[4]: new = 14525 mV, avg = 16693 mV, target = 5000 mV]
[40.261296 vbus[5]: new = 13086 mV, avg = 15274 mV, target = 5000 mV]
[40.264046 vbus[6]: new = 11648 mV, avg = 13846 mV, target = 5000 mV]
[40.266954 vbus[7]: new = 10369 mV, avg = 12407 mV, target = 5000 mV]
[40.269703 vbus[8]: new = 9130 mV, avg = 11058 mV, target = 5000 mV]
[40.272468 vbus[9]: new = 7652 mV, avg = 9700 mV, target = 5000 mV]
[40.275211 vbus[10]: new = 6292 mV, avg = 8361 mV, target = 5000 mV]
[40.278124 vbus[11]: new = 5094 mV, avg = 7042 mV, target = 5000 mV]
[40.280870 vbus[12]: new = 5054 mV, avg = 6023 mV, target = 5000 mV]
[40.283665 vbus[13]: new = 4974 mV, avg = 5354 mV, target = 5000 mV]
[40.286411 vbus[14]: new = 5014 mV, avg = 5034 mV, target = 5000 mV]
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I12fcc5a006985ff482df0963dfeb0af5b39dcfd5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2827513
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL refactors code required for the user facing usbc port. This
port was only being initialized at init time and therefore would not
function properly following a power button off/on.
To avoid duplicating code, the functions used to initialize this port
and control VBUS were moved to usbc_support in baseboard so they can
be common and are now guarded by a GPIO macro so this can be board
specific for variants which don't have a PPC to control on this port.
BUG=b:164157329
BRANCH=quiche
TEST=Verifed that port C2 attaches as expected following power button
off/on sequence.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I2f9500f7e58de674c6f7c12a95cebad45de166cc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785198
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
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This CL adds support for the power button including a new task to
allow for power sequencing delays.
The power button is used for two purposes. First, to turn the dock on
or off, and second, to allow for a user set preference of the MF for
DP 2 or 4 lane selection. If the dock is off, the dock will be turned
on as soon as the short press timer expires. If the dock is already
on, then a short press action is only recognized on the release so a
long press will only change the MF preference.
BUG=b:164157329
BRANCH=quiche
TEST=manaual
short press -> turns dock on off as expected
long press -> toggles MF preference and flashes LED
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I8519c072a7f10657c369344ead6149fc7d31bb36
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2718268
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Sam Hurst <shurst@google.com>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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GPIO_MST_HUB_LANE_SWITCH is used by the EC to signal to the MST hub if
the host will be providing 2 or 4 lanes of DP. Some MST hubs will only
read this signal coming out of reset.
This CL adds a method to set MST_HUB_LANE_SWITCH which includes
putting the MST hub in reset.
BUG=b:175434634
BRANCH=None
TEST=modified the mf preference in CBI and verified that
MST_HUB_LANE_SWITCH follows the expected level based on pin config in
the DP Configure message:
Pin Config C -> 0* MST_HUB_LANE_SWITCH
Pin Config D -> 1* MST_HUB_LANE_SWITCH
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I096988567b1e53cf49833359ce053da199f406db
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2682789
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL changes the hook init timing for baseboard_init which needs
to be run prior to any usbc/usb-pd initialization. In addition the
config option CONFIG_USB_PD_PULLUP is changed from RP_1A5 to RP_3A0 to
match what is advertised in the SRC CAP message.
BUG=None
BRANCH=None
TEST=Verfied TD.4.9.2 USB Type C Current Advertisement Test passes
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I226e983733850f1b21c25175826e762295609069
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2519800
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL adds config options and board level structs to fully support
USB-PD on port C0 for both gingerbread and quiche.
This includes all the svdm response functions required for support of
DP Alt-mode as a UFP_D. This also includes honeybuns specific version
of usb-pd policy functions.
BUG=b:175660576
BRANCH=None
TEST=Verify that C0 port can establish PD contract, enter ALT-DP mode
and extend display over DP/HDMI connectors.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I11edee85e63381f00114e9fbe012a37fd8174279
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699455
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This CL updates both quiche and gingerbread to P1 hardware level. This
includes an MCU with 256 kB flash, some GPIO pin assignments to
address EXTi conflicts, and removing the I2C2 port.
BUG=b:183288657
BRANCH=None
TEST=make BOARD=quiche and make BOARD=gingerbread
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I6a5d3d365b6c9ed704ced8506fa4a97ca7b668c7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699454
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This CL adds configs/structs required for USB-EP support for both
quiche and gingerbread. This CL also adds usbc support code to RO so
that Rd is being presented on both CC lines in RO.
In addition, there is some clean up for I2C port names and the debug
gpio utility function.
BUG=b:172493899
BRANCH=None
TEST=tested on quiche and verified that the USB-EP was enumerated
RST EP0 3220
RST EP0 3220
RST EP0 3220
RST EP0 3220
SETAD ae
[8.069004 Jumping to image RW]
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I8d65ba55eecc2b82047a8cd433611f639af0c5ed
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699453
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Sam Hurst <shurst@google.com>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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Honeybuns does not have an AP and therefore it needs to verify its own
RW signature in RO. This functionality is enabled with RWSIG config
option and task. This CL adds support to both enable RWSIG and make
the RO and RW images asymmetric.
Note that RO only needs to enable USB-EP support for fwupd support and
support RW signature verification. Therefore, RO is limited to support
these key features.
BUG=b:167462264
BRANCH=None
TEST=verifed on both quiche and gingerbread that will boot into RO and
following RW signature verification, jump to the RW image.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I1cdf0965e06881ebb48205a517d308641e6cdb49
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699452
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This CL adds config options and tables required to pull in i2c support
for honeybuns. In addition, config options for CBI were added to
facilitate i2c testing.
BUG=b:148493929
BRANCH=None
TEST=ran i2cscan on quiche
> i2cscan
Scanning 0 usbc.................
0x18.
0x19.
0x1a.
0x1b.
0x1c.
0x1d.
0x1e.
0x1f.
0x20.
0x21.
0x22.
0x23.
0x24.
0x25.
0x26.
0x27...........................
0x42..............................
0x60.......................
Scanning 1 usb_mst.
0x08.
0x09.
0x0a.
0x0b.
0x0c.
0x0d.
0x0e.
0x0f.
0x10.
0x11.
0x12.
0x13.
0x14.
0x15.
0x16.
0x17..........................................
0x41................................
0x61.........
0x6a.............
Scanning 2 eeprom.........................................
0x30................................
0x50.......................................
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Ib1b8b795a2a07a5b1cbe167b17c3f70a8d9703b2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213943
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL adds a function in baseboard that will sequence through a list
of gpio controlled power rails and chip resets. The table includes a
delay prior to executing the next entry. The table is intended to be
in board.c as the rails and delays can very much be board specific.
BUG=b:167430750
BRANCH=None
TEST=Verified that power rails come up and status LED is on.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I830dee9eb28d4648d274d8cbc49b6972cd70dba5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213837
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This CL contains a skeleton image as a starter for honeybuns.
BUG=b:148492715
BRANCH=none
TEST=make BOARD=honeybuns and verify that image builds successfully
Change-Id: I05c8b6bb4fa1f1a781ab4d9e8a43026373c2ab50
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032199
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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