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* Add AP userspace scripts to tweak lightbar colorstoolchain-3428.65.BBill Richardson2013-01-084-3/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have yet another tweak for the lightbar, but we don't want to update the EC. This CL adds an init script that runs on the AP at every boot and pokes the EC to modify the lightbar settings. We have to run it at every boot because the EC will hibernate after the AP has been off (not suspended) for an hour on battery power and will lose its settings. There's a corresponding CL for the ec-utils ebuild that installs the userspace scripts into the rootfs. BUG=chrome-os-partner:16827 BRANCH=link TEST=manual Build the image for Link, install, reboot. Run "ectool lightbar params". The output should match what's in /usr/share/ec/lightbar_params.txt Original-Change-Id: If50ac2ef2432f7d60cdaf4c222b68dbdee80b2ec Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/39979 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Richard Barnette <jrbarnette@chromium.org> (cherry picked from commit 3eb6f58d3e18647797ad4e3f16203c419ed4c791) Change-Id: I11dcb0318a8f499c26abd3ed9ebf65788ff26c66 Reviewed-on: https://gerrit.chromium.org/gerrit/40626 Commit-Queue: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org> Tested-by: Bill Richardson <wfrichar@chromium.org>
* link: Workaround for errata 3.2Randall Spangler2012-12-171-2/+3
| | | | | | | | | | | | | | | Reads of HIBRTCC and HIBRTCCSS are not properly synchronized and may return incorrect data. We were re-checking HIBRTC, but not HIBRTCSS. BUG=chrome-os-partner:16864 BRANCH=link TEST=from ec console, do 'rtc' command repeatedly; printed values should be strictly increasing. Change-Id: I3e59dc840316ad36bb4851f03b66a3ae3df5cccd Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/39795 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Reformat init.S to use tabs not spacesRandall Spangler2012-12-171-62/+64
| | | | | | | | | | | | | And tidy a few comments. No code changes, only comments and whitespace. BUG=none BRANCH=none TEST=compile code (nothing to test) Change-Id: I10faadc4f11147984cb911c4e630d05ac594cc56 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/39796 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* spring: add basic TSU6721 driverVincent Palatin2012-12-134-0/+191
| | | | | | | | | | | | | | | | | for now, just control the USB pins muxing. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:14318 TEST=on Spring, put the EC UART on the micro-B connector and read it using a modified FTDI cable. Change-Id: Ib0c87e483fb0bbe1835bd6ea008176b88d6f12f8 Reviewed-on: https://gerrit.chromium.org/gerrit/38361 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* stm32: Add option to select timer for hardware clockVic Yang2012-12-124-60/+88
| | | | | | | | | | | | | | Hardware clock uses two timers, currently TIM3 and TIM4. This CL adds an option to select between TIM2, TIM3, and TIM4, so that we can use any one the three timer as a PWM source. BUG=chrome-os-partner:14319, chrome-os-partner:7463 TEST=Build and run on snow/spring. Build success on daisy. BRANCH=none Change-Id: I1a00b3d491ee3e131708b573f6ea70e6b56c96dd Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/39584
* lm4: Postfix chip name when debug mode is enabledVic Yang2012-12-101-3/+23
| | | | | | | | | | | | | | | This adds a '-debug' postfix to chip name when debug mode is enabled, allowing us to probe debug mode from host. BUG=chrome-os-partner:16700 TEST='mosys -k ec info' and see chip name postfixed with '-tm' Test same thing on DVT and chip name is not postfixed. BRANCH=link Change-Id: Iade26f2009dd3bdb8ddbe92da0da8da5404c6e99 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/39455 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Add more paranoia for flash write protectRandall Spangler2012-12-102-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the entire flash is protected (as it normally is after software sync), fail all flash write/erase operations. Add a shadow copy of the all_now flag. BUG=chrome-os-partner:16727 BRANCH=link TEST=manual Verify that flash operations work properly before all_now. Then enable HW WP and flashwp enable flashwp now and try flasherase 0x38000 0x1000 flashwrite 0x38000 0x100 Those commands should fail with error 7 From the host side ectool flasherase 0x38000 0x1000 echo 'Khaaaaaaaaaaan' > /tmp/b16727 ectool flashwrite 0x38000 /tmp/b16727 should also fail. Change-Id: I99a4d2bb86080bd12c900582a8fbdfc79c99916c Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/39517 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* link: Increase cold reset hibernate time to 1 secondRandall Spangler2012-12-101-1/+1
| | | | | | | | | | | | | | | This gives VDDC more time to bleed out before the system reboots. This will require FAFT changes to compensate for the longer cold reset time. BUG=chrome-os-partner:16600 BRANCH=link TEST=from ec console, 'reboot cold' should take a second. Change-Id: I7e0e901958593262868151642560296f0c5496a7 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/39515 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Invalidate hash if flash operation changes the hashed regionRandall Spangler2012-12-103-8/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This prevents the EC from returning a stale hash. BUG=chrome-os-partner:16668 BRANCH=link,snow TEST=manual, with WP disabled From EC console - Boot system and wait a second - hash --> prints valid hash - flasherase 0x20000 0x1000 - hash --> invalid - hash rw - hash --> prints valid hash - flashwrite 0x20000 0x1000 - hash --> invalid - hash rw - flasherase 0x38000 0x1000 - flashwrite 0x38000 0x1000 - hash --> still valid (since 0x38000 is outside the rw section) From root shell - ectool hash --> prints valid hash - ectool flasherase 0x20000 0x1000 - ectool hash --> invalid - ectool hash recalc RW - ectool hash --> prints valid hash - echo 'Making a hash of this' > /tmp/hashofthis - ectool flashwrite 0x20000 /tmp/hashofthis - ectool hash --> invalid - ectool hash recalc RW - ectool flasherase 0x38000 0x1000 - ectool flashwrite 0x38000 /tmp/hashofthis - ectool hash --> still valid (since 0x38000 is outside the rw section) Change-Id: Id915a504a7bc70b8b8c339b5ce55dc5bad5838fe Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/39484 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Increase cold reset hibernate time to 200msstabilize2Randall Spangler2012-12-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The hardware fix for issue 16600 adds RC delays to ENABLE_5VALW, so that +5VALW stays on during a warm reset of the EC. In the worst case, +5VALW will drop around 150ms, which could then move the +3VALW glitch right into the time frame where the EC is booting following hibernate. Increase the cold reset hibernate time from 150ms to 200ms. This ensures that +5VALW has dropped before the EC comes out of hibernate. BUG=chrome-os-partner:16600 BRANCH=link TEST=manual From the EC console, 'reboot cold' a bunch of times. The system shouldn't hang. (Alternately, you can 'ectool reboot_ec cold' a bunch of times) Change-Id: I4bebdb552b8e917c6345badd6efb68b10d7d1f86 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/39340 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* link: Enable +5VALW at boot and leave it enabledRandall Spangler2012-12-062-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | This works around a problem where disabling +5VALW glitches +3VALW_EC, which may cause the EC to brown out or hang. BUG=chrome-os-partner:16600 BRANCH=link TEST=manual 1. When the system boots, look for this line as the first x86 power state: [0.004977 x86 power state 0 = G3, in 0x0001] 2. Boot the system. Should boot normally. 3. Shut down the system using the power button. 4. After ~10 seconds, you should see that line of output again. 5. At the EC console: 'gpioget enable_5valw' should output: 1* ENABLE_5VALW This should ideally be combined with a hardware fix to add 30+ ms of delay to EC_EN_5V, since when the EC is reset via power+refresh that tri-states EC_EN_5V, and it takes ~22ms for the EC to boot and start driving EC_EN_5V again. Change-Id: Iba4d961d064105faf988a35c2277e9d7406e39e2 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/39334 Reviewed-by: Yung-Chieh Lo <yjlou@chromium.org>
* link: Disable interrupts while reading/writing bits via onewireRandall Spangler2012-11-291-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When reading, the line must be sampled in a narrow timing window after the output pulse. Interrupts or context switches during this time corrupt the data. Similarly, when writing, the difference between a 0-bit and a 1-bit is the length of the output pulse. So a context switch or interrupt there can turn a 1-bit into a 0-bit. BUG=chrome-os-partner:15507 BRANCH=link TEST=manual 0. plug in AC power 1. hold down shift key for the duration of this test 2. powerled yellow 3. powerled red 4. repeat steps 2-3 several times 5. release shift key Power adapter LED should toggle color each time. (It may also toggle to the normally expected color during this experiment, if the charging task updates it.) Power adapter LED should NOT turn off during this test. Change-Id: Ief11e6e9a5b07aa3a25c60c50e4e7744a4705713 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/38925 Reviewed-by: Yung-Chieh Lo <yjlou@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Fix potential deadlock in udelay()Randall Spangler2012-11-291-3/+13
| | | | | | | | | | | | | | | | | | | | | If interrupts are disabled and the deadline is across a 32-bit timer boundary from the current time, udelay() can lock up. The fix is to do 32-bit math directly in udelay(). BUG=chrome-os-partner:16472 BRANCH=link TEST=manual waitms 1 -> prompt returns almost instantly waitms 500 -> prompt returns after 0.5 sec waitms 1000 -> watchdog error printed, then prompt returns waitms 2000 -> watchdog reboot Change-Id: Ib8ca06cee414d48900c0142e629daa68aa0993c9 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/38924 Reviewed-by: Yung-Chieh Lo <yjlou@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* temp_metrics: Set GPU min freqSameer Nanda2012-11-281-4/+19
| | | | | | | | | | | | | | | | | | On systems with modems, a harmonic of the lowest GPU frequency of 350Mhz interferes with the cellular signal. Set the minimum GPU frequency for such systems to 450Mhz. BUG=chrome-os-partner:16439 TEST="cat /sys/kernel/debug/dri/0/i915_min_freq". On systems without this modem, it should read back 350. On systems with the modem, it should read back 450. BRANCH=none Change-Id: I103a55af11955aed2f3e8c945904444475c63865 Signed-off-by: Sameer Nanda <snanda@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/38826 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org>
* Handle arbitration lost on I2C portsRandall Spangler2012-11-282-9/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This seems to happen when the I2C signals come up so that the EC sees a start condition from the remote end. In this case, the EC refuses to talk on the I2C port until the EC's I2C state machine is reset. Also, don't fail on bus-busy, since that's true during a multi-part transaction such as an I2C string read. BUG=chrome-os-partner:16262 BRANCH=link TEST=boot system; 'battery' and 'temps' should give good info Then run snanda's suspend_stress_test for a while and repeat. Or a better test is to open 2 crosh shells, sudo bash in each, and 1) while true; do ectool temps all; sleep 0.5; done 2) suspend_stress_test Then watch the EC console for "I2C5 bad status" errors. These happen rarely, only on some systems. With this fix, they'll be reported when they occur, but should not cause errors to be reported by 'ectool temps all', since the I2C module will clear the arbitration-lost status before retrying. Change-Id: Idfaf9cd7e8ef2abcc0130332890329dd5d2ca052 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/38686 Reviewed-by: Yung-Chieh Lo <yjlou@chromium.org>
* Prevent GCC4.7 from generating unaligned memory accessesVincent Palatin2012-11-271-0/+1
| | | | | | | | | | | | | | | | | | | The behavior of GCC seems to have changed between 4.6 and 4.7, now it might generate unaligned memory accesses, so we need to explicitly set "-mno-unaligned-access". Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:16391 TEST=make BOARD=link dis, then check the generated assembly for keyboard_scan_init Change-Id: I326479a77d6319f1d74e17efe483f5cde56ff325 Reviewed-on: https://gerrit.chromium.org/gerrit/38758 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
* Handle bus errors on thermal I2C busRandall Spangler2012-11-262-5/+43
| | | | | | | | | | | | | | | | | | | | | | | | | 1) Properly report I2C errors on TMP006 as error, not device-not-powered. 2) Treat clock timeout and bus-busy I2C status as error (previously ignored). 3) If clock timeout or bus-busy, reset I2C master for that bus to clear the error. These should help with systems where the thermal I2C bus gets into a weird state on suspend/resume. BUG=chrome-os-partner:16262 BRANCH=link TEST=boot system; 'battery' and 'temps' should give good info Then run snanda's suspend_stress_test for a while and repeat. Change-Id: I534be8236a4d6de82575fe6d33a68502ce0a3a95 Original-Change-Id: Iec5d6bbd357d2e5eb3dc3d361c829f353e996ab6 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/38444 Reviewed-on: https://gerrit.chromium.org/gerrit/38659 Reviewed-by: Yung-Chieh Lo <yjlou@chromium.org>
* link: allow to decrease maximum battery charging currentVincent Palatin2012-11-073-0/+57
| | | | | | | | | | | | | | | | | | | | | Add an interface to allow the CPU to cap the maximum battery charging current. The maximum is removed every time the machine goes to S3 or S5. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=link BUG=chrome-os-partner:16041 TEST=on Link, plug AC to charge the battery, then run "ectool chargecurrentlimit 1200" and see the charging current in "power-supply-info" decreasing to 1.2 A. Change-Id: I10900e1c264d2db67809638ec0dcb836d721fa75 Reviewed-on: https://gerrit.chromium.org/gerrit/37532 Reviewed-by: Sameer Nanda <snanda@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* x86: set hibernation delay to 1 hourVincent Palatin2012-11-071-1/+1
| | | | | | | | | | | | | | | | | | | When the system is in S5, it will go to hibernate mode after 1 hour instead of 24 hours. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=link BUG=none TEST=on Link DVT3 with servo connected, turn off the machine and see the EC going to hibernate after 1 hour (according to EC UART traces) start the machine and see it boot properly. Change-Id: I1da87b3e09b90817ce5609f3f74b5969235fb90a Reviewed-on: https://gerrit.chromium.org/gerrit/37526 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
* Fix the ec flash programming script to properly handle errorsVadim Bendebury2012-11-072-23/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When a nonexisting file is specified as the EC image, the ec flash programming script reports the error, but continues running and returns zero status (success) after completion. With this change the exit status on some errors gets communicated to the caller. The openocd script is edited to drop the unused parameter of the flash_lm4() function and the flash_ec script is edited not to require EC images to be executable. BRANCH=none BUG=chrome-os-partner:15610 TEST=manual . run flash_ec with nonexisting or nonreadable file as a parameter, observe it to report proper return status. Run it with a proper image file name and observe it succeed. . run the command again, while the device is being programmed enter 'ctl-c', observe programming stepped but the 'Restoring servo settings..." message still showing up. Change-Id: Iac0b233fe579b0d5a84cf5a9acf85ed8bf10422e Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/37363 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* More supports for A20 enable/disableLouis Yung-Chieh Lo2012-11-044-2/+45
| | | | | | | | | | | | | | Add i8042 output port commands (0xf0-0xff), I8042_ENABLE_A20 and I8042_DISABLE_A20. BUG=chrome-os-partner:13119, BRANCH=None TEST=Tested on W7 installer. No KB error shown on EC console. Change-Id: I9ad1fd7baa10683ef18ccf13faf09dc0cefcca0a Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/34994 Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
* Add initial keyscan test and key matrixSimon Glass2012-11-012-0/+50
| | | | | | | | | | | | | | | | | | | | Add a few very basic tests and the required key matrix information. The key matrix is for snow, and the tests are just enough to exercise the feature. BUG=chrome-os-partner:12179 BRANCH=none TEST=manual for now: On snow: ./ectool keyscan 10000 key_sequence.txt See that the test passes. Change-Id: Ibe5a6fe5333102ba7f37be4b526185a48b3c1ae8 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/35120 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ectool: Add keyscan test featuresSimon Glass2012-11-014-2/+719
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a way of easily setting up keyscan tests using a simple text file format. The steps to run a test are as follows: - read the test file - read the key matrix information - translate the ascii characters from tests into keyscan codes - send the keyscan codes to the EC - tell the EC to start the test - wait for the required time, then collect what input we have received - check that the input matches the expected input BUG=chrome-os-partner:12179 BRANCH=none TEST=manual for now: On snow: ./ectool keyscan 10000 key_sequence.txt See that the test passes. Change-Id: I7de646205803a99443503a1b4bbf32f5fe89c534 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/35119 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Move reset/overheat/shutdown funcs to chipset interfaceRandall Spangler2012-11-018-90/+76
| | | | | | | | | | | | They're not x86-specific, so move to the chipset interface. BUG=chrome-os-partner:15579 BRANCH=none TEST=x86reset warm, then x86reset cold. Should reboot OS in each case. Change-Id: Ib571ab916bab16179198a0d054320e59afbae124 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36785
* Switch temp sensor polling to use hooks instead of taskRandall Spangler2012-11-0114-102/+59
| | | | | | | | | | | | | | This reduces memory / code size, and gets rid of ifdefs in temp_sensor.c. BUG=chrome-os-partner:15714 BRANCH=none TEST=boot system and run 'ectool temps all' every few seconds - ectool temps all The numbers should update over time. Change-Id: Idaac7e6e4cbc1d6689f5d3b607c623a5cc536a4f Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36940
* snow: fail battery command on unsupported systemRong Chang2012-11-011-0/+6
| | | | | | | | | | | | | | | | | GEC exports battery information to host via mapped memory. This change fails ectool battery command on unsupported system. Signed-off-by: Rong Chang <rongchang@chromium.org> BUG=chrome-os-partner:15272 BRANCH=none TEST=manual, type ectool battery under VT2 Change-Id: I260921eaa679cd3f20fc390472a7e7d64d181a7f Reviewed-on: https://gerrit.chromium.org/gerrit/37011 Commit-Ready: Rong Chang <rongchang@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* link: Fix overflow in hibernate time calculationRandall Spangler2012-11-012-1/+8
| | | | | | | | | | | | | | | | | | The time out value passed to task_wait_event() is signed 32-bit and thus waiting for 24 hours will cause overflow. Limit max wait time. BUG=chrome-os-partner:15797 BRANCH=link TEST=Disconnect AC, shut down system, and close lid. From ec console, do 'hibdelay 8000' and then wait 2.5 hours. EC should have hibernated. (8000 is more than twice the max time for task_wait_event()) Change-Id: I5fa505554182e8bad6399c12a382ff71bb123d8f Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/37095 Reviewed-by: Vic Yang <victoryang@chromium.org>
* link: Cold reboot should ignore WAKE# pinRandall Spangler2012-10-311-3/+10
| | | | | | | | | | | | | | | | | | | | | This fixes the EC not being able to do a cold reset while the power button is held down, because the power button asserts WAKE#. BUG=chrome-os-partner:15705 BRANCH=link TEST=manual - scope HIB# - hold down power button - from console, 'reboot cold' HIB# should stay asserted for 150ms. Before this fix, it asserted only briefly. Change-Id: I07c6bb5ee3f846544c75e7e0d4584f8434a9cd56 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/37090 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Puneet Kumar <puneetster@chromium.org>
* stm32: Implement keyscan test infrastructureSimon Glass2012-10-316-2/+273
| | | | | | | | | | | | | | | | | | | | | | | | Support the keyscan test functionality on stm32. Note: This is enabled by default so that it continues to build. But it is unlikely that we will want this in a shipping image. I suggest we add the facility for a dev build. Secondly, the stack has to be larger due to a printf (which admittedly I could just remove). Should we make the stack size conditional on the CONFIG? Seems a bit ugly, on the other hand we don't want to waste IRAM. BUG=chrome-os-partner:12179 BRANCH=none TEST=manual for now: On snow: ./ectool keyscan 20000 key_sequence.txt See that the test passes. Change-Id: Ic441ca0bde1be9589a924374605e2f146d16f423 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/35118
* Switch PWM to use HOOK_SECOND instead of its own taskRandall Spangler2012-10-3013-34/+24
| | | | | | | | | | | | | BUG=chrome-os-partner:15714 BRANCH=none TEST=taskinfo no longer shows PWM task, and 'ectool pwmgetfanrpm' updates as fan speed changes. Change-Id: Ia23f52527c40c8117238ddc2ee4c023f59eba05a Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36939 Reviewed-by: Simon Glass <sjg@chromium.org>
* Add per-second hookRandall Spangler2012-10-304-0/+16
| | | | | | | | | | | | | | | | | | | | | | PWM and temp sensor monitoring want to happen every second, vs. several times a second for watchdog and LPC. This is still considerably simpler than having tick functions declare an interval at which they want to be called, which would require a RAM-based array of pending tick functions and alarm times. If you need that level of complexity, you still need a task. BUG=chrome-os-partner:15714 BRANCH=none TEST=temporarily add HOOK_TICK and HOOK_SECOND hooks and see that on LM4, HOOK_TICK is called 4x a second and HOOK_SECOND is called every second. Change-Id: I5c09842fd356d3254021486949b2799142068b4f Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36938 Commit-Ready: Simon Glass <sjg@chromium.org>
* Watchdog is reloaded by HOOK_TICK, not its own taskRandall Spangler2012-10-3034-52/+42
| | | | | | | | | | | | | This reduces memory footprint. BUG=chrome-os-partner:15714 BRANCH=none TEST=system still boots; 'waitms 1500' prints watchdog error dump Change-Id: Ieb0248a34655514b03d919cc36c2b369691da716 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36937 Reviewed-by: Simon Glass <sjg@chromium.org>
* Rename power_button module to switchRandall Spangler2012-10-3019-72/+72
| | | | | | | | | | | | | | | Since it handles not just power button, but also lid switch, AC detect, and other switches. No functional changes; just renaming. BUG=chrome-os-partner:15579 BRANCH=none TEST=boot system, power on/off with power button Change-Id: I51628a52293f7207715f5f6bf368a08fe6c3dbce Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36821
* Clean up clock moduleRandall Spangler2012-10-304-69/+67
| | | | | | | | | | | | | | No functional changes; just code cleanup. On LM4 this also #ifdef's out the 'sleep' and 'pll' commands since they're big and we don't use them. BUG=chrome-os-partner:15579 BRANCH=none TEST=boot system Change-Id: I1b72d07d6cca2c783d7ac4c880119df3e88e356e Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36799
* Clean up GPIO module.Randall Spangler2012-10-305-81/+89
| | | | | | | | | | | | No functional changes, just code cleanup. BUG=chrome-os-partner:15579 BRANCH=none TEST=gpioget returns reasonable values Change-Id: I4301ccc68ade775f78f4ccd84710d2cd4bc25252 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36800
* Clean up jtag moduleRandall Spangler2012-10-304-15/+12
| | | | | | | | | | | | | No functional changes BUG=chrome-os-partner:15579 BRANCH=none TEST=boot system; use gdb to connect to EC Change-Id: I2817d04e4de102e4201506cfe51cdf0bd939fcdb Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36802 Reviewed-by: Simon Glass <sjg@chromium.org>
* Clean up LPC moduleRandall Spangler2012-10-302-93/+93
| | | | | | | | | | | | | Tidied comments, and removed handling of ACPI events on host command port (not needed since EVT hardware is now EOL'd). BUG=chrome-os-partner:15579 BRANCH=none TEST='ectool hello' succeeds Change-Id: I063382b9981f713ba23f7714b4ccb7faa957b411 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36804
* Clean up UART moduleRandall Spangler2012-10-305-114/+184
| | | | | | | | | | | | | | And change some direct uart_printf()/uart_puts() output to console output methods instead. Disable unused comxtest debug command. No other functional changes. BUG=chrome-os-partner:15579 BRANCH=none TEST=boot system; should still see debug output with reset flags Change-Id: I57fe6bb781a1ba7884afa6d090b74a92f45a53cc Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36835
* Switch LPC to use HOOK_TICK instead of taskRandall Spangler2012-10-302-11/+8
| | | | | | | | | | | | BUG=chrome-os-partner:15714 BRANCH=none TEST=taskinfo no longer shows LPC task Change-Id: I693cc8695d89d0207076f12d82bdc1f30d5df7b7 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36910 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Add tick taskRandall Spangler2012-10-3011-0/+34
| | | | | | | | | | | | | | | | | | | Adds a new HOOK_TICK event which is called every 250ms (LM4) or 500ms (STM32). This will be used to consolidate a number of tasks which do small amounts of work infrequently, and previously needed their own task functions. This CL adds the tick task; subsequent CLs will consolidate watchdog and other tasks into tick hooks. BUG=chrome-os-partner:15714 BRANCH=none TEST=taskinfo shows TICK task as lowest priority Change-Id: I9068ee99d56a5bf5c12afd86ad51998c013f4954 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36908 Reviewed-by: Simon Glass <sjg@chromium.org>
* Clean up power button moduleRandall Spangler2012-10-302-46/+76
| | | | | | | | | | | | | No functional changes BUG=chrome-os-partner:15579 BRANCH=none TEST=boot system, power off with power button, power on with power button Change-Id: I25aa5c527b7b9f9db6f5c539cecb37ac4bc197f8 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36820 Reviewed-by: Simon Glass <sjg@chromium.org>
* Disable scratchpad commandRandall Spangler2012-10-301-3/+2
| | | | | | | | | | | | | We don't use/need it right now, so reduce code size. BUG=chrome-os-partner:15579 BRANCH=none TEST=help; should not see scratchpad in list Change-Id: I7918882eee02d8c440c58a3ac6cba80acc3d2ac1 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36803 Reviewed-by: Simon Glass <sjg@chromium.org>
* Clean up ADC moduleRandall Spangler2012-10-307-104/+96
| | | | | | | | | | | | | | ADC config structs are now chip-specific; this saves code size (several hundred bytes on LM4, since no need for 24-entry ADC channel to GPIO mapping table). BUG=chrome-os-partner:15579 BRANCH=none TEST='adc' with system on and off; ChargerCurrent should be bigger when on. Change-Id: Ia88b3f043438bec049f2d2ad39fc42dcf86d9424 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36798
* Use SECOND and MSEC constantsRandall Spangler2012-10-2933-211/+231
| | | | | | | | | | | | | | | | | | We'd defined them in a number of different files. This moves definitions to timer.h, and uses them everywhere we have large delays (since 10*SECOND is less typo-prone than 10000000). Also add msleep() and sleep() inline functions. No need for mdelay() or delay(), since any delays that long should use sleep funcs instead of spin-waiting. BUG=chrome-os-partner:15579 BRANCH=none TEST=boot system; taskinfo displays similar numbers to before Change-Id: I2a92a9f10f46b6b7b6571759b1f8ab4ecfbf8259 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36726
* Clean up core routines - cpu, task, watchdogRandall Spangler2012-10-294-130/+185
| | | | | | | | | | | | No functional changes. BUG=chrome-os-partner:15579 BRANCH=none TEST=boot system Change-Id: I55cf9c60e92177fd441614a8f9fce2d3acca3d0e Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36706
* Rename POWERSTATE task to CHARGERRandall Spangler2012-10-295-5/+5
| | | | | | | | | | | | | Since POWERSTATE is confusing whether it refers to battery power or system power. BUG=chrome-os-partner:15579 BRANCH=none TEST=taskinfo; see CHARGER task Change-Id: I5a237b1329cace4ce48ae39d8954c08a9912ed4b Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36707
* Consolidate emergency debug outputRandall Spangler2012-10-297-182/+79
| | | | | | | | | | | | | | | | | | | This removes the duplicate uart_emergency_printf() vs. panic_printf() / uart_emergency_puts() vs. panic_puts() implementation and saves ~0.5kb of code size. The other significant change is that uart_flush_output() is now smart enough to determine if it's in an interrupt; if so, it will spin-flush the output buffer instead of waiting on the uart interrupt. This removes the need for a separate panic_flush(). BUG=chrome-os-partner:15579 BRANCH=none TEST=crash unaligned; should print well-formatted crash dump Change-Id: Ifae756203dd1881806be563308077c1d68302e1f Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36695
* Clean up thermal modulesRandall Spangler2012-10-268-153/+136
| | | | | | | | | | | | No functional changes. BUG=chrome-os-partner:15579 BRANCH=none TEST='temps' should print good temperatures Change-Id: I20bd2376b86f1e9d2f9a91016ed90bb933235021 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36611
* Clean up x86power moduleRandall Spangler2012-10-262-48/+43
| | | | | | | | | | | | | Code cleanup; no functional changes. BUG=chrome-os-partner:15579 BRANCH=none TEST=boot system to OS; should still boot Change-Id: Icbb628e60792cbecd073a526cd6f879d9e4b20ab Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36692 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Clean up a few modules in common/Randall Spangler2012-10-264-30/+43
| | | | | | | | | | | | | Just code cleanup; no functional changes BUG=chrome-os-partner:15579 BRANCH=none TEST=build link and snow Change-Id: Ib62f805777994b39cd9f47a721f52529bb9399c5 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36573 Reviewed-by: Simon Glass <sjg@chromium.org>
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