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* cr50: add functionality for ACVP tests of elliptic curve implementationstabilize-lazor-13278.B-cr50_stabVadim Sukhomlinov2020-06-052-144/+368
| | | | | | | | | | | | | | | | | | | | | | NIST ACVP test expects access to test point is on curve and verification of signature with arbitrary public key. Current implementation supported only fixed public key. ACVP tests to be submitted separately. Added two new test commands to support ACVP: - TEST_POINT - test that given point is on selected curve - TEST_VERIFY_ANY - same as TEST_VERIFY, but use provided Q - TEST_SIGN_ANY - same as TEST_SIGN, but use provided d (private key) BUG=b:138578319 TEST=make CRYPTO_TEST=1 BOARD=cr50 -j && test/tpm_test/tpmtest.py Change-Id: Ibeabede935f5bbac918b3043072e05f8a6417aa4 Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2227077 Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org> Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
* dcrypto/hmac: another fix for HMAC SHA256 computeVadim Sukhomlinov2020-06-051-1/+1
| | | | | | | | | | | | | | | | | | | | For long HMAC keys we should also compare length with SHA256 block size rather than size of opad. It updates previous patch. https://crrev.com/c/1850535 introduced change in LITE_HMAC_CTX structure which change size of opad field. HMAC computation was using sizeof(opad) instead of SHA256_BLOCK_SIZE and that caused incorrect values. BUG=b:158094716 TEST=make BOARD=cr50 CRYPTO_TEST=1 ; test/tpm_test/tpmtest.py Change-Id: I9c7d63ad3f1751b09b6968379082e875b3558bef Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2231962 Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org> Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
* ap_ro: add handling of the corrupted hashVadim Bendebury2020-06-054-2/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch closes the AP RO verification loop on the Cr50 side. If the check is triggered, the valid AP hash is found, and the RO contents is found to not match the hash, the Cr50 will - assert the EC reset; - set a flag to prevent the code from deasserting EC reset; - start a periodic hook to reassert EC reset in case the user hits power+refresh. This will prevent the Chrome OS device from booting. A new CLI command is being added to display the verification state. In developer images the new command would allow to clear the failure state, when running prod images the only way out of the failure state would be the powercycle. BUG=b:153764696 TEST=verified that erasing or programming AP RO hash when board ID is set is impossible. Verified proper shutdown in case AP RO has is present and the AP RO space is corrupted and recovery using the new cli command when running a dev image. Verified that 'ecrst off' properly reports the override. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I1029114126a9a79f80385af7bc8d5467738e04ca Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2218676 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* dcrypto/hmac: fix HMAC-SHA256 computationVadim Sukhomlinov2020-06-042-14/+19
| | | | | | | | | | | | | | | | | | https://crrev.com/c/1850535 introduced change in LITE_HMAC_CTX structure which change size of opad field. HMAC computation was using sizeof(opad) instead of SHA256_BLOCK_SIZE and that caused incorrect values. BUG=b:158094716 TEST=make BOARD=cr50 CRYPTO_TEST=1 ; test/tpm_test/tpmtest.py or rfc6979 and hmac_drbg in Cr50 console. Change-Id: I58c166381b9f95f02f9f0c26a04a88e552d8057f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2229280 Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Commit-Queue: Vadim Bendebury <vbendeb@chromium.org> Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
* tpmtest/ftdi: improved stability and support for ISERIALVadim Sukhomlinov2020-06-042-4/+11
| | | | | | | | | | | | | | | | | | | | | FTDI module used by tpmtest has stability issues, causing unstable connection, which seemed to be dependent on setup delay. increased delay to make it more stable. Also, FTDI don't work correctly with multiple Ultradebug interfaces. Make it use ISERIAL env variable if configured to guide interface choice. BUG=None TEST=make Change-Id: Ifa27aac7ef42a8eb990963fa0cf1923a7405f0c7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2226139 Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org> Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org> Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
* tpm_test: update to swig 4.0 for Python3 supportVadim Sukhomlinov2020-06-032-3/+5
| | | | | | | | | | | | | | | | | | You may need to do 'sudo emerge swig' to get latest swig installed. Python3 differentiates between string and bytes, so need proper handling. BUG=None TEST=cd test/tpm_test && make Change-Id: I6e09258a1f6a3fb2923760f446a2ff911e871b40 Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2222978 Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Commit-Queue: Vadim Bendebury <vbendeb@chromium.org> Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
* remove eraseflashinfo from DBG imagesMary Ruthven2020-06-021-56/+0
| | | | | | | | | | BUG=b:158019009 TEST=make -j BOARD=cr50 CR50_DEV=1 Change-Id: If9554fcf499fb08b301d6f58764e9a4983b6884b Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2227075 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* remove CR50_SQAMary Ruthven2020-06-0212-78/+16
| | | | | | | | | | | | | | | | | | | | | | | SQA images won't be built anymore. This change removes the SQA support. It deletes all SQA ifdefs and replaces CR50_RELAXED with CR50_DEV. BUG=b:158011401 TEST=manual build regular image and check eraselfashinfo and rollback aren't included. build image with CR50_SQA=1 and check it's no different than the regular image. build DBG image and make sure it still starts open, it has the eraseflashinfo and rollback commands, and it can flash old cr50 images. Change-Id: I5e94c88b1903cfcf0eee0081fc871e55fc8586c7 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2227149 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* fizz: remove board from cr50_stabVadim Bendebury2020-06-0264-22638/+0
| | | | | | | | | | | | | | | | Not sure why this board was kept in, probably because fizz was mixed up with fuzz. BUG=none TEST='make buildall -j' succeeds Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I4b08333d12bdfe8001b7e1c2b7c5860aef947a22 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2227168 Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org>
* cr50: Fix fuzzer build for protobuf 3.11.4Allen Webb2020-06-021-1/+0
| | | | | | | | | | | | | | | | This removes a define that was needed for protobuf 3.7.0 that is no longer needed. BUG=chromium:1090402 TEST=USE='asan fuzzer' ./build_packages --board=amd64-generic --skip_chroot_upgrade chromeos-cr50-dev Change-Id: I0779485fe8d522e0a261e2d87b6a9bc1eacfbcc0 Signed-off-by: Allen Webb <allenwebb@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2225949 Reviewed-by: Manoj Gupta <manojgupta@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Manoj Gupta <manojgupta@chromium.org>
* cr50: Add support for ACVP tests of HMAC implementationsVadim Sukhomlinov2020-06-022-59/+184
| | | | | | | | | | | | | | | | | | | | | | | | | In order to support NIST ACVP testing, new commands to provide access to HMAC implementations (software, and hardware accelerated HMAC SHA-256) with CRYPTO_TEST_SETUP added: - Software HMAC (_cpri_StartHMAC) TPM implementation - dcrypto HMAC (DCRYPTO_HMAC_SHA256_init) Updated hash_test.py to support different hash algorithms for hash and HMAC, added HMAC tests. BRANCH=cr50 TEST=make BOARD=cr50 CRYPTO_TEST=1 -j && test/tpm_test/tpmtest.py BUG=b:138578319 Change-Id: I57da2f27734fc7e5dbc896d75c5f8b2ed60e3b18 Signed-off-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1854885 Reviewed-by: Gurleen Grewal <gurleengrewal@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Gurleen Grewal <gurleengrewal@google.com> (cherry picked from commit 32c349afe72541570984a32bd85b8f1fcf2acb39) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2227074 Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
* tpmtest: added more corner case, make it work again with OpenSSL 1.1Vadim Sukhomlinov2020-06-022-34/+315
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TPM test directory has bitrotted and does not compile any more, leave alone pass tests. This patch updates the tests to match changed EC codebase: test/tpm_test/Makefile - look for include files in more directories test/tpm_test/bn_test.c - 1. add support for OpenSSL 1.1 where BIGNUM structure became opaque and require special functions to access it. 2. added backward compatibility layer for OpenSSL 1.0.2 3. fixed issues with OpenSSL memory allocations 4. added support to print details of failure 5. added more cases for modulo inverse testing 6. added testing for bn_div to increase branch coverage BRANCH=cr50 BUG=none TEST=./test/tpm_test (../../build/tpm_test/bn_test) now passes Change-Id: Ida5fb07277909977f78ad1199e7a0f3677aabdc3 Signed-off-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1764711 Reviewed-by: Andrey Pronin <apronin@chromium.org> Commit-Queue: Andrey Pronin <apronin@chromium.org> (cherry picked from commit fb1d26a58e5511d70f747e8b943096c22dead07c) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2223147 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* Introduce BOARD_CFG_LONG_INT_AP_BIT in TPM_BOARD_CFG registerNamyoon Woo2020-06-014-14/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch assigns the bit offset 0 in TPM_BOARD_CFG register to indicate the status of INT_AP_L extension. The bit 1 means INT_AP_L pulse extension is activated, and 0 means it is not. BUG=b:148691139 TEST=tested on atlas and on careena. 1. Checked the default TPM_BOARD_CFG (PWRDN_SCRATCH21) value was zero and the INT_AP_L assertion duration was 4~10 microseconds. > md 0x400000f4 1 // memory dump on GC_PMU_PWRDN_SCRATCH21 400000F4: 0x00000000 2. Attempted to change the board configuration (with a hacked UART command.). The register value was unchanged. > brdcfg 0x01 TPM_BOARD_CFG = 0x00000000 > md 0x400000f4 1 400000F4: 0x00000000 3. Forced to write the board configuration with a hacked UART command. The register value was changed. > brdcfg 0x01 force TPM_BOARD_CFG = 0x80000001 > md 0x400000f4 1 400000F4: 0x80000001 4. Checked the INT_AP_L assertion duration extended to 110 microseconds or longer. 5. After cr50 deep sleep, checked the pulse duration was still extended. - turned AP off. - disconnected Suzy-Qable. - waited three seconds - connected Suzy-Qable, and checked the reset cause was 'hibernate rbox'. > md 0x400000f4 1 400000F4: 0x8000001 6. With 100 usec long INT_AP pulse, checked trunks_cliend regression_test, stress_test and ext_command_test runs good. Checked dmesg and found no TPM errors through all tests. (ap) $ trunks_client --regression_test (ap) $ trunks_client --stress_test (ap) $ trunks_client --ext_command_test 7.checked no character loss during uart_stress_tester. (chroot) $ uart_stress_tester.py -c -t 600 /dev/ttyUSB2 /dev/ttyUSB1 8. the shortest duration of INT_AP_L assertion and deassertion observed in logic analyzer were 110 usec and 152 usec. 9. measured the depthcharge exit timestamp and cr50 flash time with or without INT_AP pulse extended to 100 usec, on atlas and helios: -----------------+-------------------+------------------ | atlas | helios -----------------+-------------------+------------------ boot (sec) | 1.398 -> 1.402 | 1.004 -> 1.011 cr50 flash (sec) | 10.800 -> 14.609 | 16.024 -> 16.466 -----------------+-------------------+------------------ Signed-off-by: Namyoon Woo <namyoon@google.com> Change-Id: I2b9f9defb63cf05f9d91b741ccb4b49c4c6bc8e2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2202839 Tested-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Namyoon Woo <namyoon@chromium.org>
* Introduce TPM_BOARD_CFG registerNamyoon Woo2020-06-016-1/+81
| | | | | | | | | | | | | | | | | | This patch adds the TPM vendor-defined register, TPM_BOARD_CFG, which indicates the board configuration status. This register is attributed as one-time-programmable and the value is maintained across deep sleeps. Cr50 allows a write on this register right after a cr50 reset until it receives a TPM2_PCR_Extend command. BUG=b:148691139 TEST=none Signed-off-by: Namyoon Woo <namyoon@google.com> Change-Id: I89ae5a53c15990ef78812aec5da81a59f04d7d98 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2202838 Tested-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Namyoon Woo <namyoon@chromium.org>
* apply INT_AP_L extension on I2CS interfaceNamyoon Woo2020-05-293-13/+46
| | | | | | | | | | | | | | | | This patch applies INT_AP_L extension on I2CS. It uses GPIO_MONITOR_I2CS_SDA to detect a transaction start during INT_AP_L assertion and to deassert INT_AP_L. BUG=b:148691139 TEST=None Signed-off-by: Namyoon Woo <namyoon@google.com> Change-Id: Iedd59b488dfdfaaf71dd71eda6437f1a9402d3c4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2150517 Tested-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Namyoon Woo <namyoon@chromium.org>
* Use a long pulse of INT_AP_L for SPSNamyoon Woo2020-05-294-8/+241
| | | | | | | | | | | | | | | | | | | | This patch adds a feature to extend each level of GPIO_INT_AP_L at least for 100 microseconds. The assertion (low GPIO_INT_AP_L) duration might be shorter only if AP asserts a SPS CS before INT_AP_L deassertion, because it means means AP recognized GPIO_INT_AP_L assertion already. This patch increases the flash usage by 280 bytes. BUG=b:148691139 TEST=None Signed-off-by: Namyoon Woo <namyoon@google.com> Change-Id: Ie74b236bc5352e9fc21fe600c12946e50955160a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2114430 Tested-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Namyoon Woo <namyoon@chromium.org>
* gsctool: add option to erase AP RO hashVadim Bendebury2020-05-291-3/+55
| | | | | | | | | | | | | | | | | | | The new option triggers sending the VENDOR_CC_SEED_AP_RO_CHECK vendor command with the empty payload. The Cr50 response indicates if the erase succeeded or there were problems (either board ID space not erased, or flash erase operation failed). BUG=b:153764696 TEST=verified successful erase of the AP RO flash space on devices with empty board ID space, and failure to erase in case board ID space is programmed with the appropriate error message. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I4b7c981323771b73a837e766bd5e94e3824e8e00 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2204976 Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* ap_ro_integrity_check: move error codes enum into the .h fileVadim Bendebury2020-05-292-12/+15
| | | | | | | | | | | | | | This is a no-op change which will make it easier to have gsctool report sensible errors in case attempts to erase AP RO hash space fail. BUG=b:153764696 TEST='make buildall -j' succeeds Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: Iad396a52439ac7e4377f1dc983f00e976fabd8ad Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2207791 Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* ap_ro_integrity_check: allow gsctool erasing AP RO hashVadim Bendebury2020-05-291-7/+36
| | | | | | | | | | | | | | | | | | | | | | | This patch extends the VENDOR_CC_SEED_AP_RO_CHECK handler to erase the AP RO hash space if two requirements are met: - the vendor command payload is empty - the board ID space in INFO1 is not programmed Also, after this patch it would be impossible to program the AP RO hash if the Board ID INFO1 field is set. This will prevent attempts to write the hash by the users of existing devices. BUG=b:153764696 TEST=after expanding gsctool was able to verify AP RO hash space erase when allowed. Was able to write the hash when board ID space is uninitialized, and was not able to write the hash when the Board ID space is set. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I0d2409cb0a97bf98f52e7f10fd41660305638122 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2204975 Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* close RO window after useVadim Bendebury2020-05-295-8/+38
| | | | | | | | | | | | | | | | | | | | The code opening the RO windows to make it possible to update or enable the RO images, leaves the window open, allowing subsequent writes into the RO space. It has been acceptable until now, because RO updates are usually followed up by reboots. With introduction of the AP RO hash, there is a need to close the window (specifically, disable write access) when not in use. This patch adds a function for that and uses the new function everywhere where flash_open_ro_window() is called. BUG=b:153764696 TEST=verified successful Cr50 RO and AP RO hash updates. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: Ia595e5c7ce0beb1a67ef3513117984d18655a60c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2204973 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* ap_ro_integrity_check: don't ignore flash write return valuesVadim Bendebury2020-05-291-4/+12
| | | | | | | | | | | | | | Let's make sure that should there be an error during flash write operation saving the AP hash information, the error gets reported to the AP in the VC response. BUG=b:153764696 TEST='make buildall -j' Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: Idf9f8d267cae923909c2afc777b95bb2c7b638b3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2202955 Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* ap RO verification: enable loggingVadim Bendebury2020-05-294-4/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When AP RO verification is attempted, a lot of thing could go wrong, and the operator would usually have very little insight into what's happening unless there is a terminal connected to the Cr50 console. This patch adds a new log event for registering the AP RO verification progress. The event payload is a single byte value, logging the following events: 0 - refresh key press is detected 1 - power button has been released before AP RO check was triggered 2 - trigger sequence timeout (refresh button not pressed in time) 3 - AP RO check triggered 4 - could not run the check, hash space not programmed 5 - could not run the check, hash space corrupted 6 - AP RO verification failed 7 - AP RO verification succeeded BUG=b:153764696 TEST=verified logging during various AP RO verification attempts: $ gsctool -a -L Log time zone is PST Dec 31 69 16:00:01 : 00 May 06 20 21:20:49 : 09 01 May 06 20 21:21:53 : 09 00 May 06 20 21:21:54 : 09 00 May 06 20 21:21:55 : 09 03 May 06 20 21:21:56 : 09 07 May 06 20 21:23:03 : 09 00 May 06 20 21:23:04 : 09 00 May 06 20 21:23:05 : 09 02 May 07 20 11:21:52 : 09 00 May 07 20 11:21:53 : 09 00 May 07 20 11:21:54 : 09 01 May 08 20 11:57:21 : 09 00 May 08 20 11:57:22 : 09 00 May 08 20 11:57:23 : 09 03 May 08 20 11:57:24 : 09 04 May 08 20 12:07:15 : 09 00 May 08 20 12:07:16 : 09 00 May 08 20 12:07:17 : 09 03 May 08 20 12:07:19 : 09 07 May 08 20 12:09:20 : 09 00 May 08 20 12:09:21 : 09 00 May 08 20 12:09:22 : 09 03 May 08 20 12:09:23 : 09 06 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I739f9dbb2e7b8fc87601d61e1f87eb49d85bdf14 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191283 Reviewed-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* ap_ro_verification: enable AP RO verification supportVadim Bendebury2020-05-291-0/+2
| | | | | | | | | | | | | | | | | | This patch flips on the switch for the AP RO verification implementation. BUG=b:153764696 TEST=generated AP integrity verification data using the ap_ro_hash.py script and then ran the verification procedure, observing the 'hash match' message on the Cr50 console. Also verified that the Open Box RMA procedure still succeeds. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I15f19aefcb11a055e66994e33976b98ce6fdf099 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2220829 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* Plug in the AP RO verification implementationVadim Bendebury2020-05-295-3/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | This adds plumbing necessary to invoke the AP RO verification function in response to the operator entering the 'magic sequence' of holding the power button pressed and pressing/releasing the refresh button three times within five seconds. The code used during the 'Open box RMA' verification process is used, with the physical presence confirmation phase bypassed. This patch also makes sure that attempts to use CCD to program AP or EC flash while AP RO verification is in progress would fail. BUG=b:153764696, b:154966209 TEST=with the next patch applied, generated AP integrity verification data using the ap_ro_hash.py script and then ran the verification procedure, observing the 'hash match' message on the Cr50 console. Also verified that the Open Box RMA procedure still succeeds. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: Ic101fb892554ebb05f9ebe6d1546bfb439f74043 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2171399 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* cr50_rma_open: fix version checkMary Ruthven2020-05-281-6/+6
| | | | | | | | | | | | | BUG=none BRANCH=none TEST=script works with a cr50 running 0.6.2 Change-Id: I14cfd8d90bff40843493d22576307421524d3350 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2207571 Reviewed-by: Wai-Hong Tam <waihong@google.com> (cherry picked from commit be7c49d46cd1e8b94be5ce7b3752ec6f4a04223d) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2218678
* cr50_rma_open: raise an error if cr50 is too oldMary Ruthven2020-05-281-2/+2
| | | | | | | | | | | | | | | | At this point images with testlab support are available. Fail if cr50 is running a prod image that is too old. BUG=none BRANCH=none TEST=none Change-Id: I096502417c4a44b4a2f458a2a5601de2d154d5cf Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2207572 Reviewed-by: Wai-Hong Tam <waihong@google.com> (cherry picked from commit 26dfe4442eb06ef1c3e60b47fbf2065c095de824) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2218679
* Add AP RO integrity check implementation.Vadim Bendebury2020-05-225-2/+300
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds code which accepts the vendor command communicating the list of the AP firmware sections to verify and the expected cumulative sha256 sum value of the sections. The vendor command payload is checked for sanity: each range offset is not expected to exceed 32M bytes (the largest possible SPI flash size) and each size is not expected to exceed 4M bytes. If any inconsistencies are found in the payload, or the flash integrity space is already programmed, an error is returned to the AP. It the command validity check succeeds, the payload of the vendor command is prepended by a header including the number of the flash regions to check and a 4 byte checksum of the stored information. This combined information is stored in the dedicated H1 flash space, specifically the RO_B region, at offset of 0x3000, 2K bytes page below the region used for the flash log. The valid RO range in upgrade_fw.c:set_valid_sections() is modified to prevent erasing of the AP RO hash value during Cr50 RO updates. The new file also introduces a function used to verify the AP flash when requested. The returned value indicates one of three conditions: - valid verification information not found - AP flash integrity verification failed - AP flash integrity verification succeeded A new console command allows to examine the contents of the space where the list of ranges and the sum are stored. CR50_DEV builds also allow to erase the page. BUG=b:153764696 TEST=with the rest of the patches applied verified successful execution of the AP RO verification sequence. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I1894ef897a86e9d60b9f5bcff3a680f632239e1b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2171398 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* board_id: refactor to expose function checking INFO1 board ID spaceVadim Bendebury2020-05-203-19/+27
| | | | | | | | | | | | | This patch makes it possible to check if the INFO1 Board ID space is programmed or not. BUG=b:153764696 TEST='make buildall -j' Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: Ic771956a08e276c2e1a426729a8ecdae3f86a04f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2204974 Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* ap_ro_flash.py: add new values and clean upVadim Bendebury2020-05-201-7/+12
| | | | | | | | | | | | | | | Add new error values reported by the VENDOR_CC_SEED_AP_RO_CHECK vendor command, and clean up the command line error processing to report all collected errors instead of just complaining that the ranges were not specified in the command line. BUG=b:153764696 TEST=used the script and observed expected error values reported. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I0f5e6a28776af2afc550bd2c44e6cc3a0cb80153 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2204977 Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* usb_spi: refactor to allow use in different contextsstabilize-quickfix-13099.93.B-cr50_stabstabilize-13099.94.B-cr50_stabstabilize-13099.90.B-cr50_stabstabilize-13099.85.B-cr50_stabstabilize-13099.73.B-cr50_stabstabilize-13099.72.B-cr50_stabstabilize-13099.70.B-cr50_stabstabilize-13099.118.B-cr50_stabstabilize-13099.110.B-cr50_stabstabilize-13099.101.B-cr50_stabrelease-R84-13099.B-cr50_stabVadim Bendebury2020-05-143-33/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The code which allows to read a section of AP or EC flash and calculate the section's SHA256 sum does not allow calculating the sum over multiple non-adjacent flash areas. This patch changes the implementation to allow calculations over more than one region. Initialization, calculation and reporting of the result become three separate API entries. The loop counting the number of the read flash chunks, is being simplified, a watchdog kick added to the brief loop interruptions, as it turns out that sleeping alone is not enough to prevent watchdog expiration when calculating hash over large SPI flash ranges. Also simplified prototypes for usb_spi_board_enable() and usb_spi_board_disable(). BUG=b:153764696 TEST=created an RO descriptor for the Atlas DUT and verified that 'gsctool -O' succeeds. Cq-Depend: chrome-internal:2939596 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: Iec7b8634c7c80ebc7600c5b708879eb322bc7fec Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2163569 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* crypto_api: use const voidVadim Bendebury2020-05-146-17/+16
| | | | | | | | | | | | | | | | | | | This is a minor API clean up, it is not entirely clear why const void pointers were not used originally, but using this type for input data (and void pointer for output) makes interfacing with the library much easier. Also modified cases where the first parameter of DCRYPTO_SHA1_hash() was typecasted unnecessarily. BUG=none TEST=make buildall succeeds, Cr50 image supports booting a Chrome OS device just fine. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: Ic8a670aa7b26598ea323182845c184b7f1d715a1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2163568 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* ap_ro_hash.py: improve error processing and help messagesVadim Bendebury2020-05-141-5/+30
| | | | | | | | | | | | | | | | | | | | This patch adds processing of the case when the Cr50 does not support the vendor command setting the AP RO areas hash. Also improve help message and include text descriptions of the encountered errors, if any. BUG=b:153764696 TEST=with the rest of the patches applied verified that programming of the AP RO verification space succeeds when expected, and proper errors are reported in case of failure. ./util/test_ap_ro_hash.py also still succeeds. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: Ie3898ef5ab925404decd730f457267615c9ab39c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2171397 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* make cr50 agnostic about EC-EFS2Namyoon Woo2020-05-143-21/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes cr50 respond EC-EFS2 related TPM commands no matter it has the board property, BOARD_EC_CR50_COMM_SUPPORT or not. board_has_ec_cr50_comm_support() calls remain for configuring GPIO_EC_PACKET_MODE_EN only. BUG=b:155214584 TEST=checked gsctool running on Coral. [before] $ gsctool --getbootmode finding_device 18d1:5014 Found device. found interface 3 endpoint 4, chunk_len 64 READY ------- Error 8 in Getting boot mode [after] $ gsctool --getbootmode finding_device 18d1:5014 Found device. found interface 3 endpoint 4, chunk_len 64 READY ------- Boot mode = 0x00: NORMAL Also checked 'ec_comm' uart command. [before] > ec_comm No EC-CR50 comm support Invalid argument Usage: ec_comm [corrupt] [after] > ec_comm uart : 0xff packet mode : DISABLED phase : 0 preamble_count : 0 bytes_received : 0 bytes_expected : 0 response : 0x0000 ec_hash : UNLOADED <-- It is marked as unloaded, secdata_error_code : 0x00001203 <-- because of NVMEM error. boot_mode : NORMAL <-- Still, boot_mode is normal. Signed-off-by: Namyoon Woo <namyoon@google.com> Change-Id: I08dc9abd8f194c83484b5be9b0a5e8844b2fd221 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2185872 Tested-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Namyoon Woo <namyoon@chromium.org>
* gsctool: print sensible date when listing flash log contentsVadim Bendebury2020-05-111-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | Displaying epoch values in the flash log entries does not help the end user to synchronize the flash log events with other logs generated on the device. This patch changes the log output format to display the device time zone in the first line and then all present log entries with timestamp in 'dd:mm:yy hh:mm:ss' format. BUG=b:153764696 TEST=ran the new gsctool image on a Chrome OS device: $ gsctool -a -L Log time zone is PST Dec 31 69 16:00:01 : 00 May 06 20 21:20:41 : 09 01 ... May 08 20 12:09:21 : 09 00 May 08 20 12:09:22 : 09 03 May 08 20 12:09:23 : 09 06 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I3fca12e1679fbdd9e0e168606014e84c89c42402 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191282 Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* cr50: prepare to release 0.{5,6}.4Mary Ruthven2020-05-082-2/+2
| | | | | | | | | | BUG=none TEST=none Change-Id: Idc983499980c0211d29767bb9dfad6caac99dc00 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2189617 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* idle: reduce set of idle command actionsMary Ruthven2020-05-081-9/+7
| | | | | | | | | | | | | Remove 'deep sleep' and 'invalid' idle actions from the idle console command. BUG=b:156032428 TEST='idle s' and 'idle w' work when the console is open. Change-Id: I9da2fa0d679ef89ecb2eaaad82541bd3e9e16140 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2189616 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* cr50: prepare to release 0.{5,6}.3Mary Ruthven2020-05-042-2/+2
| | | | | | | | | | BUG=none TEST=none Change-Id: I33ad7debedb98f8ff90b4e8eaff96e25c73da4cd Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2180880 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* util: script for generating RO hashesVadim Bendebury2020-05-042-0/+867
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This python script will be run in a Chrome OS factory image, with limited availability of chromite libraries. The command line parameters of the script are a set of AP firmware address ranges and FMAP section names. The script does the following: - use flashrom to read the FMAP area from the AP flash and dump_fmap to generate the flash map description. - verify that section names passed in as parameters (if any) are indeed are present in the flash map. - verify that all passed in ranges and sections fit into the WP_RO area of the flash (as defined if the flash map). - prepare a layout file to instruct flashrom to read only the sections of interest (as defined by ranges and section names passed in the command line). - use flashrom again to read the required sections of the AP flash into a file. - read the file and and pass the required sections through the sha256 hash calculation. - prepare the Cr50 vendor command to pass information about the flash ranges and the sha256 sum to Cr50 and send the command. A unit test is also being added. BUG=b:153764696 TEST=./util/test_ap_ro_hash.py succeeds. with the rest of the patches added end to end AP RO verification procedure also succeeds. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: Ic0fa3759b3a32db8cf521be28c3c7dfe0cd35278 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2161576 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* sps: do not generate AP_INT_L pulse until controller is readyVadim Bendebury2020-05-041-19/+32
| | | | | | | | | | | | | | | | | | | The recent interrupt pulse extension brought to fore an old bug where the AP_INT_L pulse is generated by the SPS driver before the controller is actually ready to accept the next SPI frame. This patch rearranges the code to make sure that the pulse is generated after all controller clean up. BUG=b:154458891 TEST=verified that Atlas device is still booting fine. Will test it on other devices which seemed to be triggering the bug. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I480760b4afea24295f96abde2fc75c414017c27f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2171452 Reviewed-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org>
* cr50: prepare to release 0.{5,6}.2stabilize-13070.B-cr50_stabMary Ruthven2020-04-282-2/+2
| | | | | | | | | | BUG=none TEST=none Change-Id: Ic84368d12832dc5bb08d7085090ad727130c3114 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2171517 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* fix to set the TPM VC response size as zero on error casesNamyoon Woo2020-04-281-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes cr50 to set the TPM VC response size as zero before it returns an error code upon VENDOR_CC_GET_BOOT_MODE or VENDOR_CC_RESET_EC. BUG=b:155214584 TEST=ran 'gsctool --getbootmode' on atlas where the board property does not contain BOARD_EC_CR50_COMM_SUPPORT. [cr50] > brdprop properties = 0x1041 [Before the fix] $ gsctool --getbootmode finding_device 18d1:5014 Found device. found interface 3 endpoint 4, chunk_len 64 READY ------- ../../util/usb_if.c:209, libusb_bulk_transfer returned -8 (Overflow) [After the fix] $ gsctool -g finding_device 18d1:5014 Found device. found interface 3 endpoint 4, chunk_len 64 READY ------- Error 8 in Getting boot mode Signed-off-by: Namyoon Woo <namyoon@google.com> Change-Id: Ic1d9b261415487f0a3a0690e6090cbb5387ddd64 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2171167 Tested-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Namyoon Woo <namyoon@chromium.org>
* .pylintrc: update list of suppressed messagesVadim Bendebury2020-04-231-10/+11
| | | | | | | | | | | | | | | | | | | This patch sorts the list of the suppressed messages alphanumerically and adds 'missing-print-function' to the list, as this error does not apply to Python3. BUG=none TEST=linter error message R: 1, 0: Missing "from __future__ import print_function... is not reported any more, the rest of the linter output did not change. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: Ie97d88fcecfa70a89323d9122c3781e3da23f533 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2161575 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* ec: Convert comments to C-styleLouis Collard2020-04-151-48/+52
| | | | | | | | | | | | BUG=b:123686979 TEST=make buildall -j Change-Id: I1fc49f44c6f1be3bcacb26662862cb68899be299 Signed-off-by: Louis Collard <louiscollard@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2102092 Tested-by: Leo Lai <cylai@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Leo Lai <cylai@google.com>
* ec: Remove typedefs from u2f.hLouis Collard2020-04-152-37/+38
| | | | | | | | | | | | | | BUG=b:123686979 TEST=make buildall -j Cq-Depend: chromium:2051792 Signed-off-by: Louis Collard <louiscollard@chromium.org> Change-Id: I9558ebcf5a83ae8a422a43b776147bececea70ba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2102091 Tested-by: Leo Lai <cylai@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org> Commit-Queue: Leo Lai <cylai@google.com>
* ec: Run clang-format on u2f.cLouis Collard2020-04-151-30/+21
| | | | | | | | | | | | | | Also replaces uses of 'unsigned' with 'unsigned int' BUG=b:123686979 TEST=make buildall -j Change-Id: I2c7a861540f4ca3491b78f0c87e77ed01f57f0a0 Signed-off-by: Louis Collard <louiscollard@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2102090 Tested-by: Leo Lai <cylai@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Leo Lai <cylai@google.com>
* ec: Run clang-format on u2f.hLouis Collard2020-04-151-53/+53
| | | | | | | | | | | | BUG=b:123686979 TEST=make buildall -j Signed-off-by: Louis Collard <louiscollard@chromium.org> Change-Id: I646483719d5b97bf9622bbdd2f78ec3dce995d4a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2102089 Tested-by: Leo Lai <cylai@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Leo Lai <cylai@google.com>
* gsctool: supprot enabling write protection (WP)Vadim Bendebury2020-04-141-13/+39
| | | | | | | | | | | | | | | | This patch makes use of the modification of the vendor command VENDOR_CC_WP, which allows to enable WP. BUG=b:153881773 TEST=verified that attempts to enable WP when running the unmodified Cr50 image fail with error message "Early Cr50 versions do not support setting WP", and that the updated Cr50 image allows to enable WP using 'gsctool -a -w enable' Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: Ie28c1c9b171dd6ea2e3edc0ae624f953cb4fa4fe Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2149526 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* VENDOR_CC_WP: allow to enable write protection (WP)Vadim Bendebury2020-04-142-1/+17
| | | | | | | | | | | | | | | | | | | | | | | The gsctool utility allows to examine the device WP status, but does not allow to set it. It would be useful to provide the user with a means of enabling WP at any time. This patch extends the existing vendor command VENDOR_CC_WP implementation to allow an optional one byte parameter. If the parameter is present, the Cr50 will unconditionally invoke set_wp_state(1) when processing the command. BUG=b:153881773 TEST=with the corresponding gsctool.c changes coming up in the next patch verified that attempts to enable WP when running the unmodified Cr50 image fail with error message "Early Cr50 versions do not support setting WP", and that the updated Cr50 image allows to enable WP using 'gsctool -a -w enable' Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I75c200bbb9085e9f74c227ef80f782defdaaa29e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2149519 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* Implement sequence for detecting trigger for AP RO verificationVadim Bendebury2020-04-132-0/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When supported, the AP RO verification would be triggered by the operator pressing and keeping pressed the power button and then pressing and releasing a few times the refresh key. As proposed in this patch, to trigger the verification the operator must complete the sequence within 3 seconds by pressing the refresh key three times. The sequences is controlled by periodic polling. Enabling refresh key press interrupts was investigated, the issue is that the key generates plenty of interrupts due to dribbling, to the tune of a hundred each time it is pressed. It is much cheaper to just poll every 20 ms. The CONFIG_AP_RO_VERIFICATION config flag controls enabling of this feature. BUG=b:141191727 TEST=enabled the new feature and verified proper operation by both detecting the trigger and abandoning the sequence due to released power button or not enough times pressed refresh key. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I55376a87009d6f8020358ad11db1e47d0b8393ed Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2144944 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* Add a sw flag to indicate usb_i2c statusNamyoon Woo2020-04-091-7/+6
| | | | | | | | | | | | | | | Cr50 used to read GPIO_EN_PP3300_INA_L value to detect if USB_I2C is enabled. However it requires an external pullup. Instead, this patch adds a sw flag to indicate USB_I2C status, so that it can keep USB_I2C status regardless external HW factors. BUG=b:152946978 TEST=ran flash_ec on waddledee, ampton, and dragonegg. Signed-off-by: Namyoon Woo <namyoon@chromium.org> Change-Id: Ie1a3a8c790e9643a3b49b6c519167ee3bdecc650 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2140535 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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