| Commit message (Collapse) | Author | Age | Files | Lines |
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The console command "sleepmask" refers to another, nonexistant
command, "dsleepmask". We shouldn't refer people to look for
things that don't exist.
BUG=none
BRANCH=none
TEST=make buildall
Before:
> help sleepmask
Usage: sleepmask [ on | off | <sleep_mask>]
Display/force sleep mask.
See also 'dsleepmask'.
>
After:
> help sleepmask
Usage: sleepmask [ on | off | <sleep_mask>]
Display/force sleep mask
>
Change-Id: Ia95b48fc1e27315895e431b88ab39179a08d34cf
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/376078
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Addition to 4523735d: We can use the BMI160 internal FIFO, so set only
the Lid accel in forced mode.
Set EC rate for BMI160 accel as needed.
BRANCH=kevin
BUG=b:27849483
TEST=Check sensor parameters with accelrate. Check rotation is working.
Change-Id: I86f50e019db25837894036c4f27b255a65d2f894
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/374918
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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BUG=none
BRANCH=none
TEST=make buildall
Before:
> help test_rdd
Usage: test_rdd
>
After:
> help test_rdd
Usage: test_rdd
Fake an RDD-detected interrupt
>
Change-Id: I41bcc6c642bcad6577834e81436be712324ae64d
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/376098
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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This reverts commit d0383d88146e19c64230670aa6769528e5228c76.
Change-Id: I76cac7902b0cd25300393efcf205cdbe9ade82c0
Reviewed-on: https://chromium-review.googlesource.com/376132
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
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Add API to switch the Rp pull-up value on CC dynamically at runtime.
This is a preparatory work for boards having a more complex maximum
source current policy (eg 2 ports sharing a common pool of power).
For fusb302, update the voltage thresholds for open/Rd/Ra as they depend
on the Rp (was missing from the previous change).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:56110
TEST=make buildall
Change-Id: Id3c24a31a16217075a398ec21ef58ee07187a882
Reviewed-on: https://chromium-review.googlesource.com/373501
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Cr50 needs to connect to the AP phy when not in ccd so cr50 can be
updated and used as a gnubby. This change uses the strapping options
to detect when it is on reef and modifies the ccd behavior to
initialize usb on the AP phy when ccd is disabled. On gru the cr50
behavior is unchanged.
In RDD this change removes the checks that the current_map is the
correct one based on the detected debug state. rdd_init calls
rdd_interrupt to set up the usb and ccd state correctly. Having that
check prevents that initial rdd_interrupt from calling rdd_detached.
Before rdd_detached just disabled usb and we knew during init it
would already be disabled. Now we want to make sure it is called if a
debug accessory is not attached to initialize usb on the AP PHY.
BUG=chrome-os-partner:56098
BRANCH=none
TEST=manual
verify ccd still works on gru
disconnect suzyq and reset reef.
run lsusb on the AP and verify it shows cr50 as a device.
connect suzyq and check that the AP no longer sees cr50.
disconnect suzyq and verify the AP sees it again
Change-Id: I3c1ccc54895835bce12302f3ea43fc2e751b4c97
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/372920
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Add tests for CBC, CFB and OFB AES modes.
Also convert tests to use word unligned
input parameters, to ensure that the api's
are unalignment agnostic.
Also add the program used for generating
test vectors.
BRANCH=none
BUG=chrome-os-partner:56413
TEST=tpmtest.py passes
Change-Id: I92c9ffece797aa7134d9cdad6ea32e6fe50feef1
Signed-off-by: nagendra modadugu <ngm@google.com>
Reviewed-on: https://chromium-review.googlesource.com/374663
Commit-Ready: Nagendra Modadugu <ngm@google.com>
Tested-by: Nagendra Modadugu <ngm@google.com>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
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when TCPC takes a longer time to update its CC status upon
connection, a legacy C-to-A charger or certain Type-C charger
that presents 5V VBUS by default, TCPM could be mistaken the
charger as a debug accessory.
BUG=chrome-os-partner:55980
BRANCH=none
TEST=Manually tested on Reef. PD, Type-C, BC1.2, non-BC1.2,
DP, HDMI are working on both C-ports.
Change-Id: Ic3b0ecd3d14109239d8c0ff0064476595b7f93a0
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/367950
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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PGOOD_AP may go low for a period < 100ms during regulator output voltage
transitions, so ignore such pulses.
BRANCH=None
BUG=chrome-os-partner:54814
TEST=On kevin, verify suspend / resume succeeds for 10 cycles.
Change-Id: I5b6240a570472e1ea74de6e5f2341472ea7afe6b
Reviewed-on: https://chromium-review.googlesource.com/374524
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Shunqian Zheng <zhengsq@rock-chips.com>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Nothing has used this config option since Spring and Skate, back
in early 2014. There's nothing in ToT that uses it at all. I want
to add something similar for other purposes, and having two
similar-sounding options will just cause confusion.
NOTE: Although the comments in include/system.h said that the two
functions
system_get_console_force_enabled()
system_set_console_force_enabled()
were only useful when CONFIG_CONSOLE_RESTRICTED_INPUT is defined,
they were being used in chip/stm32/system.c. But since the
bkpdata registers are only accessible to the EC, there was no way
to initialize or modify the one relevant bit that those functions
cared about, so they almost certainly had no effect.
BUG=chrome-os-partner:55322
BRANCH=none
TEST=make buildall
Change-Id: Id41541193d4559f5c507bdd0268b049166af4497
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/374525
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Due to what appaers to be a leakage issue, this patch drives the
SYS_RST_ODL (aka PMU_RSTBTN_N) pin low for 1sec while the power
state transitions from S3 to S0.
This is a workaround for a proto board issue that prevents the SoC
from booting.
BUG=chrome-os-partner:53791
BRANCH=none
TEST=SoC boots with CL:347754 applied on proto and EVT boards
Change-Id: I88c3ccf18280acf5dfe3b99f99483dc4e4e27873
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/372044
Reviewed-by: Martin Roth <martinroth@chromium.org>
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This changes the ordering of rail/PMIC init slightly so that the
3.3V rail comes up before the PMIC, which follows the ordering
in the PMIC datasheet for cold booting.
The way we did it earlier was to avoid interrupt storms caused by
powering the SoC's GPIO block with SLP signals before powering the
PMIC. However the PMIC ignores the SLP signals when it's first
enabled, so while the suprious interrupts were visible on the scope
it's unlikely that the software was affected. OTOH, as Kevin pointed
out in CL:358913 enabling the PMIC before the 3.3V causes a race
condition whereby the PMIC may fault.
BUG=chrome-os-partner:51323
BRANCH=none
TEST=built and booted on EVT
Signed-off-by: Rachel Nancollas <rachelsn@chromium.org>
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Change-Id: I6eb734f0600daa5de0d970ce228cf3e7ec97d01d
Reviewed-on: https://chromium-review.googlesource.com/372344
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Just adding a TODO comment to the gpio.inc file.
BUG=chrome-os-partner:56540
BRANCH=none
TEST=make buildall; test on Cr50 hardware
Change-Id: I5fa1a765232fd31b03d8825324a3a6a964504b5a
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/374619
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Accelerometer data is read-only in motion_lid, add const to help the
compiler.
BRANCH=none
BUG=none
TEST=compile
Change-Id: I487030318b63a2decd4a57cd8ee0d965628a344b
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/372311
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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BUG=none
BRANCH=none
TEST=none
Change-Id: Ica208bf8d6f34c856073b06633560de08792976c
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/368590
Reviewed-by: Martin Roth <martinroth@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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The code should be compiled with -O0 for gdb use, otherwise various
optimizations make it very difficult to follow the execution flow.
With this patch adding DEBUG=1 to the environment or make command line
causes the usb_updater utility built with -O0 instead of -O3. The
debug flag is being changed to -g from -g3 as this code is not going
to be able to benefit from the g3 features, especially when built
inside chroot.
BRANCH=none
BUG=none
TEST=verified that gdb can properly control execution when make is
invoked with DEBUG=1
Change-Id: I50d8df46a7dd04d4d253b34146dde95f5388287d
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/374758
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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* Added MACRO for specifying row size of flash device.
* Set chip/g specific values for flash row size.
The flash API for g/chip will segment large write operations into a
maximum of 32 word blocks for batch writes to flash memory. Prior to
the change in this commit, the segmentation will adhere to avoiding
crossing page boundaries (2048B) but will not respect row boundaries
(256B). The flash controller will reject any write op that crosses a
row boundary and set a row boundary violation code on its error
register.
BRANCH=none
BUG=b:30819377
TEST=make BOARD=haven_dev
Change-Id: I489122ec0f0db6374dd373a1385c3012bdface20
Reviewed-on: https://chromium-review.googlesource.com/371003
Commit-Ready: Bill Richardson <wfrichar@chromium.org>
Commit-Ready: Johnnie Chan <johnniec@google.com>
Tested-by: Johnnie Chan <johnniec@google.com>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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When the charger is detached, the host event would sometimes be
sent before the charge info was updated, resulting in the host
thinking that the charger was still connected.
BUG=chrome-os-partner:55584
BRANCH=none
TEST=Connected charger to kevin 15 times and verified that the
icon was removed in 2-seconds or less.
Change-Id: I1a4e4e0f7cc23010210570fc261da8308d8e8070
Reviewed-on: https://chromium-review.googlesource.com/367809
Commit-Ready: Wonjoon Lee <woojoo.lee@samsung.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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BUG=chrome-os-partner:56549
BRANCH=none
TEST=Unwanted host command debug messages are not observed
Change-Id: I384fa779fe849484ddbb3174dbcbff651fbd565a
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/374700
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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BMP280 driver API is designed to work with motion
sensor task. The sensor sampling parameters are
configured optimally for handheld device in accordance
with BMP280 spec recommendation.
BUG=None
BRANCH=master
TEST=Tested on amenia; with appropriate .odr in board file
test command "accelread 4" returns raw pressure
value in Pa; accelinfo on 4000 shows Pa value.
Change-Id: I3f4c0c33a77dd317aa1425624d3cc7f4ec6b45a1
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/351660
Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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Add math_util, as matrix and vectors are used in this file.
BRANCH=none
BUG=none
TEST=compile when caller does not include math_util.
Change-Id: Ic8f6ada4f24a0f9d3c91dbf14bea98546089a08f
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/373039
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Update motion_lid to use Android/HTML5 vector frame for sensor.
BUG=none
BRANCH=none
TEST=Test motion_lid passes.
Change-Id: Ic4484e716b678b8399b058ade2bc13480f6cf393
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/373724
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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rotate by identity matrix is fast.
BRANCH=none
BUG=none
TEST=compile
Change-Id: Ia9fccb81ebc4c0be7c9d80823b3c2f76aa2275d0
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/373723
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Rotation by identity matrix from a to b fails if a != b.
BUG=none
BRANCH=none
TEST=Use identity matrix in test motion_lid.c, check test passes.
Change-Id: I852132ee8cd67063921077cd0b7d848d10a730e0
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/373722
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Since pretty much always, we've declared console commands to take
a "longhelp" argument with detailed explanations of what the
command does. But since almost as long, we've never actually used
that argument for anything - we just silently throw it away in
the macro. There's only one command (usbchargemode) that even
thinks it defines that argument.
We're never going to use this, let's just get rid of it.
BUG=none
BRANCH=none
CQ-DEPEND=CL:*279060
CQ-DEPEND=CL:*279158
CQ-DEPEND=CL:*279037
TEST=make buildall; tested on Cr50 hardware
Everything builds. Since we never used this arg anyway, there had
better not be any difference in the result.
Change-Id: Id3f71a53d02e3dc625cfcc12aa71ecb50e35eb9f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/374163
Reviewed-by: Myles Watson <mylesgw@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Do not power-on the AP unless battery can provide sufficient power
or the charger is negotiated to sufficient power.
BUG=chrome-os-partner:56494
BRANCH=none
TEST=Manually tested on Reef. Device can boot to OS without the
battery & cut-off battery.
Change-Id: Ib22bad81a29ccbb2fecc8e835148b627dd722988
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/374023
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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rk3399 doesn't use AP-controlled wireless power state and
CONFIG_WIRELESS isn't defined, so wireless_set_set() is in fact an empty
useless function.
BUG=None
BRANCH=None
TEST=Verify basic EC functionality on Kevin.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I6e3631012ca1f356555a847793050ebdef8eee52
Reviewed-on: https://chromium-review.googlesource.com/373643
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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BUG=chrome-os-partner:55981,chrome-os-partner:56105
BRANCH=None
TEST=Verify kevin rev5 sequences up from S5, down to S3, and back to S0.
Change-Id: I65b73e4a0a46c631c6e40f154cf92810f5aabb72
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/366951
Commit-Ready: Derek Basehore <dbasehore@chromium.org>
Tested-by: Catherine Xu <caxu@google.com>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Derek Basehore <dbasehore@chromium.org>
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Add Sensor FIFO, set the sensors in force mode since we haven't enabled
their FIFO.
BRANCH=kevin
BUG=b:27849483
TEST=Check kernel load cros-ec-ring.
Check ARC++ get accel info with AIDA64.
Change-Id: I1c4d5c1291d2c778fdabd8b8f4e6b6a370f37b04
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/373140
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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The function i2c_port_to_controller() returns a negative value if
the port value was out of range. This wasn't being checked before the
controller value was getting used which could lead to using an invalid
value as a pointer to a structure.
This returns an error where it makes sense, and just ignores the
incorrect value otherwise.
TEST=Build
BUG=None
BRANCH=None
Change-Id: Ie8967bc4db87d3dd1863a2e36e35ac87e6161132
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/371400
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
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When SW sync is enabled and the board enters G3 after being up
there was no way to boot the board again because the
system_jumped_to_this_image() check disallowed the pmic startup
sequence. One needs to check if the pmic is also already on
before bailing on the pmic startup sequence.
BUG=chrome-os-partner:56530
BRANCH=None
TEST=Booted. Jumped to RW EC. Shutdown system. Can boot again once
G3 entered.
Change-Id: I71670ceee09536a282479d1eca6a3ce264f0f5d3
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/374080
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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There is leakage on SYS_RST_ODL from the internal pullup cr50 has on
DIOM0. This change removes the internal pullup.
Without the internal pull up SYS_RST_ODL is not pulled up whenever the
EC is off. I changed how sys_rst_asserted is handled so it will ignore
the sys_rst interrupt whenever rbox asserts EC_RST to make sure cr50
doesn't reset itself every time it resets the EC. If the EC resets
itself and sys_rst_l is no longer pulled up, it is fine if cr50 resets.
BUG=chrome-os-partner:53544
BRANCH=none
TEST=manual
'rw 0x40550010 1' causes the EC to reset but not cr50
On the development board verify DIOM0 is not pulled up.
Test cr50 boots normally on reef and gru
Change-Id: Ic1d4d160ddb0d69081cb1f194d50939dac6fc5c2
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/373838
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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Can now accept and maintain a single connection indefinitely by
sending empty packets at every connection interval to keep the
connection alive.
TEST=BTLE dongle sending connect requests and connecting to NRF51
running this code. Connection was established and ran for at least
48 hours until manual termination.
BUG=None
BRANCH=None
Change-Id: Iad4bd434ecd1edd6c5c8dfe8b72ca41fd82d0bb4
Signed-off-by: Levi Oliver <levio@google.com>
Reviewed-on: https://chromium-review.googlesource.com/370839
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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In console_command_bd99955(), because the return value wasn't being
checked before displaying the data variable, it could be printed without
being initialized.
TEST=Build
BUG=None
BRANCH=None
Change-Id: I03e0aae6fee33e32f648d952d6f2906e71f67ea2
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/371398
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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In flash_physical_erase(), if the area being erased was already
cleared, the return value would never be set, and would be returned
without being defined. Initialize the value so that if the area
being erased is clear, we return success.
TEST=Build
BUG=None
BRANCH=None
Change-Id: Ib13e0be0ad1d3ad23c065b407c35e7b5c4db8487
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/371399
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
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This is necessary after the pending patch to not enable all GPIO
interrupts by default.
BRANCH=None
BUG=chrome-os-partner:56486
TEST=Manual on kevin, run 'hibernate', attach AC and verify wake occurs.
Change-Id: I04d2c6edf9fb32b1a6a7e6a5ed4d2c53895e00f0
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/374179
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Expand interrupt disable to include checking of our SHI state in case
preemption occurs immediately afterward.
BUG=chrome-os-partner:55795
BRANCH=None
TEST=Manual on kevin, verify no errors through 700+ sysjumps.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Icb8a5bdd03dbf87f6a25b4175f73c932d48db726
Reviewed-on: https://chromium-review.googlesource.com/374021
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
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GPIO interrupts must first be enabled with a call to
gpio_enable_interrupt() to prevent ISRs from being run before
prerequiste modules are initialized.
BUG=chrome-os-partner:56486
BRANCH=None
TEST=Manual on kevin, stress test sysjump for ~1 hour (~700 sysjumps)
without failure.
Change-Id: Ia4006ef1b0c3218dfe5c92fde6713c10b0d22d2a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/374020
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
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DEFERRABLE_MAX_COUNT is no longer used and has been removed from other
boards.
Reef was probably in-flight at that time, clean up board.h
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make buildall
Change-Id: Iee11b0519d647be3beb0c164a5a82bbb1edb54c4
Reviewed-on: https://chromium-review.googlesource.com/373778
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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We have enough memory for that, and it makes it possible to poll the
logs from AP much more unfrequently.
BRANCH=none
BUG=chrome-os-partner:56460
TEST=make buildall -j
TEST=Boot kevin, cat /sys/kernel/debug/cros_ec/console_log does not
miss any data.
Change-Id: I7dc880a27d34f97746a8fde00e49d8d08ed85b9d
Reviewed-on: https://chromium-review.googlesource.com/373285
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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The parse_bool() function exists so we don't have to litter our
console commands with stuff like this:
if (!strncasecmp(argv[1], "on") ||
!strncasecmp(argv[1], "enable" ||
!strncasecmp(argv[1], "true" ||
[...]
This CL uses parse_bool instead of that kind of thing so I don't
have to remember which commands use "enable" and which use "on"
and so forth.
I only changed the commands that Cr50 uses.
BUG=none
BRANCH=none
TEST=make buildall; test on Cr50 hardware
I tested all the affected commands to ensure that they still work
correctly: usb, ccd, flashwp (which doesn't do anything anyway).
Change-Id: I7d875ab22934fb4b500e3d0f62ebe3e04101272d
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/373658
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This patch modifies CR50 code to switch to firmware update protocol
version 3. In this version both SPI and USB updates use exactly the
same messages (apart from the size field added by USB to help
reassembly of the fragmented frames).
Bot unused RO and RW sections can be now programmed.
BRANCH=none
BUG=chrome-os-partner:55789
TEST=on a Kevin running the existing cr50 image programmed the new
cr50 image, restarted the device, programmed the cr50 image again
(this time using version 3), restarted the device, then
programmed both RO and RW images and restarted the device. Each
time verified that the proper image is running.
Change-Id: I0cf196ec6de1786510433f8252164a33ccdc6dec
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/371941
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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BUG=chrome-os-partner:56392
BRANCH=none
TEST=Both C-Ports are able to detect any kind of chargers
Change-Id: I6f6dbb93746d33a5750442c1b3bbe381cfd3a434
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/373659
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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I don't think that the received_data pointer in sps_rx_interrupt can
actually be used without initialization in the current code flow, but
GCC 5.3 thinks that it can, and throws an error.
sps_check_rx() always sets the pointer or returns 0. In either case
we should be ok, but initializing it to null here won't hurt anything
since it's not masking an actual error.
BUG=None
BRANCH=None
TEST=Build all boards successfully.
Change-Id: Idaea7efd1af3067c492a3ade4c89104e975f4c1d
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/370663
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
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Charger port number may differ from PD port number hence added
a macro to select appropriate port numbers during compilation.
BUG=chrome-os-partner:54970
BRANCH=none
TEST=Reef can negotiate on both the ports.
Change-Id: Id3b4b639a5f8698c27341be037bb09370910cac5
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/357836
Commit-Ready: Martin Roth <martinroth@chromium.org>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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BUG=chrome-os-partner:49959
BRANCH=none
TEST=manual
On the Cr50 console, use the "wp" command to get/set the desired
state. On the EC console, use "gpioget wp_l" to watch it change.
Change-Id: I5978e6116ad0a07a7a61a8356dc1daf79e2397d0
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/373618
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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1. To assert keyboard IRQ GPIO pin instead of SERIRQ if keyboard data
ready to send.
2. Clear STATUS_PROCESSING bit in lpc_init() to avoid host waiting after
a sysjump.
3. Save and restore event masks while doing a sysjump.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. keyboard work normally if host support this keyboard interrupt.
2. Software sync done and jumping to RW and boot to kernel.
3. EC generate SCI normally after a sysjump.
Change-Id: Ib0d9785106d4d4d21f8e9a6d1f0548f187fa7976
Reviewed-on: https://chromium-review.googlesource.com/372499
Commit-Ready: Dino Li <Dino.Li@ite.com.tw>
Tested-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This command was used for early testing of the SPI slave
interface. It's no longer needed, so disable it to save space.
BUG=none
BRANCH=none
TEST=make buildall; test on Cr50 hardware
Change-Id: If730f909c7361b1179e23b2bf1d07c9d51aa6e8f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/373619
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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"bd99955_dump" output may be larger than our UART output buffer, so
flush our buffer in between prints.
BUG=None
TEST=Run 'bd99955_dump' on kevin, verify full output is seen.
BRANCH=None
Change-Id: I5816e0ce0c000bf63bc09502888e5acc9c4728ae
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/373660
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Display backlight going down for an extended period of time is
a major user annoyance, so save the duty prior to sysjump and restore it
upon init.
BUG=chrome-os-partner:56390
BRANCH=None
TEST=On kevin, run "sysjump rw" from recovery screen, verify backlight
goes black for a fraction of a second and comes back to previous level.
Change-Id: I98f12ace9b933874ba9088a790b9efa0941050ed
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/373621
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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