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* glados: Turn off LEDs in hibernateShawn Nematbakhsh2015-08-112-8/+30
| | | | | | | | | | | | | | | Use new board-level hibernate GPIO state function to turn off LEDs in hibernate. BUG=chrome-os-partner:43807 TEST=Manual on Glados with subsequent commit. Run 'hibernate' on console, verify that LED remains off. Press power button, verify that board wakes. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Id695df9b5e75514f8f807a894b63f71676b66f92 Reviewed-on: https://chromium-review.googlesource.com/292317 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* mec1322: Allow GPIO hibernate state to be specified at board-levelShawn Nematbakhsh2015-08-113-37/+48
| | | | | | | | | | | | | | | | Add a new board-level function board_get_gpio_hibernate_state which can optionally be defined to set the desired state of a GPIO during hibernate. BUG=chrome-os-partner:43807 TEST=Manual on Glados with subsequent commit. Run 'hibernate' on console, verify that LED remains off. Press power button, verify that board wakes. BRANCH=None Change-Id: Ica11554e231e88773c3e139fea4622377ebe1e42 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/292471 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* cortex-m0: Constrain target register in atomic readAnton Staaf2015-08-111-1/+1
| | | | | | | | | | | | | | | | | | | | One more register constaint needed to be added to the cortex-m0 atomic inline assembly. Vincent fixed all the others. The requirement for ARMv6-m includes that the target load register be one of the low registers as well. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: Ie44e824cafcc9b862ade664e3016cc34886cdf6e Reviewed-on: https://chromium-review.googlesource.com/292435 Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* strago: Power state transition in case of apshutdownKumar, Gomathi2015-08-111-0/+4
| | | | | | | | | | | | | | | | | | | In case of 'apshutdown', during transition to S5 state, GPIO_PCH_SLP_S4_L signal was not getting deasserted but required rail went away (GPIO_PCH_SYS_PWROK). So it was going on a loop S5 -> S3 and S3 -> S5. In strago GPIO_PCH_SYS_PWROK is the PMIC_EN GPIO and hence conditinally setting it based on CONFIG_PMIC BUG=none TEST=apshutdown on strago BRANCH=none Change-Id: I9c581a3dfcb9cc84a22b41505e7df496d72d5f4c Signed-off-by: Kumar, Gomathi <gomathi.kumar@intel.com> Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com> Reviewed-on: https://chromium-review.googlesource.com/292024 Reviewed-by: Shawn N <shawnn@chromium.org>
* it8380dev: fix hooks task won't wake up if timer overflowDino Li2015-08-112-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | symptom: Unexpected watchdog reset console message if watchdog is enabled. The IPC value of pre-watchdog warning is in idle task. duplicate: set time_us = 0xff000000 when timer init, watchdog will reset after about 18 seconds. also fix: reload the watchdog counter while flash write. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. enable watchdog. 2. no unexpected watchdog reset. 3. ectool "flashwrite 0x20000 ec.RW.bin" no watchdog reset. Change-Id: Ife10c2ead9c76462a865e694543e862b387d3b49 Reviewed-on: https://chromium-review.googlesource.com/292071 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* strago: Increase chipset stack size.Kumar, Gomathi2015-08-111-1/+1
| | | | | | | | | | | | | | | | | | Chipset task is overflowing and causing runtime crash. Increasing the chipset task stack size by 128 bytes. BUG=chrome-os-partner:43329 BRANCH=none TEST=Build/flash EC and boot the platform to OS. Change-Id: I57dfa23080d11e6e86a6ba5917bf28d05239bc0d Signed-off-by: Kumar, Gomathi <gomathi.kumar@intel.com> Reviewed-on: https://chromium-review.googlesource.com/291393 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Divagar Mohandass <divagar.mohandass@intel.com> Tested-by: Divagar Mohandass <divagar.mohandass@intel.com> (cherry picked from commit bd478accd09fa488cd7c9c73e5714ff02dd0a89b) Reviewed-on: https://chromium-review.googlesource.com/292321
* cr50: remove unused register definitionsVadim Bendebury2015-08-112-18372/+0
| | | | | | | | | | | | | Let's just keep one hardware version at a time. BRANCH=none BUG=chrome-os-partner:43791 TEST=make buildall -j Change-Id: I2e8c40e28638d461fa4ff14ad97ca5da55b33dd2 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/291856 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cr50: code modifications to support FPGA B1Vadim Bendebury2015-08-118-4782/+10267
| | | | | | | | | | | | | | | | | | | | | | | | The new FPGA version adds a lot of few features, while temporarily cutting off some existing capabilities like clocking configuration (hardwared clocks used instead), pinmux assignment for SPS interface (hardwared connections used), etc. This patch removes some now unused code, modifies some configuration items and adds TODO_FGPA comment blocks highlighting code which needs to be reviews next time FPGA version changes). The new register definitions file is derived from hardware description. BRANCH=none BUG=chrome-os-partner:43791 TEST=with these changes in place the B1 board boots to the console prompt. Change-Id: I78ec6b2831a44cbfd40ee726a5d3c2cc11bf2cfa Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/291855 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cr50: add polling uart implementationVadim Bendebury2015-08-112-1/+90
| | | | | | | | | | | | | | | | | | | This code kicks in when the target is compiled with CONFIG_POLLING_UART defined. This ensures that each message sent to the console is drained completely before the code proceeds, which helps debugging early bringup issues. BRANCH=none BUG=chrome-os-partner:43791 TEST=with this code enabled was able to debug cr50 bringup on the new core version. Change-Id: Iab42370d64d17ecc5210bd4db1f2c5f19b40bce8 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/291853 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cr50: control adding USB specific code using proper configVadim Bendebury2015-08-111-1/+1
| | | | | | | | | | | | | | | | CONFIG_USB is a better indicator that USB related code needs to be included. BRANCH=none BUG=none TEST=none - this patch helped compartmentnalize the code when debugging bringup on a new platform. Change-Id: I12ef77325591853d73e2e09f7c491954e272bde9 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/291854 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cortex-m: catch misconfigured interrupts earlyVadim Bendebury2015-08-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | The code in core/cortex-m/init.S limits the number of installed vectors to CONFIG_IRQ_COUNT. But the DECLARE_IRQ macro installing interrupt servicing routines does not care about this limitation. This results in corrupted interrupt configuration, which is hard to debug. This patch makes sure that there is a compilation error in case DECLARE_IRQ is passed interrupt number which out of bounds. A similar change needs to be introduced for cortex-m0. BRANCH=none BUG=chromium:518898 TEST=tried building cr50 with one of interrupt numbers exceeding CONFIG_IRQ_COUNT, observed a compilation error. Change-Id: Ie7bc623da6bf7371579b2242064f81a83053df17 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/291843 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Cyan: Added Clamshell/Tablet mode supportli feng2015-08-107-118/+134
| | | | | | | | | | | | | | | | | | | | | Enabled lid angle calculation. Clamshell/Tablet mode is decided by lid angle. Accelerometers are set to be active in S3 also. Trackpad is enabled/disabled by GPIO TP_INT_DISABLE. Keyboard scan and trackpad are enabled in clamshell mode and disabled in tablet mode. Removed enable_keyboard() since keyboard is enabled in clamshell S0 and S3. BUG=chrome-os-partner:41353 TEST=Verify in clamshell mode, system can be waken up from S3 by keyboard/trackpad; And not tablet mode. BRANCH=None Change-Id: Ic5fb5a562e8426288eae2fb9815a213fe5033955 Signed-off-by: li feng <li1.feng@intel.com> Signed-off-by: Shamile Khan <shamile.khan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/287341 Reviewed-by: Shawn N <shawnn@chromium.org>
* Discovery: Configure USART2 as a loopback deviceAnton Staaf2015-08-103-4/+51
| | | | | | | | | | | | | | | | | | | | | | This gives a test case for the USART driver on an STM32L. Eventually this will be a good place to test that even in a downclocked configuration the STM32L USART driver can handle 115200 without dropping characters. This also gives a convenient build test for the STM32L version of the USART driver. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Cross connect a Discovery and a Discovery-stm32f072 Change-Id: Ifb8dfc1179e8a0be84390d36e0bc3ff15f4f4685 Reviewed-on: https://chromium-review.googlesource.com/288979 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org> Trybot-Ready: Anton Staaf <robotboy@chromium.org>
* USART: Split RX driver between L and F familiesAnton Staaf2015-08-108-14/+91
| | | | | | | | | | | | | | | | | | | | The USART peripheral in the L and F families is different enough to need different receive drivers. In particular, the L family USART perihperal has no way of disabling the overflow error bit. So for that family we check and clear the bit, and keep a count of overflows. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: Iea26c242d5177afd552a3bd4d6ab1a9c7a65f90e Reviewed-on: https://chromium-review.googlesource.com/288978 Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* glados: Implement LED functionality on ECMike Hsieh2015-08-082-3/+140
| | | | | | | | | | | | | | | | Implement LED control for glados for both red and green LED. BUG=chrome-os-partner:40848 BRANCH=none TEST=Manually tested on glados with following commands: ectool led battery red ectool led battery green ectool led battery off Change-Id: I1b4f8c8c8f26779a11185ea8bbc6536d1d7f97b1 Signed-off-by: Mike Hsieh <mike.m.hsieh@intel.com> Reviewed-on: https://chromium-review.googlesource.com/289439 Reviewed-by: Shawn N <shawnn@chromium.org>
* uart: provide polling mode of operationVadim Bendebury2015-08-082-0/+17
| | | | | | | | | | | | | | | | | | | | | Early hardware bringup often is complicated by exceptions happening in the code all over the place. Using interrupt based console output to trace startup progress is inefficient - a lot of text gets buffered and never shows up on the console. The new config option enables the mode where the console output is supposed to be happening in polling mode, the character transmit function not exiting until the entire character is transmitted. BRANCH=none BUG=chrome-os-partner:43791 TEST=with the new config enabled (and the appropriate changes to chip/g/uart.c) was able to debug bringup on the new version. Change-Id: I85fd2f3990ac1d31097d58bd6a7fa658b2b5146e Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/291852 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* stm32: Deprecate SPI protocol version 2.Aseda Aboagye2015-08-084-3/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | Now that v3 support is in the cros_ec kernel driver and depthcharge, deprecate support for the old v2 protocol. At some point in the future, support for the v2 protocol will dropped entirely. Boards that require support for the V2 protocol should enable the following config option. #define CONFIG_SPI_PROTOCOL_V2 BUG=chrome-os-partner:20533 BRANCH=None TEST=make -j buildall tests TEST=Flash jerry, AP & EC boot successful. TEST=`ectool protoinfo` shows only version 3 supported on jerry. TEST=Flashrom still works on jerry. Change-Id: I72d3aee00879314b936cc0b1002c9883550b1f1a Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/291411 Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* motion_sense: Reduce condition for lid angle calc.Aseda Aboagye2015-08-071-8/+11
| | | | | | | | | | | | | | | | | | | | The motion sense task was checking to see that every single motion sensor was ready (active, initialized, and reading), before performing the lid angle calculations. This amount of checking is unnecessary. This commit reduces the condition to only check if the sensors required for lid angle calculation are ready. BUG=chrome-os-partner:36132 BRANCH=None TEST=Build and flash on samus. Verify that the lid still works. TEST=make -j buildall tests Change-Id: Ibaa5cc8358cdcc6023a50aed247fce2e599fef58 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/291301 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* mediatek: Fix llama buildShawn Nematbakhsh2015-08-065-15/+32
| | | | | | | | | | | | | | The llama AP_RESET GPIO differs in polarity from oak. BUG=chromium:517250 TEST=`make buildall -j` BRANCH=None Change-Id: Id06bf39e758b528d154936a3e8561704fdf4cce9 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/290950 Commit-Queue: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* mec1322: add EC_FLASH_PROTECT_ALL_NOW support for external flashAndrey Petrov2015-08-061-27/+84
| | | | | | | | | | | | | | | | | | When flash_set_protect() is called pretend to activate "ALL" protection, and report it active if asked. This persists through sysjump and cleared on reboot/reset. BUG=chrome-os-partner:43323 TEST=Cyan. "flashinfo" should show "all_now", after "flashwp now" called, but only if WP is active and RO protection is activated earlier BRANCH=strago-7287.B Change-Id: I042e5311d79b7ef8e5bc3917662df1edab0e65cb Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://chromium-review.googlesource.com/290813 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org>
* it8380dev: speed up flash verifyingDino Li2015-08-061-2/+3
| | | | | | | | | | | | | | | | | | | | No need to use EC in-direct fast read for verifying, just a pointer. symptom: ectool erase 128KB RW image will show "Timeout waiting for EC response", but the erase is success. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=ectool erase RW image will show the correct message. Change-Id: Ie07d087ec004edc730bd084dd2e9b541f84adc2b Reviewed-on: https://chromium-review.googlesource.com/290525 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* it8380dev: fix KB init state abnormalDino Li2015-08-061-1/+0
| | | | | | | | | | | | | | | | | | | | Let keyboard_raw_task_start() function enable key scan interrupt. symptom: When any key is pressed while powering on the system. Console message "KB init state" will show no key pressed. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=console message "KB init state" normal Change-Id: I49fcbc4c6c40d0c7e551631466a4ef4c2215a892 Reviewed-on: https://chromium-review.googlesource.com/290508 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* Kunimitsu: Add board version supportVijay Hiremath2015-08-052-3/+5
| | | | | | | | | | | | | BUG=none TEST=Verified correct board version is returned via "version" console command. BRANCH=none Change-Id: I1449ea0883437f782c950f772b4539eedc64770d Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/290578 Reviewed-by: Shawn N <shawnn@chromium.org> Tested-by: Divya Jyothi <divya.jyothi@intel.com> Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
* lm4: Add debug output for overlapping HCs.Aseda Aboagye2015-08-051-1/+4
| | | | | | | | | | | | | | | | | | | | | | Currently, when a host command is received which would overlap with an ongoing host command, we ignore it silently. This commit simply logs a line to the EC console stating that we are ignoring the overlapping host command. BRANCH=None BUG=chrome-os-partner:23806 TEST=make -j buildall tests TEST=Build, flash, and boot samus. Using ectool, read 64K from flash while also querying the current EC switch positions. Observe the log message being printed to the EC console. Change-Id: Ic0d249ccec2efb9600bcf8567392add1ee6295d9 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/290545 Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* usb_charger: move common usb charger code out of board directoryAlec Berg2015-08-057-382/+211
| | | | | | | | | | | | | | | | | | | | Move common USB charger code out of board directory including setting VBUS supplier when VBUS changes, and initializing BC1.2 supplier types on init. This also enables re-enabling of Pericom BC1.2 detection interrupts when VBUS is changed on all boards that use USB_CHG task. BUG=chrome-os-partner:42292 BRANCH=none TEST=make -j buildall. Tested on glados and samus by plugging in a few different chargers and making sure we charge. Change-Id: Ib102fbf7a6aace998e6fcb6d35f3c97e5f03f5c2 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/290453 Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: increase the PMIC power key press time to 5 seconds.Ben Lok2015-08-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | There are 3 methods to power on the system: 1) Pulling PWRKEY low (User presses PWRKEY) 2) Setting BBWAKEUP high 3) Valid charger plug-in We should ensure that BBWAKEUP should be high when release PWRKEY. Due to the RTC driver of coreboot will move to ramstage, and the setup timing of BBWAKEUP will be postpone. In order to ensure PMIC keeping the power until coreboot pull BBWAKEUP up, it needs to increase the PMIC power key press time to avoid PMIC turn the power off. This change is related to: https://chromium-review.googlesource.com/#/c/257389/ BRANCH=none BUG=none TEST=manual Update coreboot with above patch, press power key and system should power on normally. Change-Id: I7fabc49e0b3956885cb83a0b40c31c60080d0cbc Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/290538 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: Add LED control for rev3Ben Lok2015-08-051-59/+162
| | | | | | | | | | | | | | | | | | | | | Oak rev3 has 2 dual-color LEDs to indicate the AP power & battery status. The behavior has been redefined and distinguish from rev2 by board version API. BRANCH=none BUG=none TEST=manual 1. define CONFIG_BOARD_OAK_REV_2 in board.h make -j BOARD=oak 2. define CONFIG_BOARD_OAK_REV_3 in board.h make -j BOARD=oak both cases should be built successfully. And Check the PWR & BAT LED. Change-Id: Ic60d6f91002c3534e4c12a27e5c89bc2d0a1ecfd Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/290061 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: revise warm reset control for rev3Ben Lok2015-08-051-9/+21
| | | | | | | | | | | | | | | | | | | | | | The AP warm reset pin is changed from rev3 of oak board. PB3 is stuffed before rev3 and connected to PMIC RESET pin to reset the AP. For rev3, the AP reset mechanism is changed: PC3 connects to PMIC SYSRSTB, pull PC3 to low, to reset AP. BRANCH=none BUG=none TEST=manual 1. define CONFIG_BOARD_OAK_REV_2 in board.h make -j BOARD=oak 2. define CONFIG_BOARD_OAK_REV_3 in board.h make -j BOARD=oak both cases should be built successfully and run "apreset" command. AP should be reset normally. Change-Id: I979e93acf755509f8cb7a12dd77eb7c9e7a98ccc Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/289476 Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: enable EC sleep in S3Ben Lok2015-08-051-3/+8
| | | | | | | | | | | | | | | In S3, the EC isn't expecting AP host commands, so it's safe to enable sleep BRANCH=none BUG=none TEST=Check sleep mask in S0 and S3. Also check sleep mask after sysjump with AP on and with AP off. Change-Id: I9dcfe996e8e92e6703d71bbe966cd2447c6b14fe Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/290002 Reviewed-by: Rong Chang <rongchang@chromium.org>
* lucid: add lucid support to flash_ecAlec Berg2015-08-051-0/+1
| | | | | | | | | | | BUG=chrome-os-partner:43619 BRANCH=none TEST=none Change-Id: I67699ff3904ee6d1196a812adc395d9d3ad7813f Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/290437 Reviewed-by: Shawn N <shawnn@chromium.org>
* it8380dev: change PNPCFG base address to 4E/4FDino Li2015-08-041-2/+2
| | | | | | | | | | | | | | | | | Always reserved 2E/2F for super I/O. This can avoid conflict with super I/O base address. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=make buildall -j Change-Id: I67a37355e320e289fb1f58c7356a1592f7645d21 Reviewed-on: https://chromium-review.googlesource.com/290087 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* it8380dev: fix keyboard no break codeDino Li2015-08-041-0/+10
| | | | | | | | | | | | | | | | | Wake up task to send the remaining scan codes after OBE(host read data) or IBF(host send command/data). Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=EC complete sending scan codes. Change-Id: Ie71140bbdfe5fcaccd5d16fd35b426004c218ba8 Reviewed-on: https://chromium-review.googlesource.com/290088 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* tcpc: fix rx buffer overrun bugAlec Berg2015-08-041-2/+6
| | | | | | | | | | | | | | | Fix buffer overrun bug when retrieving a PD message. Bug was introduced in CL:289005 BUG=chrome-os-partner:43482 BRANCH=none TEST=tested on samus. plug and unplug zinger on both ports and make sure PD MCU never crashes. Change-Id: I9d2dec0cab07f389fd935d616ab7443da412d4bd Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/290417 Reviewed-by: Shawn N <shawnn@chromium.org>
* usb_charger: configure boards to disconnect USB when UFP.Alec Berg2015-08-044-0/+4
| | | | | | | | | | | | | | | | Configure boards whose chipset cannot be a USB UFP to disconnect USB lanes when the data role is UFP. BUG=none BRANCH=strago TEST=make -j buildall. tested on glados by adding ccprintf to usb_charger_set_switches(). verified when we are DFP, USB 2 switches are connected and when we are UFP, they are disconnected. Change-Id: Ic8c817a0cc21b56ee67239e8cc81d5cbbda8d4de Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/290422 Reviewed-by: Shawn N <shawnn@chromium.org>
* flash_ec: add support for SWD, nrf51, and hadokenMyles Watson2015-08-046-3/+71
| | | | | | | | | | | | | | | | | | | BUG=none TEST=manual BRANCH=none flash_ec --board=hadoken flash_ec --board=npcx_evb flash_ec --board=samus Use openocd in SWD mode to flash the nRF51 chip. Use warm_reset to exit DEBUG mode. Change-Id: Iaf2827d4ce5be6d61431a3de7ab4f86aa4adde02 Signed-off-by: Myles Watson <mylesgw@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/287039 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* usb_charger: cleanup: move setting usb 2 switches to usb_chargerAlec Berg2015-08-0412-99/+40
| | | | | | | | | | | | | | Move function to set D+/D- switches from board directory to usb_charger module. BUG=none BRANCH=strago TEST=make -j buildall Change-Id: I5c5997c799cecea90448444863167af860a8f3e1 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/290421 Reviewed-by: Shawn N <shawnn@chromium.org>
* oak: updates GPIO setting for rev3Ben Lok2015-08-042-36/+56
| | | | | | | | | | | | | | | | | | Modify the GPIO seeting according to the Oak rev3 schematic. BRANCH=none BUG=none TEST=manual 1. define CONFIG_BOARD_OAK_REV_2 in board.h make -j BOARD=oak 2. define CONFIG_BOARD_OAK_REV_3 in board.h make -j BOARD=oak both cases should be built successfully. Change-Id: I0336624a5a2d356a4c2eb9ffb812ebffb4f5f7c3 Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/289475 Reviewed-by: Rong Chang <rongchang@chromium.org>
* flash_ec: Set a 10-minute timeout for flashing ECTom Wai-Hong Tam2015-08-041-5/+12
| | | | | | | | | | | | | | | | | | | | | | The flash_ec script is called by the lab infrastructure to flash the EC firmware of DUT. To prevent the EC flashing tool hanged forever (may be caused by some bugs), set a 10-minute timeout to force it to be killed. BRANCH=none BUG=chromium:514810 TEST=Patched the change to servo v3. Triggered flash_ec to flash EC on Jerry. Set the timeout to a small value to force to kill itself. test2: ./flash_ec --board=hadoken # or samus, anything using openocd remove the USB cable half way through (openocd hangs) ps au | grep openocd Change-Id: I39ad8659b41764fd0dba30a86eca301fbbc5243f Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/289247 Commit-Queue: Myles Watson <mylesgw@chromium.org>
* it8380dev: modify sspi moduleDino Li2015-08-045-29/+42
| | | | | | | | | | | | | | | | | We need to modify SSPI module to fix compile fail due to SPI flash common code changed. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=console "spi_flashinfo" OK Change-Id: I83bb645eff1e5874d849056df518eea92340c39e Reviewed-on: https://chromium-review.googlesource.com/290089 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* npcx: Fix termination of chip revisionRandall Spangler2015-08-041-1/+2
| | | | | | | | | | | | | | | | system_get_chip_revision() would return a string which lacked the terminating null. Increase the string length and enforce termination. BUG=chromium:511405 BRANCH=none TEST=version; should show chip revision without garbage chars at end Change-Id: Icb9e36c5bfdf7de7400e5316934ccf28b4b57898 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/290392 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Mulin Chao <mlchao@nuvoton.com> Tested-by: Mulin Chao <mlchao@nuvoton.com>
* glados: Add bd99992gw temperature sensorsShawn Nematbakhsh2015-08-032-1/+26
| | | | | | | | | | | | | BUG=chrome-os-partner:42156 TEST=Manual on Glados. Boot to S0, run "temps". Verify that temperatures start around 28C and begin to increase after system is powered-on for a long duration. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I3bebba4864c8e5b5b23e78947522e58311298bbd Reviewed-on: https://chromium-review.googlesource.com/289936 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* driver/temp_sensor: Add support for BD99992GWShawn Nematbakhsh2015-08-036-0/+408
| | | | | | | | | | | | | | | Add support for ADC / thermistor reads on the BD99992GW PMIC. BUG=chrome-os-partner:42156 TEST=Manual on Glados with subsequent commit. Boot to S0, run "temps". Verify that temperatures start around 28C and begin to increase after system is powered-on for a long duration. BRANCH=None Change-Id: Ic15f41046130317a0e0c3bce4a923ba624328c0d Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/289935 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* oak: Request different DP pin modes including multi-function.Ben Lok2015-08-031-5/+17
| | | | | | | | | | | | | | | | | Refer to commit 63786f24, apply same change to Oak. BRANCH=none BUG=none TEST=manual, 1. hoho + oak, pin mode = 'C' 2. dingdong + oak, pin mode = 'E'. 3. apple type-C HDMI multiport + oak, pin mode = 'D' and USB device enumerates as SuperSpeed. Change-Id: I14c6e7ffbe62a329be43f4157ca065db9142b44e Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/290014 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* oak: power: Set 10s for long power key press to force shutdownYH Huang2015-08-031-5/+5
| | | | | | | | | | | | | | | | | In order to pass the test case "firmware_ECPowerButton", I change the value of DELAY_FORCE_SHUTDOWN from 11s to 10s. The test case holds down power button about 10s to shut down without powerd. BRANCH=none BUG=none TEST=manual run "firmware_ECPowerButton" test case. Change-Id: I3da93769f1cb52b04c447df9a7795d3c28ab2bf0 Signed-off-by: YH Huang <yh.huang@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/282153 Reviewed-by: Rong Chang <rongchang@chromium.org>
* pd: don't enable try.src when battery is not present or too lowAlec Berg2015-08-023-17/+48
| | | | | | | | | | | | | | | | | | Don't enable try.src when battery is not present or <1% because try.src will temporarily cut off power to system. BUG=chrome-os-partner:43413 BRANCH=samus TEST=tested on samus using "battfake" ec command. when battery <1%, verified that try.src is disabled and when battery >=1% and the AP is on (dual-role toggling is on), then try.src is enabled. verified boot without battery succeeds on samus and glados. Change-Id: I64816bb7c9669bfeca61687bcd9a48da32e67945 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/289854 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* tcpc: add RX message buffer and don't send goodCRC when fullAlec Berg2015-08-013-39/+101
| | | | | | | | | | | | | | | | | | Add RX message buffer to the TCPC (currently two deep). If the buffer is full and message is received, don't send goodCRC. BUG=chrome-os-partner:43482 BRANCH=none TEST=tested on glados. saw that with back to back PD packets, we send goodCRC to both packets and process them in order, taking about 7ms per packet. also tested buffer size of 1 and verified that with back to back PD packets, we don't send goodCRC to second packet. Change-Id: I7f44b3c3a186ae61be8ca03017deec6e6b6c6f9f Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/289005 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cr50: initial tpm state machine supportVadim Bendebury2015-08-011-22/+232
| | | | | | | | | | | | | | | | | | | | | | This patch implements FIFO mode state machine transitions as described in Table 22 of the PC Client Platform document. The 'go' command is still not being handled, as processing needs to run on a task, not on interrupt context. FIFO block integrity is somewhat verified by comparing the actual block size to the length value in the block body. BRANCH=None BUG=chrome-os-partner:43025 TEST=not much. Observed trunksd happily initializing the session and sending the Startup command. The target reports: fifo_reg_write: received fifo command 0x0144 Change-Id: I76d8b0fc3a52db2cc487c781fe92799df0ee259e Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288365 Reviewed-by: Utkarsh Sanghi <usanghi@chromium.org>
* tasks: Remove most task_start_called() calls.Aseda Aboagye2015-08-016-17/+7
| | | | | | | | | | | | | | | | | | | | | | | | | Now that HOOK_INIT hooks are called from a task switching context, most calls to task_start_called() should no longer be needed. This commit removes them. BRANCH=None BUG=chrome-os-partner:27226 TEST=make -j buildall tests TEST=Flash EC image onto samus and verify EC boot, AP boot, keyboard, lid, and tap-for-battery all functional. TEST=Flash EC image onto samus_pd and verify charging still works. TEST=Flash EC image onto ryu(P3) and verify that EC boot. TEST=Added ASSERT(task_start_called()) to the places where I removed task_start_called(). Booted samus, samus_pd, cyan, and ryu with AC inserted and verified that no ASSERT's were hit upon boot. Change-Id: Ic12c61862e85ca3a0a295beedbb4eeee6d5e515b Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/285635 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
* motion_sense: Move angle calculation under LPC_MODEGwendal Grignou2015-08-012-5/+15
| | | | | | | | | | | | | | | | When LPC mode is used, there is an assumption that the first 2 sensors are accelerometers, and the optional 3rd is a gyro. Put the code that fill lpc_data with #ifdef. Prevent lpc space corruption if more than 3 sensors are present. BRANCH=smaug TEST=Compile. Smaug works BUG=None Change-Id: I12c9b823efb57d7b190a1813228f6f02fa0bebcb Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/290073
* skylake: Inhibit AP power-on until charge current limit is setShawn Nematbakhsh2015-08-012-0/+25
| | | | | | | | | | | | | | | | | | Inhibit AP power-on through the BATLOW pin, even if the system is unprotected, until our charger and current limit are initialized. Note that this feature is only functional on glados v2 since other skylake boards do not have BATLOW connected. BUG=chrome-os-partner:41258 TEST=Manual on glados v1 with rework. Remove battery and attach Zinger. Verify EC powers on and AP doesn't boot. Run `powerbtn`, verify that AP boots. Remove all power and attach battery, verify that EC powers on and AP boots. Also verify compilation on glados v2. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I55de857f7006777640f7853b7bde98ba97e8bd13 Reviewed-on: https://chromium-review.googlesource.com/287378
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