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* pd: zinger: add firmware update alternate mode to zingerstabilize-6480.BAlec Berg2014-11-158-56/+226
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a Google Firmware Update alternate mode to zinger. This mode must be entered in order to allow the unstructured VDMs that we use for sending a new firmware. BUG=chrome-os-partner:33754 BRANCH=samus TEST=load on samus and zinger. see that "GFU" is printed on zinger console to represent that it entered GFU mode. use twinkie to see that samus sent discover identity, discover svids, discover modes, enter mode, and then read info. See on samus pd console that we received result of read info. from samus pd console with zinger attached: > pe 1 dump IDENT: [ID Header] 2c0018d1 :: AMA, VID:18d1 [Cert Stat] 00000000 [2] 50100001 [3] 00000003 [4] 52136b91 [5] 0401137d SVID[0]: 18d1 MODES: [1] 00000000 MODE[1]: svid:18d1 caps:00000000 Also, use a samus with cros_pd_update running in kernel, and see that zinger auto-updates when plugged in. Performed 10 updates with no failures. Change-Id: I8d4d38e4a9f649fe0889f688f262630ef55106ee Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229622 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* samus: lower the minimum input current limitAlec Berg2014-11-151-1/+1
| | | | | | | | | | | | | | | | Lower the minimum input current limit on samus by 64mA to 448mA to have the ability to limit input current to something below 500mA. BUG=none BRANCH=samus TEST=load onto samus, and use charger console command to verify input current limit is 448mA. Change-Id: I05bcacce707faddd3addee50356d85281466e146 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229281 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* rsa: add support for 4096 and 8192 bit keysVincent Palatin2014-11-159-21/+102
| | | | | | | | | | | | | | | | | | | | | Allow to use larger RSA keys by setting CONFIG_RSA_KEY_SIZE to 4096 or 8192 rather than using the default 2048-bit size. It's mainly for benchmarking purpose right now as we don't have the RAM to store the 3x key size buffer and the flash space for the public key structure. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=none TEST=build Zinger with CONFIG_RSA_KEY_SIZE equals to 4096 and run it. Change-Id: I9839121bf158d0a30dde1e48d875f345191bfec2 Reviewed-on: https://chromium-review.googlesource.com/228925 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* pd: allow policy layer to ask for PR/DR_swap on new contractAlec Berg2014-11-1514-84/+244
| | | | | | | | | | | | | | | | | Allow policy layer to request a PR or DR swap upon formation of a power contract. Zinger always asks for a data swap so it can be a UFP, and Samus asks for a data swap only if it is a UFP to become a DFP. BUG=chrome-os-partner:33754, chrome-os-partner:31195 BRANCH=samus TEST=load onto samus and zinger and make sure they swap roles upon connect with no collisions Change-Id: I275c9669549c26f25c58f80845daad8edab11313 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229327 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: changes to actions to take on PD disconnectAlec Berg2014-11-151-17/+20
| | | | | | | | | | | | | | | | | | | Changed actions to take on PD disconnect to do all the same actions for source and sink disconnect. With power and data swap commands, there are potential bugs with state variables not getting cleared properly when separated source and sink disconnects are seperated out. Also changed code to only take those actions on PD disconnect whereas before it was also happening on dual role toggle. BUG=none BRANCH=samus TEST=load onto samus, make sure it takes disconnect actions on when zinger is unplugged. Change-Id: I455f4970517477d4ffd38059110521b228282763 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229621 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cr50: Update TODO comments with new bug numbersBill Richardson2014-11-147-8/+8
| | | | | | | | | | | | | Just changing comments, no code. BUG=chrome-os-partner:33432 BRANCH=none TEST=make buildall -j Change-Id: Ibffda40bff23a8c685feaef30a85e19157566245 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229860 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Remove frequent fan-change updates from EC consoleBill Richardson2014-11-141-10/+0
| | | | | | | | | | | | | | | | | | An earlier commit posted fan-change info to the console. Turns out it's a little too annoying, and disabling it with the "chan" command would also hide messages related to thermal shutdown. This just removes those updates completely. BUG=chrome-os-partner:33775 BRANCH=ToT,samus TEST=make buildall -j Watch the EC console. The messages no longer appear. Change-Id: Ie8c48d7ce493a25bf0afbd26d280a87dda882c1a Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229623 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* tweak: Allow "rw" command to read AND write memory.Bill Richardson2014-11-142-6/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's really annoying to have to type two different commands. If I want to read a location and then write it and then read it back (which often happens when poking at hardware), then this: rw 0x40570008 rw 0x40570008 14 rw 0x40570008 is much easier to enter than this: rw 0x40570008 ww 0x40570008 14 rw 0x40570008 The "ww" command is still there, if you're really attached to it. BUG=none BRANCH=none TEST=manual Tried the example above. It worked. Change-Id: I2302ed60df3dd3ec2224afa7c32d997bd2468ec1 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229660 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ryu: Disable USB D+ pull-up on bootVic Yang2014-11-141-0/+1
| | | | | | | | | | | | | | | The pull-up on USB D+ is by default enabled, as needed by DFU mode. In normal operation, we should disable it unless case-closed debugging is enabled. BRANCH=None BUG=chrome-os-partner:33544 TEST=Build ryu Change-Id: I18d216d8fff61640e4fbc3ce259209b3f149abf1 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229797 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: Remove console message for host commandsVic Yang2014-11-141-15/+3
| | | | | | | | | | | | | | | | | | If we need to debug host commands, we can always turn on hcdebug and see the content of host command packets. Let's remove the console messages to save flash space. This reduces the code size by ~450 bytes. BUG=chrome-os-partner:32203 TEST=update Zinger with Samus BRANCH=None Change-Id: Id72e813dd1217239edcef02f45dfebc06597d6c7 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/220510 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org>
* pd: add data role swapAlec Berg2014-11-1413-79/+349
| | | | | | | | | | | | | Add support for DR_swap, data role swap command. BUG=chrome-os-partner:33686, chrome-os-partner:28343 BRANCH=samus TEST=test with samus and zinger. use "pd 1 swap data" command and verify data role swaps by using twinkie and "pd 1 state". Change-Id: I410309199cdeecb26847a6bf217523fdfe688cba Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229192
* zinger: (re-)enable the flash prefetch bufferVincent Palatin2014-11-141-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | At 48Mhz, due to the flash accessing requiring 1 Wait-State, we need to enable the flash prefetch buffer to get the full CPU execution speed. The bit used to enable flash prefetching was fixed : crosreview.com/219921 , but the change was overriden by the CL enabling the STOP mode : crosreview.com/219933 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=chrome-os-partner:28335 TEST=plug Zinger into a PD power sink, with the Twinkie protocol analyzer observe how long Zinger takes to send back GoodCRC after the Request and SinkCap messages. With the patch, the average delay is going from 160us to 50us. Change-Id: I9de1bc10e14485919046c841eea16de3c3b3c800 Reviewed-on: https://chromium-review.googlesource.com/229671 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* cr50: Add support for hwtimerBill Richardson2014-11-142-4/+186
| | | | | | | | | | | | | | | | | Implement the API expected by common/timer.c BUG=chrome-os-partner:33699 BRANCH=none TEST=manual Run the "gettime" and "timerinfo" and "taskinfo" and "waitms" commands. Compare the elapsed time with the real world. They seem to match. Change-Id: Ie5acae76780ee09e7dfb6cc0282de25f8063e96f Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229642 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Disable test binaries for ryu_p1Vic Yang2014-11-131-0/+1
| | | | | | | | | | | | | They are broken on ryu_p1. Disabling them for now. BRANCH=None BUG=chrome-os-partner:33583 TEST=make tests Change-Id: Ic81cd7fca5cb128d949e75e98cf29741dab88927 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229340 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* ryu: disable pd console commandAlec Berg2014-11-133-3/+16
| | | | | | | | | | | | | | | | | Disable most of the pd console command to save space. The command can still be used with subcommands "state" and "dump" to get state information and change debug level. BUG=none BRANCH=none TEST=make buildall with CONFIG_CMD_PD defined and undefined. Also undefined the config option and loaded onto samus and verified that the pd 0 state command still works. Change-Id: Ie41bad53122a1e2a9ef4bad6423b9cdc85f53742 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229420 Reviewed-by: Vic Yang <victoryang@chromium.org>
* plankton: modify request_voltage after redundant 5V-PDO removalJohny Lin2014-11-131-5/+5
| | | | | | | | | | | | | | | | | After removing redundant 5V source PDO for plankton, the index of request_voltage need to minus 1. BUG=chrome-os-partner:33737 BRANCH=samus TEST=make BOARD=plankton, and test 5V/12V/20V buttons on plankton board Change-Id: I82f3f8ef72ce54221fb31027b10ff428f2440c9f Reviewed-on: https://chromium-review.googlesource.com/229255 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Queue: Pin-chih Lin <johnylin@chromium.org> Tested-by: Pin-chih Lin <johnylin@chromium.org>
* Jerry: modify gpio config, hibernateChris Zhong2014-11-135-27/+44
| | | | | | | | | | | | | | | | | | | Added hibernate wakeup pin(EC_WAKE) that covers both AC_PRESENT and LID_OPEN. It pulses a rising edge when either of them have a rising edge. The power button was also inverted to handle hibernation better, now it's low except when pressed it temporarly goes high. BRANCH=None BUG=chrome-os-partner:33269 chrome-os-partner:32782 TEST=make BOARD=jerry Try hibernating, all wakeup sources should work, it shouldn't stay hibernated. All signals(AC, lid, power button) should work equally well as in pinky. Change-Id: I894135bdfd5600919296f7510dc9cd1acd567ddc Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/228763
* ryu: Enable PD/EC console over USBAnton Staaf2014-11-135-10/+51
| | | | | | | | | | | | | | | | | | | | | | | | | This enables forwarding of the local PD/EC console over debug USB. It gates the console functionality based on the CCD mode that is set. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Enable partial CCD mode on ryu and verify that it is enumerated by the host correctly, but doesn't respond to console input, and doesn't generate output. Enable full CCD mode on ryu and verify that it is enumerated and that the console works as expected. Verify that the console still works by default on the discovery-stm32f072 board. Change-Id: I0325ce9689486c41387d6075330be1d7d42f1d42 Reviewed-on: https://chromium-review.googlesource.com/229342 Reviewed-by: Anton Staaf <robotboy@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org>
* ryu: Add minimal Case Closed Debug supportAnton Staaf2014-11-136-0/+168
| | | | | | | | | | | | | | | | | | | | | | | | | This provides a framework for additional work. It exposes an API (ccd_set_mode) that can be used by the PD code to enable Case Closed Debug. Enabling CCD will result in the USB 2.0 lines on Ryu (proto 2) to be disconnected from the AP and for the USB peripheral to be enabled and connected to the host. The result is an enumerated device with no interfaces. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Enable CCD ryu_p2 and verify that it is enumerated by the host correctly. This requires a reworked Ryu (proto 2 with pullup). Change-Id: I1fbecdd5f94a61519cfc18c5e087892c6bd77fde Reviewed-on: https://chromium-review.googlesource.com/229139 Reviewed-by: Anton Staaf <robotboy@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org>
* USB: Enable finer grain control over init processAnton Staaf2014-11-135-7/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously enabling USB would automatically (using an init hook) initialize the USB peripheral. This would take over the GPIO lines assigned to the USB module. This is not OK on Ryu for Case Closed Debug because it interferes with the AP's access to the USB 2.0 lines even when not in Case Close Debug mode. This change adds a configuration option to inhibit this default initialization of the USB peripheral. It also renames the existing CONFIG_USB_INHIBIT to CONFIG_USB_INHIBIT_CONNECT now that there are two possible inhibitions. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Enable console on ryu_p2 and discovery-stm32f072 board Verify that it works on both Change-Id: I6734357131b4356e3d4164349d6c74deac196ce5 Reviewed-on: https://chromium-review.googlesource.com/229138 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org>
* charge_manager: Add charge port override functionalityShawn Nematbakhsh2014-11-133-21/+172
| | | | | | | | | | | | | | | | | Allow a charge port to be selected as the override port, which means it will always be selected as the charge port, if any charge supplier is available. BUG=chrome-os-partner:32003 TEST=Attach PD charger and BC1.2 charger. Verify that active charge port switches to BC1.2 after running `chargeoverride [port]` from console. Also, pass unit tests. BRANCH=Samus Change-Id: Ia1b48ca89641842d51be7eed3b92d36d3eedc9ef Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/227730 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* charge_manager: Add unit testsShawn Nematbakhsh2014-11-136-1/+315
| | | | | | | | | | | | | Add unit tests for the charge_manager module. BUG=chrome-os-partner:32003 TEST=`make buildall -j` BRANCH=Samus Change-Id: I31962588ca7360e2ffde6b83459505872e2128b9 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/227620 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* usb_pd: Negotiate minimum power for unused portsShawn Nematbakhsh2014-11-136-33/+190
| | | | | | | | | | | | | | | | | | | | When a PD charger is detected, gets its max charge capability, but initially negotiate for its minimum charge mode. If we later determine that the port will be the one active charge port, re-negotiate for the max charge capability. BUG=chrome-os-partner:32003 TEST=Manual on Samus. Plug in Zinger, verify that current limit is initially set to 500 mA, then switches to 3000 mA shortly after. Plug in two Zingers, verify that one provides 3000 mA current while the other negotiates to 500 mA. Verify that the 500 mA charger bumps up to a high current once becoming active. BRANCH=Samus Change-Id: Ifa562b72d763642fc8bd62bc7f5aaa4eda1ef950 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/225922 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Strago: Automated build to generate ec.spi.bin.icarus sparry2014-11-125-1/+24
| | | | | | | | | | | | | | | | | | | | | | | Add another variable PROJECT_EXTRA which chips and boards can use to add additional prerequisites to the default all target Add rules for creating ec.spi.bin to package the ec firmware for strago BUG=None BRANCH=None TEST=Tested on Braswell Ref Design Board Signed-off-by: Divya Jyothi <divya.jyothi@intel.com> Signed-off-by: icarus sparry <icarus.w.sparry@intel.com> Change-Id: I4fb9f1275dc5bc2987b6abf5d45b0baf363c0d7a Reviewed-on: https://chromium-review.googlesource.com/226305 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Icarus W Sparry <icarus.w.sparry@intel.com> Commit-Queue: Icarus W Sparry <icarus.w.sparry@intel.com> Tested-by: Icarus W Sparry <icarus.w.sparry@intel.com> Reviewed-by: Sheng-liang Song <ssl@chromium.org>
* ryu: switch default firmware to use STM32F373Vic Yang2014-11-1218-187/+187
| | | | | | | | | | | | | | | | This simply renames ryu to ryu_p1, and ryu_p2 to ryu. 'ryu_p1' will be kept for a while and will be decommisioned when most developers make switch to the new boards. BRANCH=None BUG=chrome-os-partner:33583 TEST=Build ryu and boot on P2 board. Change-Id: Ief61c64c6aefdaeae76ac7b86e0ea28131810aa1 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229291 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* samus_pd: undefine command line help to save flash spaceAlec Berg2014-11-121-1/+2
| | | | | | | | | | | | | | | | | Save 2k of flash space by disabling command line help BUG=none BRANCH=samus TEST=make buildall. verify flash usage in .map file. Change-Id: I2509e733d3cedf6115dcd027a3e232f407e95e94 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229174 Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org> Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
* samus: Put touchscreen in reset in S3Duncan Laurie2014-11-121-0/+3
| | | | | | | | | | | | | | This can save 80mW in S3 when the lid is open. BUG=chrome-os-partner:33057 BRANCH=samus TEST=boot on samus, go to suspend with powerd_dbus_suspend and ensure that the touchscreen is in reset. Change-Id: I63c24ad5a8f8cb389ee0d6139edbbb46dec5423b Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229106 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* USB: Add support for board specific connect/disconnectAnton Staaf2014-11-116-32/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | Previously the usb driver used #ifs to select a mechanism to enable and disable the DP pullup. This doesn't scale well, especially when the knowledge of how to do this is not known to the chip specific code, but instead is board specific (as it is with the STM32F373). This change uses the build systems ability to build chip family specific files per build to select the appropriate behavior. And on the STM32F3 family of parts it just calls out to a board specific pair of connect/disconnect functions. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Enable console on ryu_p2 and discovery-stm32f072 board Verify that it works on both Change-Id: I976e02fbc7acbb0f85817d7295b26ee9ecab0711 Reviewed-on: https://chromium-review.googlesource.com/229040 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* USB: Fix issue with USB RAM sizesAnton Staaf2014-11-1111-30/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously the USB RAM size was off by a factor of two for chips that required 32-bit alignment of accesses, even though the underlying memory was 16-bits in size. This change adds an additional configuration for the access size (it still assumes that the underlying memory is 16-bits in size) and uses that to adjust the USB_RAM memory section in the linker scripts. This change also removes the default values for the USB RAM from stm32/config_chip.h because they mask issues when new chips are added. It is better for a new chip to fail to compile until these values are provided. Finally, this change introduces a common USB API header so that common code doesn't need to include the STM32 specific header. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Enable console on ryu_p2 and discovery-stm32f072 board Verify that it works on both Change-Id: Id118627f53e9e8ff1bd09fb51f1f9634ff495d19 Reviewed-on: https://chromium-review.googlesource.com/228833 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* samus: Remove board version specific workaroundsDuncan Laurie2014-11-112-51/+21
| | | | | | | | | | | | | | | | | | | The next board revision will reset the ID to zero, so we can no longer rely on the old versions for workarounds. However those boards no longer work without modification due to GPIO changes anyway so we can just remove the old code and since there are no more workarounds left remove the board version enum since it is no longer used. BUG=chrome-os-partner:32895 BRANCH=samus TEST=build and boot on samus EVT2 Change-Id: I3f76cda6b533fe195a743baa7981a0e67d371313 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229003 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pd: Add SVDM discovery info into host command.Todd Broch2014-11-114-5/+75
| | | | | | | | | | | | | | | | | | | | | | During the discovery identity phase of type-C devices that support it there is some info that could be useful to kernel & userland for policy decisions. CL starts by passing up the vid, pid & product type (ptype) of the discover identity VDO. BRANCH=samus BUG=chrome-os-partner:32650 TEST=manual, From host, w/ hoho in port 1 ectool --name=cros_pd infopddev 1 Port:1 Device:4 Hash: 0x57b1e4e0 0x7204075f 0x65c0fa72 0xdcca15ed 0xf3231237 Port:1 ptype:6 vid:0x18d1 pid:0x5010 Change-Id: Ie05d191149ada0ec860b713d780b0345eab3a647 Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/226899 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pd: Send proper OPOS for DP status & config.Todd Broch2014-11-116-14/+26
| | | | | | | | | | | | | | | | | | | | | | | Once a mode is entered object position (OPOS ... AKA alternate mode) field in the VDM header should always track that mode. CL fixes DP status & config messages which did not add the correct OPOS. In fixing I mapped to the UFPs function pd_alt_mode which for the DFP did require the addition of port parameter. Finally I cleaned up code to use this function throughout common policy layer where previously I'd just accessed the pe structure directly. BRANCH=samus_pd BUG=none TEST=manual, compiles, insert hoho/dingdong into samus and see OPOS=1 from samus for enter, dp_config, dp_status SVDMs Change-Id: I66448c3386be01bae58768632da216aff41a9a30 Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/228130 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org>
* pd: Fix product type in SVDM identity header.Todd Broch2014-11-111-3/+3
| | | | | | | | | | | | | | | Fix the numberings of the product type of id header. BRANCH=samus BUG=none TEST=manual, compiles AMA == 5 Change-Id: Id0b96e720a79160074dd4547447a192bf224f27d Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/228110 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org>
* pd: wait to send source cap until port partner is showing UFPAlec Berg2014-11-111-3/+20
| | | | | | | | | | | | | | | | | | Wait to send source cap packet until port partner is showing UFP on CC line. This is necessary because while we are applying VBUS, the other side could toggle its role, and when VBUS is finally up, we must wait to send source cap until other side is pulling down. BUG=none BRANCH=samus TEST=make buildall Change-Id: If7e811913f5ec9eed28171ffca0cec98712b96fe Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/227722 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org>
* pd: add print out when we receive SOP', SOP''Alec Berg2014-11-112-3/+13
| | | | | | | | | | | | | | Add print when receive various SOP packets for debugging. BUG=none BRANCH=samus TEST=make buildall Change-Id: I574d0ed6338e880a9ec238f931fc299c22f3786a Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/227721 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org>
* pd: move tDRPHold to after vbus is onAlec Berg2014-11-111-5/+7
| | | | | | | | | | | | | | | | Move tDRPHold timeout to after vbus is on. This makes sure we give the right amount of time for a dual-role device to recognize that it should be the UFP. BUG=none BRANCH=samus TEST=make buildall Change-Id: I8432eb172783c689d636a435073bb86828488b06 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/227720 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org>
* pd: add reject of data swap and vconn swap ctrl messagesAlec Berg2014-11-112-3/+6
| | | | | | | | | | | | | | | Reject data and vconn swap control messages. BUG=none BRANCH=samus TEST=test with third party device that sends data and vconn swaps and make sure we send reject Change-Id: I6261e000f24ad8c886760601a8ad7da4502f82b7 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/227584 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org>
* USB: Fix console code to work with old and new USB peripheralsAnton Staaf2014-11-111-3/+4
| | | | | | | | | | | | | | | | | | | | The console code never worked with the old style STM32 USB peripherals because no chips with that version of the peripheral were being used. The STM32F373 uses the older USB peripheral. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Enable console on ryu_p2 and discovery-stm32f072 board Verify that it works on both Change-Id: I77d36c33712521d7840b4e3ca02ebbea5de3d5df Reviewed-on: https://chromium-review.googlesource.com/227741 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* pd: svdm: Don't send response to UFPs attention.Todd Broch2014-11-111-9/+12
| | | | | | | | | | | | | | | | | Attention command requires nothing more than goodCRC for validation. CL corrects to no longer send acknowledge response. BRANCH=samus BUG=none TEST=manual, see no response acknowledge (just goodCRC) using protocol sniffer. Change-Id: Ide8a29d1504d677e9b20853d341b31ca5c088a8b Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/227394 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org>
* pd: add delay for power supply startup before sending src capAlec Berg2014-11-118-14/+25
| | | | | | | | | | | | | | Add delay for power supply startup time before sending source capabilities packets. BUG=none BRANCH=samus TEST=load on samus, plug in C to A receptacle adapter, see that VBUS enabled before source cap packet sent. Change-Id: If3b595e1671d089e859693b420841a639fdb146b Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/227423
* pd: Set PDO type bits.Todd Broch2014-11-111-2/+4
| | | | | | | | | | | | | | | | Sets PDO type bits in PDO_BATT & PDO_VAR macro which were inadvertently left blank. BRANCH=samus BUG=none TEST=manual, examine PDO Header and see type set correctly Change-Id: I6833be50f2bdedaa1c2a1f521f9ef33eb2b861e4 Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/227422 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org>
* pd: Remove BMC support bit from message header.Todd Broch2014-11-111-5/+1
| | | | | | | | | | | | | | | | | | | | Initial versions of the USB Power Delivery (v0.7) had this bit defined but in later versions its been removed and should be zero. BRANCH=samus BUG=none TEST=manual, capture message header with twinkie and see that message header <15> is no longer asserted. Change-Id: Ib3e099322b681a49a75b07e1ff929083c71eb44a Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/227421 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org>
* twinkie: add LEDs for trafficVincent Palatin2014-11-101-0/+28
| | | | | | | | | | | | | | | | | | | | | When PD traffic is seen on CC1 / CC2, turn on respectively the green LED and the red LED. When the samples are properly exported through USB without overrun, the blue LED is lightly blinking. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=plug a Zinger into a power sink through the Twinkie and see it blinking in a different color depending on the plug polarity. Change-Id: Icde9de5c807045d4df725e702690246367bcfd1d Reviewed-on: https://chromium-review.googlesource.com/226590 Reviewed-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* pd: for request message, add operational and max currentAlec Berg2014-11-1010-63/+214
| | | | | | | | | | | | | | | | | | For request message, add the operational and max current for each board. If the requested power is less than the operational power required, then set mismatch bit. BUG=none BRANCH=samus TEST=make buildall. load onto samus, plug in zinger and see that request 20V, operational current 3000mA and max current of 3000mA. Change-Id: I4df45d88b7e060f66ff5b806f6fe30803f1afcf7 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/227393 Reviewed-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* USB: Fix definitions for usb_uintAnton Staaf2014-11-101-3/+5
| | | | | | | | | | | | | | | | | | I managed to mess this up previously, the STM32L and STM32F should use uint32_t and so should the STM32F3 it turns out. Only the STM32F0 uses uint16_t right now. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: Ieca4368c4280a0f25c928b6670aeccbaf8eabbef Reviewed-on: https://chromium-review.googlesource.com/227740 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@google.com> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* plankton: Update GPIO names and attributes for Plankton v3Vic (Chun-Ju) Yang2014-11-092-12/+16
| | | | | | | | | | | | | | | | | | | | | | Update GPIOs to reflect changes in Plankton v3. The default values are set so that case closed debugging is disabled. Also, rename CABLE_FLIP to MUX_FLIP to match the schematic. (Plus that MUX_FLIP is a more suitable name for what it does.) This change be functionally compatible with Plankton v2, except that the change on PA7 causes a 0.33mA leakage current on Plankton v2, which should not be a problem. BRANCH=None BUG=None TEST=Compile only Change-Id: I50c56a1c583015d3624ec9f5901ed477d07233f4 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@google.com> Reviewed-on: https://chromium-review.googlesource.com/227980 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* math: use CONFIG_FPU when using float.Gwendal Grignou2014-11-094-1/+17
| | | | | | | | | | | | | ifdef code than needs CONFIG_FPU (acos and friends) BRANCH=ToT BUG=chrome-os-partner:32050 TEST=define CONFIG_FPU on host board and use it. Change-Id: I1c4ed16c23450bb4059d26044f4c1fe45b33674e Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/226414 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Sheng-liang Song <ssl@chromium.org>
* pd: remove redundant 5V source PDOsAlec Berg2014-11-069-12/+3
| | | | | | | | | | | | | | | | Remove redundant 5V source PDOs in source cap packet. We only need one 5V advertisement with the maximum current that we can provide. BUG=none BRANCH=samus TEST=make buildall Change-Id: I94a01813787eb92fafbf600dcbbc8a2f0aa69e2b Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/227392 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org>
* pd: for non dual-role device, always send reject to PR_SWAPAlec Berg2014-11-061-1/+3
| | | | | | | | | | | | | | For non dual-role devices, always send reject to power swap request, PR_SWAP. BUG=none BRANCH=samus TEST=make buildall Change-Id: I54ce4810cf08a02a1d841308507a0f8de284d987 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/227391 Reviewed-by: Todd Broch <tbroch@chromium.org>
* pd: samus: add support for power swap commandAlec Berg2014-11-0614-59/+335
| | | | | | | | | | | | | | | | Add support for PR_SWAP command as per PD specification. BUG=chrome-os-partner:28343 BRANCH=samus TEST=test by connecting two samus' and running 'pd 1 swap power' from console. verified that both sides switch power roles by observing console output. also tested against third party devices. Change-Id: I0e8738b544de9f9a4348250630e67d0fefb4486d Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/225559 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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