| Commit message (Collapse) | Author | Age | Files | Lines |
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The Cortex-M0 core is based on ARMv6-M instruction set rather than
ARMv7-M as Cortex-M3 and M4.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=run console on STM32F072,
and pass all available unit-tests on target.
Change-Id: I9bdf6637132ba4a3e739d388580a72b4c84e930e
Reviewed-on: https://chromium-review.googlesource.com/188982
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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When we are calling the re-scheduling routine at the end of an irq
handling routine, we need to ensure that the high registers are not
currently saved on the system stack.
On Cortex-M3/M4, the compiler is normally doing tail-call optimization
there and behaving properly, but this fixes the fact that insanely large
interrupt handling routines where sometimes not compile and not running
properly (aka issue 24515).
This also prepares for one more core-specific DECLARE_IRQ routine on
Cortex-M0.
Note: now on, the IRQ handling routines should no longer be "static".
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:24515
TEST=make -j buildall
revert the workaround for 24515, see the issue happening only without
this CL.
Change-Id: Ic419369231925568df05815fd079ed191a5446db
Reviewed-on: https://chromium-review.googlesource.com/189153
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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Fixed a potential bug in accelerometer initialization that could result
in failing to write the desired accelereometer settings. Before writing
the desired settings, we first send a command to perform a software reset.
While waiting for software reset to complete, if we have an I2C error,
then we could interpret this as software reset complete and go on to write
the accelerometer settings before the reset has actually completed.
BUG=none
BRANCH=rambi
TEST=Code inspection. I haven't actually seen this bug, I just saw the
potential for it.
Change-Id: I78757106291ffbaeff27f94aa6f74c9cea81e0b9
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/189064
(cherry picked from commit 521a99e38428fcfe928616f4932b5d1167e2f6cb)
Reviewed-on: https://chromium-review.googlesource.com/189233
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This is needed to calibrate the tmp006 remote sensor values.
BUG=chrome-os-partner:26581
BRANCH=none
TEST='ectool tmp006raw N' works for N=0,1,2,3
And fails with invalid param for N=4.
Data matches result of tmp006 ec console command.
Change-Id: I04ec093c7727b55caca7d02baaf373d1ff234731
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/189207
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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On some CPU cores, the compiler needs an helper to perform the 64-bit
multiplication. As the only remaining 64-bit multiplication in the code base
is not necessary, fix it rather than adding the helper.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=build for Cortex-M0 platform.
Change-Id: I88dd7a4f2eabeca5b03fb3db232bbca9a037dcf8
Reviewed-on: https://chromium-review.googlesource.com/189151
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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BRANCH=big
BUG=chrome-os-partner:26533
TEST=build ec and flash to big board; verify battery works
Signed-off-by: Cloud Lin <cloud_lin@compal.com>
Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org>
Change-Id: Ia005a549b8318b4f8df81e7b1341d50da28f4282
Reviewed-on: https://chromium-review.googlesource.com/188632
Reviewed-by: Katie Roberts-Hoffman <katierh@chromium.org>
Commit-Queue: Katie Roberts-Hoffman <katierh@chromium.org>
Tested-by: Katie Roberts-Hoffman <katierh@chromium.org>
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This works around an issue where LCDVCC falls too slowly. The impact
is to slow shutdown by 7 ms, which isn't noticeable to the user.
BUG=chrome-os-partner:26561
BRANCH=rambi
TEST=shut down rambi; still shuts down, and ~7 ms more time is spent
in S0->S3 state.
before:
[429.933010 power state 3 = S0, in 0x043f]
[429.933240 power state 7 = S0->S3, in 0x043f]
[429.933614 power state 2 = S3, in 0x042b]
[429.934013 power state 8 = S3->S5, in 0x0428]
after:
[20.355975 power state 3 = S0, in 0x003f]
[20.356194 power state 7 = S0->S3, in 0x003f]
[20.363957 power state 2 = S3, in 0x002c]
[20.364179 power state 8 = S3->S5, in 0x002c]
[20.364877 power state 1 = S5, in 0x0008]
Change-Id: Ie843bdcf740f3dbc1b866a0356cea2a8b42d4194
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/189092
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Big can't be powered on by using 4s LGC AC14B8K battery.
Thus, add 4s battery definition to ec.
BRANCH=big
BUG=chrome-os-partner:26533
TEST=flash ec to big device and confirm battery works
Change-Id: I32d2eb2fabc70f3fc075a49a67c1fd4d30975981
Signed-off-by: MilesDY_Chen <MilesDY_Chen@compal.com>
Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/188651
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We don't have available GPIO pin for power button as the hibernate
(stand-by) wake-up source. Also, we don't want to do board change.
So, put the EC in a decent infinite loop to pretend the hibernate mode
and wait for particular wake-up event. This should be fine because
the AP is already down before EC hibernates.
BUG=chrome-os-partner:25435
BRANCH=Nyan
TEST=see comment #6 of issue for detailed test steps.
Change-Id: I2cae131789f9ca5808b60d5f2495222ca9016e7c
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/186061
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This command wedges the I2C bus by writing part of a byte to or reading part
of the response from the slave device.
To enabled the wedge command you must define CONFIG_CMD_I2CWEDGE and you must
define I2C_PORT_HOST, the i2c port to use the wedge command.
BUG=chrome-os-partner:19286
TEST=Manual test on peach pit, spring, and glimmer. Define config in board.h
to enable the command:
On the EC console, execute the following "i2cwedge" command
i2cwedge 0x90 0 1 (wedge write)
or
i2cwedge 0x90 0 2 (wedge read)
and then "battery". Observe that the command reports an error.
Similarly, execute
i2cwedge 0x90 0 5 (wedge write + reboot)
or
i2cwedge 0x90 0 6 (wedge read + reboot)
on the EC console and observe a reboot. Then execute "battery" and observe
that the command works properly.
BRANCH=none
Change-Id: I10ccb21b047df907a4dfdbd84c0f582cfa2d939a
Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/66389
Tested-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
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Move the CLZ instruction emulation C code to the common directory, so it
can be reused for all CPU cores missing a CLZ instruction (e.g. CortexM0).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=run EC console on STM32F072B Discovery board with Cortex-M0 core,
and pass all available unit-tests on target.
Change-Id: Ief56cac7430fcb0fbced8a8925250c89cbd0bcfc
Reviewed-on: https://chromium-review.googlesource.com/188981
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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On some CPU cores, the compiler needs an helper to perform the 64-bit
multiplication.
As the only 64-bit multiplication in the code base is not necessary, fix
it rather than adding the helper.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=build for Cortex-M0 platform.
Change-Id: Id5d6b4b6641f81732a456dacb78dee7262f6729d
Reviewed-on: https://chromium-review.googlesource.com/188980
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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BRANCH=big
BUG=chrome-os-partner:26533
TEST=emerge-nyan_big chromeos-ec; flash big board, verify
ec is alive and version is reported as big
Change-Id: Idbf84d029b5c7b7c198f8c4a2bd2a90d79524441
Reviewed-on: https://chromium-review.googlesource.com/188926
Tested-by: Katie Roberts-Hoffman <katierh@chromium.org>
Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
Commit-Queue: Katie Roberts-Hoffman <katierh@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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The charger task was holding this either on or off in S3, no matter what we
wanted. We really only need to set it at S3->S0 or S3->S5, or when the
lid opens or closes. The rest of the time we should be able to turn it off
and on with gpioset, for testing purposes.
BUG=chrome-os-partner:26502
BRANCH=ToT
TEST=manual
Check the state with
gpioget TOUCHSCREEN_RESET_L
Open and close the lid, suspend the AP with powerd_dbus_suspend, etc. The
touchscreen should be on when the lid is open and the AP is in either S3 or
S0, off when the lid is closed or the AP is off.
Then
gpioset TOUCHSCREEN_RESET_L 1
gpioget TOUCHSCREEN_RESET_L
gpioset TOUCHSCREEN_RESET_L 0
gpioget TOUCHSCREEN_RESET_L
The change should persist as long as nothing else changes.
Change-Id: If7b6f809b1b28ae2699d0fbc6c9b2305fc57cbff
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/188869
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Refactored the i2c unwedge code to place it in the common directory
so that any EC chip can use it.
Added to the STM32F and LM4 boards, code to automatically detect and
unwedge the i2c bus at the start of an i2c transaction. Note that STM32L
already had this ability.
To enable unwedging of the i2c port though, the gpio pins for SDA and
SCL must be defined in the i2c_ports[] array in the board.c file. This
allows the i2c module to bit bang the unwedging for the given port. If
SDA and SCL are not defined for the port, then the unwedge code will
not run.
BUG=chrome-os-partner:26315, chrome-os-partner:23802
BRANCH=none
TEST=Manual testing on machines with different EC chips.
Testing made extensive use of https://chromium-review.googlesource.com/66389
in order to force wedging of the i2c bus so that we can attempt to unwedge
it. Note that you can easily test if the bus is wedged by running i2cscan.
On pit and spring:
On pit, after each of the following, I verified that the bus was automatically
unwedged.
On spring, the unwedge only runs at reboot, so, for the non-reboot wedge
commands, I manually ran console command unwedge, and verified that the bus
became unwedged.
(1) Bit bang a transaction but only read part of the response.
Command to wedge: i2cwedge 0x90 0 2 2
(2) Bit bang a transaction to do a "write" and stop while the other side is
acking. Command to wedge: i2cwedge 0x90 0 1
(3) Same as (1) but do a reboot instead of returning and see
that the unwedge works at init time w/ no cancelled transactions.
Command to wedge: i2cwedge 0x90 0 6 2
(4) Same as (2) but do a reboot instead of returning and see
that the unwedge works at init time w/ no cancelled transactions.
Command to wedge: i2cwedge 0x90 0 5
On glimmer:
Added code to call i2c_unwedge in accel_init(). Then tested unwedging the
accelerometer with the following. One extra difficulty testing this with
the accelerometer is that sometimes the bit you stop on is high, which
means it won't be wedged at all, the next start transaction will reset
the bus. So, sometimes running i2cwedge won't wedge the bus and sometimes
it will depending on the acceleration data.
(1) Big bang transaction to do a "read" of accelerometer and stop partway:
i2cwedge 0x1c 0x0f 2 2
i2cscan to make sure bus is actually wedged
i2cunwedge
i2cscan to make sure bus is now unwedged.
(2) Bit bang transaction to do a "read" and stop partway, then reboot:
i2cwedge 0x1c 0x0f 6 2.
i2cscan to verify that the bus is working after the reboot.
Change-Id: Ie3328e843ffb40f5001c96626fea131c0f9ad9b1
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/188422
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Compiling with coverage enabled screws up the time that things take, so
don't test for a particular speedup in that case. It fails unreliably.
BUG=chrome-os-partner:20881
BRANCH=ToT
TEST=manual
cd src/platform/ec
make coverage
Before, it failed about half the time. Now it doesn't.
Change-Id: I535f0193bf450a922b486777b296fea1b2768a1a
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/188790
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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The EC had inputs with internal pullups on SUS_STAT#, SUSPWRDNACK, and
SLP_SX#. But we never used those signals for anything. The pullups
cost 1.5 mW power in S3. So, remove those signals and their pullups.
They can be turned back on via CONFIG_CHIPSET_DEBUG.
BUG=chrome-os-partner:25568
BRANCH=rambi
TEST=build with and without CONFIG_CHIPSET_DEBUG. Verify gpioget and
powerindebug show the signals only when it's defined.
Change-Id: I0851243615c91a3aa8aa1b28df70809b578d2e74
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/188389
Reviewed-by: Dave Parker <dparker@chromium.org>
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This speeds up memset by copying a word at a time.
Ran the unit test on Peppy:
> runtest
...
Running test_memset... (speed gain: 141532 -> 32136 us) OK
...
Ran make buildall:
...
Running test_memset... (speed gain: 1338 -> 280 us) OK
...
TEST=Described above.
BUG=chrome-os-partner:23720
BRANCH=none
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: If34b06ad70f448d950535a4bea4f6556627a9b6f
Tested-by: Daisuke Nojiri <dnojiri@google.com>
Reviewed-on: https://chromium-review.googlesource.com/185936
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@google.com>
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Previously, it could only read 8 or 16 bit values
BUG=chrome-os-partner:26191
BRANCH=rambi
TEST=manual
Counted string for battery manufacturer name:
> i2cxfer rlen 0 0x16 0x20 16
Data: 0653696d706c6fe1e1e1e1e1e1e1e1e1
Read lifetime data block 1 (also tests 16-bit writes)
> i2cxfer w16 0 0x16 0 0x60
> i2cxfer rlen 0 0x16 0x23 32
Data: 20d2d2d2d2948700000d0a0a060a000000020000000000000000000000000000
Read lifetime data block 2
> i2cxfer w16 0 0x16 0 0x61
> i2cxfer rlen 0 0x16 0x23 27
Data: 1b0000000000010200010c02000201000100000300002008082009
8 and 16 bit reads still work
> i2cxfer r 0 0x16 0x23
0x1b [27]
> i2cxfer r16 0 0x16 0x23
0x001b [27]
Change-Id: Ibba5aced60c0b2de04c3f86cf5fd2ab3db1b6308
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/188379
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Two bugs are:
- Need to grab the I2C port mutex before performing i2cxfer.
- Added sending software reset command to accelerometers on init.
This is necessary because the accelerometers can be powered
through an EC reboot, and it's important we restore them to a
known state.
BUG=none
BRANCH=rambi
TEST=Manually set accelerometer setting, rebooted, manually read
that setting and verified it was restored to default.
Change-Id: Ic3034ae39c936e07ca28458a60557b9623674ff1
Original-Change-Id: I0ea571f3a8dc46052128def24cbb5c1c29638469
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/188349
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/188387
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Changed speed of accelerometer i2c bus to 400kHz.
Added an accelerometers present bit to the status byte for host shared
memory so that the host knows whether this system has accelerometers or
not.
BUG=chrome-os-partner:25599
BRANCH=rambi
TEST=manual test with a glimmer.
To test speed, just ran for a while at 400kHz and made sure there were
no i2c errors and the data looked accurate using the lidangle on command.
To test the accelerometers present bit, I used the kernel patch for the
cros_ec_accel driver. First, I verified that without this patch, the kernel
driver throws an error when loading the module. Second, I verified that
with this patch the module was loaded successfully.
Change-Id: I19b8e800748b0d45dc1da6c59118e92b4908ee2f
Original-Change-Id: If931b37bf057df96659852ef9699b3e6029275c7
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187732
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/188386
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Added rotation of accelerometer data into a standard reference frame
so that the host does not have to know about the orientation of the
sensors.
Also added a calibration routine to calibrate the rotation matrix to
get to the standard reference frame. Cleanup up calibration in the
process to make it more user friendly.
Changed the default accelerometer sampling rate to 100Hz.
BUG=chrome-os-partner:25599
BRANCH=rambi
TEST=Tested the full calibration routine on a glimmer at my desk.
Used 'taskinfo' and verified that the higher sampling rate does not
bog down the EC. I found that the motion sense task is running for
about 200ms every 10 seconds, so about 2% CPU load.
Change-Id: I9ca1a4252f62a54016009c7d5e43b4cb1adf7e1d
Original-Change-Id: Id554511f7cc9549dfc9ed2d6337216bfa639359d
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187172
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/188385
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The BQ24192 driver exports some functions that should be static. Let's mark
them so, mostly so I don't keep finding them when I search through the code
for common functions.
Note that nothing in the ToT branch uses this module anyway.
BUG=chrome-os-partner:23815
BRANCH=ToT
TEST=make buildall -j
Change-Id: I012111a2c9b9b84f0f3bfacc3bdc8804a83116a6
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/188179
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This was always supposed to be open drain.
BUG=chrome-os-partner:22870
BRANCH=ToT,samus
TEST=manual
Try turning it off and back on again. ;-)
gpioset TOUCHSCREEN_RESET_L 0
gpioset TOUCHSCREEN_RESET_L 1
gpioset TOUCHSCREEN_RESET_L 0
Change-Id: I5e2a49c979294f68b86e2c91d2ccee5f6128ef5a
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/188045
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Dynamic Power Management enables proper regulation of
the input adapter current set in board.h.
BUG=chrome-os-partner:24933
BRANCH=None
TEST=Power a DUT with a bench supply. Verify the
input current doesn't exceed the input current limit
set in board.h while the system is under load and
charging the battery.
Change-Id: Ie68d92afe0ef89c691f460d120f8574cb17e2c4e
Original-Change-Id: Ida6b05f1d89b21d7cf1553f5e9936360679f8149
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187517
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187911
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BUG=chrome-os-partner:25977
BRANCH=None
TEST=Run 'adc' console command on a heavily loaded system while
charging the battery. The current reported should be around the
CONFIG_CHARGER_INPUT_CURRENT limit.
Change-Id: I1b4089d00182ce7d286b387361a63edade626f38
Original-Change-Id: I18e5bbb0a45312afbcb7d989517a86b97646c2da
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187018
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187887
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There's already a host command, but no console command. We should add one.
BUG=none
BRANCH=ToT, Samus
TEST=manual
From the EC console, run
lightbar version
It should display the version number and flags value.
Change-Id: Ide3517c0a71b5d78c4c4d849a952ccc1d908ea23
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187679
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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The EC already provided this information, but ectool wouldn't print it.
BUG=chrome-os-partner:23803
BRANCH=samus
TEST=from ec console, 'fanset 0 3000' and 'fanset 1 1000'
ectool pwmfangetrpm -> prints both fans
ectool pwmfangetrpm all -> prints both fans
ectool pwmfangetrpm 0 -> prints ~3000
ectool pwmfangetrpm 1 -> prints ~1000
Change-Id: I19d3081d09edd42c16bf8b0cdbc48ca58d134027
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187454
Reviewed-by: Sameer Nanda <snanda@chromium.org>
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Previously, the AP could only set the current wireless power state.
It couldn't determine what the EC would do in S3, nor could it get the
current wireless power state. Extend the wireless command to do so,
and add an EC console command to aid in debugging.
BUG=chrome-os-partner:25655
BRANCH=rambi
TEST=manual; expected numbers are from EC 'wireless' command
AP off -> 0x0, 0x9
AP on -> 0xd 0x9
AP suspended -> 0x9 0x9
AP on -> 0xd 0x9
ectool wireless 0x1 -> 0x1 0x9
ectool wireless 0xd -> 0xd 0x9
ectool wireless 0 0 0 0 -> 0xd 0x9 (and prints 0xd 0x9 to root shell)
ectool wireless 5 -1 -1 0 -> 0x5 0x9
AP suspended -> 0x1 0x9 (doesn't turn on 0x8, just turns off 0x4)
AP on -> 0xd 0x9
ectool wireless 0 0 0 -1 -> 0xd 0x0
AP suspended -> 0x0 0x0
AP on -> 0xd 0x9
Change-Id: I8ead2d4a4423b51ec4f638bf94c62de98726b25c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187273
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After each read of the accelerometers, add accelerometer
data to LPC shared memory.
BUG=none
Original-BUG=chrome-os-partner:25599
BRANCH=rambi
TEST=Manual test by reading the LPC shared memory through cros_ec
in the kernel.
Original-Change-Id: If66df3fcb32b5423f4fa7dd471c219a1c4df7095
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/186456
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit 919ea7fe1f830235ae56829a8ee4435679dec124)
Change-Id: I10525c45e868d0b04aa84c27cab3b6baeda2b0d5
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187435
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Added unit test for motion_sense lid angle calculations.
Added unit test for math_util arc_cos() function.
BUG=none
Original-BUG=chrome-os-partner:25640
BRANCH=rambi
TEST=make buildall
Original-Change-Id: I35debf6fc0e2d9996debc2ede175acaa060df627
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/186720
Reviewed-by: Vic Yang <victoryang@chromium.org>
(cherry picked from commit 55c3e8ee14693d6d667b5d21f0dcbb14d185ccbe)
Change-Id: I017315128f318424cd3000affae785c69afd29d6
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187434
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Added motion sense task to Clapper and Glimmer. This task samples
the accelerometers and calculate a lid angle. Note that as
the machine is rotated towards the hinge angle aligning
with gravity, the lid calculation becomes less trustworthy.
Added a math_util file to hold various mathematical functions
useful for calculating lid angle that may be helpful in other
places.
For each board with accelerometers we need to define some
orientation specific data in board.c. There is a calibration
procedure through the EC console that can be enabled by
defining CONFIG_ACCEL_CALIBRATE. The calibration procedure can
help determine the orientation data required.
For debugging purposes there is a console command to regularly
print to the EC console the accelerometer data and derived lid
angle. The console command can be enabled by defining
CONFIG_CMD_LID_ANGLE.
BUG=none
Original-BUG=chrome-os-partner:24703
BRANCH=rambi
TEST=Ran the calibration procedure on a Glimmer unit, and then
rotated the machine in space. Verified that the lid angle
calculated roughly matched actual lid angle.
Original-Change-Id: I63a5e384b7f6b628b4ea01de49843355fb8d6ebe
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/184783
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Alec Berg <alecaberg@chromium.org>
(cherry picked from commit efb07945a5159fa0e7a746c666b2519ebdca9c22)
Conflicts:
board/clapper/board.c
board/clapper/ec.tasklist
board/glimmer/board.c
board/glimmer/ec.tasklist
Change-Id: Ibc492ef5c11e7084e87f01338c4d7775f9a08c18
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187433
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Added accelerometer driver for kxcj9 accelerometers. Currently
the accelerometers aren't being used by anything, but there are
console commands, accelwrite and accelread, to perform transactions.
BUG=none
BRANCH=rambi
TEST=Used EC console commands to test that accelerometers respond
and data looks reasonable.
Original-Change-Id: I6ddcf04ec278adeacb148c19b10c3c296b467954
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/184693
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit 5e1d2052b034b2400b98b2126243e01397a2ce56)
Conflicts:
board/clapper/board.c
board/clapper/board.h
board/glimmer/board.c
board/glimmer/board.h
Change-Id: If8744ddc3273fc08e29830adfd068dc302dd120a
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187432
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Previously, it would only set the fan RPM, but not actually enable the
fan so it can spin at the requested speed. Compare with setting fan
duty cycle, which always enabled the fan.
BUG=chrome-os-partner:23803
BRANCH=samus
TEST=with fans off, 'ectool pwmsetfanrpm 1000' should spin both fans,
and the ec 'faninfo' command should show both fans enabled.
Change-Id: I37d7fb05309944ab6f98333e2cf3b38ea2dd38e9
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187386
Reviewed-by: Sameer Nanda <snanda@chromium.org>
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Off-by-one error in read() call.
BUG=chromium:239205
BRANCH=none
TEST=none
Change-Id: Ifec3dacfa07e83d70b2582036cab0cfc1ee9e8f7
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/186738
Reviewed-by: Dave Parker <dparker@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This is just an example, demonstrating how a userspace program can access
and control the Pixel lighbar. This change reflects the new unprivileged
access methods. You can run this program to drive the lightbar without being
root.
BUG=chromium:239205
BRANCH=none
TEST=manual
Nothing builds this by default, but you can test it with
cd src/platform/ec
gcc -static util/lbplay.c
then copy a.out to your Pixel and run it (from /tmp, since other directories
are mounted noexec).
Change-Id: I7c07512087c924d16c1c03df6176fba995fcd4f4
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/186672
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Nyan uses common/charge_state instead. So, fix the dependence.
Since snow/spring/pit are using common/pmu_tps65090_charger, keep them.
BUG=None
BRANCH=Nyan
TEST=build and works fine on Nyan 3.2
Change-Id: I985f7980578ac22602b1fbffa51edf039078bc05
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/186337
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This speeds up memmove by copying a word at a time.
Ran the unit test on Peppy:
> runtest
...
Running test_memmove... (speed gain: 2156 -> 592 us) OK
...
Ran make buildall:
...
Running test_memmove... (speed gain: 143918 -> 32367 us) OK
...
TEST=Described above.
BUG=chrome-os-partner:23720
BRANCH=none
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@google.com>
Change-Id: I6a3ac6aed27a404c3bef227b6c886a59414b51d7
Reviewed-on: https://chromium-review.googlesource.com/186020
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Samsung change the temperature range in battery discharing state from (0
<=temp < 100) to (-20 <= temp < 70) from this year. That's why we have to
change the battery_temperature_range structure value as soon as possible
so that our reliability team check the battery.
BUG=chrome-os-partner:25731
TEST=Boot on the pit / pi and then check the battery is working or
not in the oven.
BRANCH=pit
Change-Id: I3289d22176af043e80a881f1626da386e823d857
Signed-off-by: Jaehoon Kim <jh228.kim@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/186040
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This speeds up memcpy by copying a word at a time if source and destination are
aligned in mod 4. That is, if n and m are a positive integer:
4n -> 4m: aligned, 4x speed.
4n -> 4m+1: misaligned.
4n+1 -> 4m+1: aligned in mod 4, 4x speed.
Ran the unit test on Peppy:
> runtest
...
Running test_memcpy... (speed gain: 120300 -> 38103 us) OK
...
Ran make buildall -j:
...
Running test_memcpy... (speed gain: 2084 -> 549 us) OK
...
Note misaligned case is also optimized. Unit test runs in 298 us on Peppy while
it takes about 475 with the original memcpy.
TEST=Described above.
BUG=chrome-os-partner:23720
BRANCH=none
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: Ic12260451c5efd0896d6353017cd45d29cb672db
Tested-by: Daisuke Nojiri <dnojiri@google.com>
Reviewed-on: https://chromium-review.googlesource.com/185618
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@google.com>
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BUG=None
BRANCH=rambi
TEST=None
Change-Id: I702173af23e6207129149bdb83ec7116fec8af66
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/185394
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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cutoff() returns 0 on success, not non-zero.
BUG=chrome-os-partner:25646
BRANCH=rambi
TEST=ectool batterycutoff succeeds
Change-Id: Icca0c53aba82381b73dd679de5df3a97153d0662
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/185737
Reviewed-by: Benson Leung <bleung@chromium.org>
Reviewed-by: Dave Parker <dparker@chromium.org>
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This script has been deprecated for more than a month. It's time to
remove it.
BUG=None
TEST=None
BRANCH=None
Change-Id: I6604d556e37ad90d9e9bec01664cbfaafcfb7a51
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/185541
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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This gives the AP a way to see that temperature for DPTF. Alarm
thresholds were defined on a per-sensor basis, so they come along for
free.
BUG=chrome-os-partner:25585
BRANCH=rambi
TEST=temps command shows same temp for battery as battery command (other
than rounding error; battery command shows with 0.1C accuracy).
'ectool temps all' shows the battery temp as the last temperature.
Unplug battery and temps command shows error for the battery temp,
as does 'ectool temps all'.
Change-Id: I1bce72f164d9fb1be631e7241a4ea24ddf409d7a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/185444
Reviewed-by: Dave Parker <dparker@chromium.org>
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This is experimental for now; the capsense chip simply reports its buttons
as the number keys on the keyboard (1-8).
BUG=chrome-os-partner:23382
BRANCH=samus,ToT
TEST=manual
To test, you'll need a reworked and correctly programmed capsense module.
Boot the system, and switch to VT2. Touch the capsense bar and you'll see
the input appear on the console as though you were typing numbers.
Note that the capsense hardware is still buggy. Refer to the bug for
workarounds.
Change-Id: I4c3a8b70b8197ffd538c38c59c9336383365afa7
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/185434
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Dave Parker <dparker@chromium.org>
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This enables the AP to limit charging current via ACPI.
BUG=chrome-os-partner:23971
BRANCH=rambi
TEST=manual
drain battery down to <90%, then plug into AC
(charger commands at EC console, iotools at root shell)
iotools io_write8 0x66 0x81
iotools io_write8 0x62 0x08
iotools io_write8 0x62 3
charger -> dptf limit 192, I_batt=192
charger dptf 320
charger -> dptf limit 320, I_batt=320
iotools io_write8 0x66 0x80
iotools io_write8 0x62 0x08
iotools io_read8 0x62 -> 0x05
iotools io_write8 0x66 0x81
iotools io_write8 0x62 0x08
iotools io_write8 0x62 0xff
charger -> dptf disabled, I_batt=(something > 192)
iotools io_write8 0x66 0x80
iotools io_write8 0x62 0x08
iotools io_read8 0x62 -> 0xff
Change-Id: Iace2ebbbc018143c0154310d7acd02d16a6b7339
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/185411
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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Also removes a useless BUILD_ASSERT.
BUG=None
BRANCH=None
TEST=Boot kernel with cmdline arg i8042.direct=1 to force
set2 mode. Push volume up/down & power key.
Change-Id: I1689f06c5ae690624733c0625ce043cb1462abd0
Original-Change-Id: Ifc735d66b2f707e68b5c59959c47a0e295a7688c
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/185392
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/185315
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We copied that delay because it seemed to be necessary on early LM4
chips to avoid glitching the UART. But on current boards (e.g. rambi)
this does not seem to be necessary, and delays boot by 31ms. So,
remove the delay.
BUG=chrome-os-partner:23794
BRANCH=rambi
TEST=boot system; see little to no glitching on EC uart, and system boots ok
hibernate 1; see little to no glitching on EC uart, and system boots ok
Change-Id: I9d4b5927da4282e47e1b09be838104c64f25268c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/185232
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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Green when charged and ext. power plugged in.
Orange when charging.
Blinking orange if there is a charging/battery related error.
Blinking green if in "charge force idle mode" in the factory.
Off otherwise.
BUG=chrome-os-partner:23634
BRANCH=rambi
TEST=test each of the states above
To fake battery error, unplug battery and wait 30 secs
To force idle, 'ectool chargecontrol idle'
Change-Id: I85fff72d1df85bbbaa1da66572f44f58a960244e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/185240
Reviewed-by: Dave Parker <dparker@chromium.org>
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Change 18baa15 made a call to keyboard keyboard_update_button
conditional on running the KEYPROTO task. This call is needed
for the button unit test.
This fixes a test breakage when running "make buildall"
BUG=None
BRANCH=ToT
TEST=Run "make buildall -j32" "make BOARD=glimmer tests -j32"
and "make BOARD=rambi tests -j32" successfully with a
"make clobber" in between.
Signed-off-by: Dave Parker <dparker@chromium.org>
Orig-Change-Id: I6f10577ffd189fee7081aa65cf5adb9075c95373
Reviewed-on: https://chromium-review.googlesource.com/185104
Tested-by: Dave Parker <dparker@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Commit-Queue: Dave Parker <dparker@chromium.org>
(cherry picked from commit c267054850c4b296a364e975063c634f34d701e9)
Change-Id: I92932577e83561530ef288c6ede211fa809962f8
Reviewed-on: https://chromium-review.googlesource.com/185245
Tested-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Randall Spangler <rspangler@chromium.org>
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