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* zephyr: Remove tp register from panic liststabilize-14633.B-mainYuval Peress2022-03-251-1/+0
| | | | | | | | | | | | | | Upstream zephyr removed this register. BRANCH=none BUG=none TEST=zmake configure --build krabby Cq-Depend: chromium:3542110 Signed-off-by: Yuval Peress <peress@google.com> Change-Id: I72da6f58f2d022cce0628dbcb3be653a774132c4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3551641 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: emul: Log messages in TCPC partner on DBG levelTomasz Michalec2022-03-251-1/+1
| | | | | | | | | | | | | | | | Log messages received by TCPC partner emulator on debug level to reduce output on test execution. BUG=none BRANCH=none TEST=zmake configure --test test-drivers Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: I1d7dec32c840aa54496cfb2263602eaaedfb42d5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3548921 Tested-by: Tomasz Michalec <tmichalec@google.com> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Tomasz Michalec <tmichalec@google.com>
* zephyr: Add test memory heapTomasz Michalec2022-03-254-13/+50
| | | | | | | | | | | | | | | | | | Add memory heap that is exclusive for test utilities and is separate from system memory (allocated using k_malloc() and k_free()). Memory can be allocated using test_malloc() and test_free() functions. This way it is completely separate from system wide memory pool. BUG=b:224930006 BRANCH=none TEST=zmake configure --test test-drivers Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: I009a7e4c96ab989e9b1ca0719e247c8770b26fc3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3536367 Tested-by: Tomasz Michalec <tmichalec@google.com> Reviewed-by: Al Semjonovs <asemjonovs@google.com> Commit-Queue: Tomasz Michalec <tmichalec@google.com>
* ap_pwrseq: emit a PRE_INIT event on G3->S5 transitionPeter Marheine2022-03-252-1/+8
| | | | | | | | | | | | | | | | | | | | | There is currently no event that gets emitted for the G3->S5 transition, but legacy ARM boards use PRE_INIT in a similar way. Legacy ARM power code emits PRE_INIT on transition from S5 to S3, but that is the transition in which SoC power is first applied because they lack a soft-off state similar to S5. Since this adds new meaning to PRE_INIT where it was previously unclear, the event is documented to be the transition from G3 to S5. BUG=b:226215993,b:226513200 TEST=PRE_INIT is now emitted on S5 entry on Nereid BRANCH=none Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I3ca64a309221c87583d8ae5ea8806f5ee465b0df Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3551996 Reviewed-by: Andrew McRae <amcrae@google.com> Reviewed-by: Li1 Feng <li1.feng@intel.com>
* corsola: disable USB4,TBT modeEric Yilun Lin2022-03-251-0/+4
| | | | | | | | | | | | | | | They are not supported on corsola. BUG=none TEST=kingler boots BRANCH=none Change-Id: Ibc08030ef422933e51cb773306d34bc2c4048f04 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3545782 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com>
* primus: Add genvif overridesScott Chao2022-03-251-3/+117
| | | | | | | | | | | | | | | | | | | | This adds VIF overrides to describe brya's USB setup. The override values are largely based on - Add Port1 USB4 Port support - Remove Port2 related component BUG=b:214339085 BRANCH=none TEST=make -j BOARD=primus imported resulting build/primus/primus_vif.xml into VifEditor 3.2.3.0. there were no highlighted (error) fields. Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Change-Id: Ife290a0f4813cbc0a8bb0310a81be09e39b91916 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3552001 Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: caveh jalali <caveh@chromium.org>
* rt1718s: fix FRS support by decoupling PPC/TCPC driverEric Yilun Lin2022-03-252-6/+32
| | | | | | | | | | | | | | | | | | | | Decouples the FRS functions by not making TCPC driver calling functions in PPC driver, or it may access the wrong i2c device (ppc_config[port].driver) when we don't use (configure) rt1718s PPC. BUG=b:223086905 TEST=ensure the rt1718s tcpc frs function is accessing the correct i2c address BRANCH=none Change-Id: Ib17db466abd30406606cc7af3ebf457681ea2843 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3506875 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com>
* npcx: Set SOC log level to ERRAndrew McRae2022-03-242-0/+2
| | | | | | | | | | | | | | Set SOC logging level to ERR so that PM trace LOG_INF messages do not spam the console. BUG=b:216921645 TEST=zmake build nivviks; flash and run BRANCH=none Signed-off-by: Andrew McRae <amcrae@google.com> Change-Id: I401e86a54e437600d502ae4c2c65e261aa5fd6a2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3547916 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: mchp: Add shim systemmartin yan2022-03-242-0/+85
| | | | | | | | | | | | | Add shim layer system code BUG=none BRANCH=main TEST=zmake testall Signed-off-by: martin yan <martin.yan@microchip.corp-partner.google.com> Change-Id: Ie80fff9e9ff5888690ed39da80a406997246238e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3546978 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* zephyr: CBI documentationDenis Brockus2022-03-247-91/+344
| | | | | | | | | | | | | | BRANCH=none BUG=b:222105950, b:226143500 TEST=none Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Ibf7f8be8aae82fa776f6165ef9d82a6aa3ab76cc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3500076 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: update pm_constraint_get to match upstreamYuval Peress2022-03-242-2/+4
| | | | | | | | | | | | | | | Upstream change updated the pm_constraint_get function name to pm_policy_state_lock_is_active. BRANCH=none BUG=none TEST=zmake testall Cq-Depend: chromium:3532371 Signed-off-by: Yuval Peress <peress@google.com> Change-Id: I8c5fb0de4542adeb1a1397d6090322cd9535dd8f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3547572 Reviewed-by: Aaron Massey <aaronmassey@google.com>
* zephyr: kingler: enable CHARGER_DISCHARGE_ON_ACwen zhang2022-03-241-0/+1
| | | | | | | | | | | | | | | We should enable PLATFORM_EC_CHARGER_DISCHARGE_ON_AC for toolkit charge and discharge test. BUG=b:222637801 BRANCH=none TEST=ectool chargecontrol discharge works well Change-Id: I68354211a44d03274123b6248b7e9393675ac639 Signed-off-by: wen zhang <zhangwen6@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3503079 Reviewed-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Reviewed-by: Eric Yilun Lin <yllin@google.com>
* brya: Use GPIO and host event when generating MKBP eventsSubrata Banik2022-03-241-1/+1
| | | | | | | | | | | | | | | | | | For waking the system from suspend, the plan is to use the host event (SCI) to perform the wakeup, and use the GPIO for IRQ signalling. BUG=b:222375516 TEST=Able to see EC events in elogtool list, like Key Pressed and Lid Open. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Id31b921295b8ca5d62e1fb30c8260ab4586e51cd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3544873 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Subrata Banik <subratabanik@chromium.org> Commit-Queue: Subrata Banik <subratabanik@chromium.org> Tested-by: Subrata Banik <subratabanik@chromium.org> Auto-Submit: Subrata Banik <subratabanik@chromium.org>
* Banshee: sync low battery percent with OSLeo-Tsai2022-03-241-9/+23
| | | | | | | | | | | | | | | This patch is modified low battery percent sync with OS BUG=b:208182468,b:220954645 BRANCH=none TEST=build make -j BOARD=Banshee pass, verified the low battery and battery error can blink red color Signed-off-by: Leo-Tsai <leocx_tsai@compal.corp-partner.google.com> Change-Id: Id4f2d691061431af1f30428abd0254dbd9cacc88 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3547318 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Boris Mittelberg <bmbm@google.com>
* rt1718s: fix rt1718s_gpio indexEric Yilun Lin2022-03-241-1/+1
| | | | | | | | | | | | | | | | | | The index is counted starting by 1 in the datasheet. BUG=b:223086905 TEST=ec:~$ rt1718s_gpio C1 GPIO1 OD=0 PU=0 PD=0 OE=1 HL=0 C1 GPIO2 OD=0 PU=0 PD=0 OE=1 HL=0 C1 GPIO3 OD=0 PU=0 PD=0 OE=1 HL=0 BRANCH=none Change-Id: Ib7f7e9114c03fe39cc828c7942743a75351cf98d Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3506874 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com>
* zephyr: fix missing USB_PD_DISCHARGE* macrosEric Yilun Lin2022-03-242-0/+16
| | | | | | | | | | | | | | | | | The macros are missing in the config_chip.h. Also, the config is actually not enabled in the test config, so to ensure the consistency and to prevent the broken test so disable it. BUG=none TEST=zmake test BRANCH=none Change-Id: I07b86fa0cc8cc9f832baa060335df14c2c340b6b Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3506873 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com>
* zephyr: add GPIO enum GPIO_USB_CX_DISHCARGEEric Yilun Lin2022-03-241-0/+3
| | | | | | | | | | | | | | | It's missing so add the enum. BUG=none TEST=zmake testall BRANCH=none Change-Id: Ie3ac609a29778316c6c11252cb5d57297525bcca Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3512277 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com>
* corsola: implement FCFS on SVDM exitTing Shen2022-03-242-7/+25
| | | | | | | | | | | | | | | | Don't toggle hpd pin when unplug a non-active DP port. BUG=b:223088393 TEST=1) manually verify that b:223088393 is not reproducible 2) Check ec_ap_dp_hpd_odl state after random plug/unplug operations BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: Iccd6a426717d0150b243793dab36d0ffc3e44176 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3541661 Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* fan: npcx: fine tune the fan controlJun Lin2022-03-241-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | The fan used on the Vell platform requires a longer response time than others. It needs about 1 second to output the TACH signal to EC after EC starts to toggle the PWM signal. During this period, the fan driver adjusts the PWM duty per 200 milli-seconds and has the chance to let the duty reach 100% with the original fan control mechanism. It makes the user feel the fan spins unsmoothly. To bypass it, this CL steps the PWM duty not too aggressively when two consecutive RPM reading is zero. BUG=b:225208265 BRANCH=none TEST=pass "make buildall" TEST=set RPM=3000 on VELL, the fan duty doesn't reach 100% afer 1 second. Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Change-Id: Idc14c859576247759e9119abee5fdeb1f483331d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3539776 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com>
* krabby: disable i2c3 in G3 stateDino Li2022-03-241-0/+32
| | | | | | | | | | | | | | | | | This is workaround for i2c enhance channels will block chip to enter low power if clock and data pins aren't both at high level. BRANCH=none BUG=b:220647142 TEST=power number is reduced in G3 on krabby. i2c3 works in S0 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I00590791c36885a58e868a6cc4bbd40545b2403f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3544756 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@google.com>
* Revert "primus: fix Goodix touchpad initialize failed"Scott Chao2022-03-242-20/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit ab207f02263624b765508a17a7fea36071770b8b. Reason for revert: This change will break trackpoint fw update. Original change's description: > primus: fix Goodix touchpad initialize failed > > Goodix touchpad AVDD need to pull low to 0V when poweroff. > Setting PS2 module in GPIO.inc will let AVDD have 0.9V offset. > So we need to enable PS2 module later than PLTRST# to avoid the 0.9V > offset. > > BUG=b:214150759 > BRANCH=none > TEST=make -j BOARD=primus > TEST=verified by Goodix > > Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> > Change-Id: I49869d26262948f7f7242ebe494eef86e459a42c > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3376688 > Reviewed-by: Boris Mittelberg <bmbm@google.com> > Reviewed-by: caveh jalali <caveh@chromium.org> > Commit-Queue: caveh jalali <caveh@chromium.org> Bug: b:214150759 Change-Id: I116489bf3490522ed16309bcdbb394084946d638 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3544169 Tested-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Reviewed-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Auto-Submit: Scott Chao <scott_chao@wistron.corp-partner.google.com> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: caveh jalali <caveh@chromium.org>
* FPMCU/stm32: Compile host_command_common only for FPMCUDaisuke Nojiri2022-03-241-1/+1
| | | | | | | | | | | | | | stm32/host_command_common.c is dedicated to FPMCU. This patch makes it compiled only for FPMCU boards. BUG=None BRANCH=None TEST=buildall Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I7553cc2ce027616abfe4e62afb95cf5793d9c4ff Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3546566 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* Banshee : Enable FRS.Logan_Liao2022-03-243-4/+10
| | | | | | | | | | | | | | | | | | | | | | | This patch enable FRS function. BUG=b:221094331 BRANCH=none TEST=make BOARD=banshee success. Test on DA310 device with FRS function. 1. Connect DA310 into board. 2. Connect adapter to DA310 Type-C port. 3. Connect HDMI monitor to DA310 HDMI port. 4. Disconnect adapter and confirm monitor not shutdown and turn on. Change-Id: I184b447fbe4a465286bc6524dcdb7fece204b57d Signed-off-by: Logan_Liao <logan_Liao@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3499714 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Boris Mittelberg <bmbm@google.com> Reviewed-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Commit-Queue: Logan Liao <logan_liao@compal.corp-partner.google.com>
* Zephyr: Add initial code to enable Meteorlake RVPBrandon Breitenstein2022-03-2414-0/+519
| | | | | | | | | | | | | | | Added in support for the initial Meteorlake RVP code base. This patch enables minimal features in order to get the system to enter S0. BUG=none BRANCH=none TEST=zmake mtlrvpp_npcx and verify system enters s0 on EC console Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com> Change-Id: I66ec23bbe1e3f22d07679565454b72b4de4a5152 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3516598 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: Add trivial test of vboot_hashJeremy Bettis2022-03-233-0/+34
| | | | | | | | | | | | | | | | | | This only tests the host command EC_VBOOT_HASH_START, which doesn't really do anything, but it is a stub for the next person to add more test cases. BRANCH=None BUG=b:214256453 TEST=zmake test -a Signed-off-by: Jeremy Bettis <jbettis@google.com> Change-Id: Icdde811128b66c610eaa37b16d4626728273d287 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3543484 Tested-by: Jeremy Bettis <jbettis@chromium.org> Auto-Submit: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Aaron Massey <aaronmassey@google.com> Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
* zephyr: remove named-batteries nodeDawid Niedzwiecki2022-03-234-84/+4
| | | | | | | | | | | | | | | | | Replace obsolete name-batteries node with the batteries node for tests. Once there are no more named-batteries nodes, remove all sources that are related to this concept. BUG=b:218888909 TEST=zmake testall BRANCH=main Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I6b438e71ccc96159b6e90d99a733d8ac20cf3b6c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3541920 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: fix packet_mode_en assignment in kingler.Ayo Wu2022-03-231-1/+1
| | | | | | | | | | | | | | BUG=b:226313870 TEST=see `VB Verifying hash` for EFS2 in EC console with DT BRANCH=none Signed-off-by: Ayo Wu <ayowu@chromium.org> Change-Id: I589f4445b47d9d2bb94bd9c1c094ff27197c33a2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3505606 Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Ayo Wu <ayowu@google.com> Tested-by: Ayo Wu <ayowu@google.com> Auto-Submit: Ayo Wu <ayowu@google.com>
* zephyr: update Kconfig for PM to match upstreamYuval Peress2022-03-239-9/+9
| | | | | | | | | | | | | | Upstream changes PM_POLICY_APP to PM_POLICY_CUSTOM. BRANCH=none BUG=none TEST=zmake testall Cq-Depend: chromium:3532365 Signed-off-by: Yuval Peress <peress@google.com> Change-Id: I9f4b3429c7816ddb1d33cca6e22e7268da70ec03 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3543941 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: brya: Disable console channelsKeith Short2022-03-231-0/+5
| | | | | | | | | | | | | | | | Disable the console channels "events" and "lpc" to match the legacy EC configuration. Also disable the "hostcmd" channel to further reduce console spam. BUG=none BRANCH=all TEST=boot Zephyr on brya, verify channels disabled using "chan" Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I03a15c2a2db3b0e5b2e6ed0aacd8bb68e3887aec Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3544425 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* zephyr: ap_pwrseq: always define pwrsm_dbgFabio Baltieri2022-03-231-2/+0
| | | | | | | | | | | | | | | These are used in x86_non_dsx_common_pwrseq_console.c regardless of whether the logging subsystem is enabled or not, let's always define them so we can build with CONFIG_LOG=n. BRANCH=none BUG=b:223044986 TEST=zmake build nereid Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: I6394c4f410b64a95c7a69587bfa6e2a4f106a9b7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3542406 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* beadrix : Update lid sensorTeddy Shih2022-03-233-37/+1
| | | | | | | | | | | | | | | | | | As Beadrix project does not have tablet mode capability, we disable unused lid sensor gpio pin, CONFIG_TABLET_MODE, and CONFIG_LID_ANGLE according to schematic. BRANCH=main BUG=b:226296636 TEST=on beadrix, tablet mode will not be lanuched via Lid sensor. Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Change-Id: Ib9201f90996c71481c94d1ef0485dfdac9485f0f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3544874 Reviewed-by: Ivan Chen <yulunchen@google.com> Commit-Queue: Ivan Chen <yulunchen@google.com> Reviewed-by: Super Ni <super.ni@intel.corp-partner.google.com> Commit-Queue: Super Ni <super.ni@intel.corp-partner.google.com>
* nissa: nivviks: Invert the lid accelerometer y and z axes.Sam McNally2022-03-231-2/+2
| | | | | | | | | | | | | Without this change, the display is upside-down when in tablet mode. BUG=b:225289936 TEST=Nivviks display orientation is as expected in tablet mode BRANCH=None Signed-off-by: Sam McNally <sammc@chromium.org> Change-Id: Ic7d5fb30a074d62061a69cc0d53812173f118594 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3544870 Reviewed-by: Andrew McRae <amcrae@google.com>
* taniks: enable BYPASS_CBI_EEPROM_WP_CHECKtony.tang2022-03-231-0/+1
| | | | | | | | | | | | | | | | | | | | | We need to fix the CBI fw_config value on some Taniks EVT units. This will allow us to do it from software without requiring time-consuming manual intervention on every single unit. This config will be removed (along with CONFIG_SYSTEM_UNLOCKED) later when Taniks is closer to MP. BRANCH=none BUG=b:223526806 TEST=make buildall -j TEST=(on taniks) cbi set 6 0x1035 2 Signed-off-by: tony.tang <tony.tang@lcfc.corp-partner.google.com> Change-Id: I5eacafc4c8374adc18a854c9cd6b08e26b679eb6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3515421 Reviewed-by: caveh jalali <caveh@chromium.org> Tested-by: Arthur Lin <arthur.lin@lcfc.corp-partner.google.com> Reviewed-by: Parth Malkan <parthmalkan@google.com>
* nissa: remove manual USB-A VBUS enable twiddlingPeter Marheine2022-03-231-23/+0
| | | | | | | | | | | | | | | | Commit 3fceb32f74625fca5b589410fed37740ee2d0165 enabled this with the standard mechanism, so we can remove this temporary hack. BUG=b:222238390 TEST=en_usb_a0_vbus GPIO automatically changes state with AP power, according to `gpioget en_usb_a0_vbus` BRANCH=none Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I46ab952ba2e191c490a1d10303f1e15992dd4189 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3544751 Reviewed-by: Andrew McRae <amcrae@google.com> Commit-Queue: Andrew McRae <amcrae@google.com>
* krabby: migrate usbc structs to device treeTing Shen2022-03-234-50/+49
| | | | | | | | | | | | | BUG=b:220814055 TEST=manually checked the array content BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I92540572d5c1b05495ae8f45464d1f3a6dbfa704 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3487363 Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* mtk_scp: Merge mt8183 and mt8186 into mt818xJohnson Wang2022-03-2326-59/+533
| | | | | | | | | | | | | | Fix corsola build error. BRANCH=None BUG=b:218771968 TEST=make buildall Change-Id: Ie1a6d09ee2b9d9e5c724a9c679ba3b607b49f3d5 Signed-off-by: Johnson Wang <johnson.wang@mediatek.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3367374 Reviewed-by: Rong Chang <rongchang@chromium.org> Commit-Queue: Rong Chang <rongchang@chromium.org>
* util: align the IN_RANGE implementation with zephyrTing Shen2022-03-237-15/+15
| | | | | | | | | | | | | | | | | | | | The design of IN_RANGE() is slightly different between CrosEC and Zephyr's. Zephyr IN_RANGE() includes both upper and lower bound. (Ref: https://docs.zephyrproject.org/latest/reference/util/index.html#c.IN_RANGE) Update legacy code to work with CONFIG_ZEPHYR. BUG=none TEST=manually verify that all occurarence of IN_RANGE is updated BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I67e83a92be574be96535a3fe1b14454754e32072 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3534749 Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* zephyr: expose enum power_states_ndsx to externalLi Feng2022-03-233-48/+46
| | | | | | | | | | | | | | | | | Other modules, like test, or board specific will need to access this. BUG=none BRANCH=none TEST=zmake configure -b nivviks --clobber; Flash and Nivviks boot up. Signed-off-by: Li Feng <li1.feng@intel.com> Change-Id: I3f5cae98c6d53f06e51f0c898b12afbdf444799d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3544467 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Andrew McRae <amcrae@google.com> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Commit-Queue: Peter Marheine <pmarheine@chromium.org> Tested-by: Peter Marheine <pmarheine@chromium.org>
* scout: use SUSPEND and RESUME hooks for TPU powerPeter Marheine2022-03-233-29/+15
| | | | | | | | | | | | | | | | | | The changes in commit 4481408005a325a7246cefe15d305eb1975c8fac were unnecessarily complex, since HOOK_CHIPSET_RESUME is called on transition to S0 from either S3 or S0ix, and HOOK_CHIPSET_SUSPEND is similarly called when dropping from S0 to either of S3 or S0ix. BUG=b:200923497 TEST=make BOARD=puff BRANCH=puff Change-Id: If3d79ceadf60dac120c5014b0f98fb744e9d6fab Signed-off-by: Peter Marheine <pmarheine@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3544168 Reviewed-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Tested-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Reviewed-by: Joe Tessler <jrt@chromium.org>
* nissa/nereid: enable volume button interruptsPeter Marheine2022-03-231-0/+10
| | | | | | | | | | | | | | This is required for the system to respond to the volume buttons. BUG=b:220072884 TEST=Button press and release messages are now printed to the console on Nereid. BRANCH=none Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: Ie757fa834eeb51424a90893ccb152dfc7286c08f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3544749 Reviewed-by: Andrew McRae <amcrae@google.com>
* Banshee:Remove PPC NX20P3483Leo-Tsai2022-03-231-1/+1
| | | | | | | | | | | | | | | Remove not used PPC and define CONFIG_USB_PD_PPC BUG=b:223490888 BRANCH=none TEST=build make -j BOARD=Banshee pass Signed-off-by: Leo-Tsai <leocx_tsai@compal.corp-partner.google.com> Change-Id: Id8b987a596398ed322bd40d8d0bfe8614b52a63d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3499640 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-by: caveh jalali <caveh@chromium.org>
* taniks: modify for Prochot function settingtony.tang2022-03-231-0/+2
| | | | | | | | | | | | | | R423 was changed to 402k. On a system with 2S battery, charger will monitor Vsys and trigger PROCHOT# if Vsys gets below 6v BUG=b:210073795 BRANCH=none TEST=make buildall -j Signed-off-by: tony.tang <tony.tang@lcfc.corp-partner.google.com> Change-Id: Ib20e24a7827c0f94865e25c4b5bd77cfd25fb40d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3528453 Reviewed-by: Boris Mittelberg <bmbm@google.com> Reviewed-by: caveh jalali <caveh@chromium.org>
* nissa/nereid: reduce THREAD_MAX_NAME_LENPeter Marheine2022-03-231-0/+2
| | | | | | | | | | | | | | | | | The default value for this is 32 bytes, but none of our threads have names longer than 11 characters. Reducing this to 12 saves 20 bytes per thread, for total savings of 336 bytes (slightly less than 20 bytes per thread, presumably due to struct alignment). BUG=b:223044986 TEST=build & flash nereid, memory reduced and `kernel threads` still shows full thread names. BRANCH=none Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I9200e76894d1a0904732ae4a4e46e3dd2aadd672 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3544745 Reviewed-by: Andrew McRae <amcrae@google.com>
* gelarshie: Fix C1 Port BC1.2 no function issuepengjunhao52022-03-231-1/+1
| | | | | | | | | | | | | | | | | Base On gelarshie initial image, Fix C1 Port BC1.2 no function issue. BUG=b:223101874 TEST=cros_update_firmware -b strongbad chromeos-firmwareupdate --manifest Change-Id: I35aca84a79f30db38c939c1fd64bcef253eecbce Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3539762 Reviewed-by: Mars Chen <chenxiangrui@huaqin.corp-partner.google.com> Tested-by: Mars Chen <chenxiangrui@huaqin.corp-partner.google.com> Tested-by: JunHao Peng <pengjunhao5@huaqin.corp-partner.google.com> Reviewed-by: Kenny Pan <kennypan@google.com> Commit-Queue: JunHao Peng <pengjunhao5@huaqin.corp-partner.google.com>
* board/taeko: Override NVME and EMMC FW_CONFIG bits based on GPIOTim Wawrzynczak2022-03-233-1/+43
| | | | | | | | | | | | | | | | | | | | | | | Taeko has an EMMC_SKU_DET strap pin which signals whether or not the current board has EMMC or NVME storage. In the factory, the CBI images are prepared with both NVME and EMMC masks set to enabled, but this causes an issue in the AP firmware PCIe RP initialization because the two devices are designed to use the same CLKREQ# pin regardless of SKU. The FSP cannot handle this, thus we are left with trying to override these values. Thus this patch will read the FW_CONFIG value at init time, and if either both NVME and EMMC are selected, or neither, then it will read the EMMC_SKU_DET pin and set the two FW_CONFIG masks accordingly. BUG=b:224884408 BRANCH=none TEST=verified by ODM Change-Id: Ia8ad12fb785a75af6311acb41db7cedce58ad881 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3537108 Reviewed-by: caveh jalali <caveh@chromium.org> Tested-by: Arthur Lin <arthur.lin@lcfc.corp-partner.google.com>
* tarlo: modify battery name and voltage max valueamber.chen2022-03-231-3/+3
| | | | | | | | | | | | BUG=b:222438906 BRANCH=none TEST=make -j BOARD=taeko Signed-off-by: amber.chen <amber.chen@lcfc.corp-partner.google.com> Change-Id: I61c5a4ce08d5011dc1f5d03e886b7e7d46111c2c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3539764 Reviewed-by: Boris Mittelberg <bmbm@google.com> Reviewed-by: caveh jalali <caveh@chromium.org>
* zephyr: villager: Fix FRS Enable pin configurationSam Hurst2022-03-231-0/+2
| | | | | | | | | | | | | Fix FRS Enable pin configuration BUG=b:218692410 TEST=zmake configure -b villager BRANCH=main Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I3d991e3fc94f17cbfdcbc6166d258e575bf0db6b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3541334 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* zephyr: hoglin: Fix FRS Enable pin configurationSam Hurst2022-03-232-2/+5
| | | | | | | | | | | | | Fix FRS Enable pin configuration BUG=b:218692410 TEST=zmake configure -b hoglin BRANCH=main Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: Ie22d0ccd0523fb620fd4f8cc8a2d06fb30bfdb9d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3541333 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* zephyr: herobrine: Fix FRS Enable pin configurationSam Hurst2022-03-233-2/+5
| | | | | | | | | | | | | Fix FRS Enable pin configuration BUG=b:218692410 TEST=zmake configure -b herobrine BRANCH=main Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I04d87a9ee0b05692fa828d4a11fbb8eec15a1e70 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3537266 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* zephyr/hooks: don't store hooks in RAMPeter Marheine2022-03-235-69/+166
| | | | | | | | | | | | | | | | | This saves 8 bytes times the number of hook handlers in RAM, which amounts to nearly 1KB in most configurations. It trades that RAM for higher cost in calling handlers since the hook list must be traversed multiple times for each notification, but that matches the ECOS behavior which implies the performance cost is acceptable. BUG=b:223044986 TEST=zmake testall; 944 bytes of RAM are saved on Nereid BRANCH=none Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I823f2a974faf69fa5195f11c645b569fb57854a9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3529602 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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