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* sm5803: Replace is_acok methodstabilize-14163.B-mainDevin Lu2021-08-191-28/+12
| | | | | | | | | | | | | | | | Since the CHARGER_MODE_SINK bit is not truly ACOK if discharging on ac. Also the VCHGPWR will drop to zero if discharging on ac. This patch replace is_acok method to avoid AC off while discharging on ac. BUG=b:194990808, b:196998260 BRANCH=dedede TEST=Make sure ectool chargecontrol discharge works. Attached charger to make sure AC is ON. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I7ee72da26b99c8bcb8fbd8c878c930506a244e28 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3081039 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* zephyr: herobrine: Enable shell helpKeith Short2021-08-181-0/+1
| | | | | | | | | | | | | | | Enable the shell help on Herobrine. BUG=b:192253134 BRANCH=none TEST=zmake testall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I64388ed56182f4e361bc03239101ca2fbbf32851 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3098591 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: Disable console help stringsKeith Short2021-08-183-3/+24
| | | | | | | | | | | | | | | | | | Add support for disabling the console command help strings. With CONFIG_SHELL_HELP=n, 2000 bytes saved on Volteer BUG=none BRANCH=none TEST=zmake testall TEST=Verify console on Volteer with and without CONFIG_SHELL_HELP enabled. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I2186828f28691182f673851ac27d207b4a4a6f44 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3093492 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: reduce code duplication of console shimKeith Short2021-08-182-33/+39
| | | | | | | | | | | | | | | | | | Change the console command shim to pass in a struct, reducing the amount of duplicated code. This change saves 500 bytes on Volteer BUG=none BRANCH=none TEST=zmake testall TEST=verify console on Volteer Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I2da374b9a3b3b78a3e7b66d5c31f4ed2131aef01 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3093491 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* TCPM: Remove enum pd_msg_typeAbe Levkoy2021-08-1821-65/+57
| | | | | | | | | | | | | Convert usages of this enum to tcpm_sop_type. BUG=b:155476419 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I5fed273d72e7ad0e191db0cb0d121b70bdd9ecdb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3104291 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPM: Rename enum tcpm_transmit_typeAbe Levkoy2021-08-1854-213/+249
| | | | | | | | | | | | | | | Rename tcpm_transmit_type to tcpm_sop_type to reflect that it can be used for Rx as well. Describe it in comments. This prepares to consolidate enum pd_msg_type into this enum. BUG=b:155476419 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Ife97d4ad51c48f2e832b94e007954919e236a309 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3104290 Reviewed-by: Keith Short <keithshort@chromium.org>
* herobrine_npcx9: Make WARM_RESET and POWER_GOOD power signalsWai-Hong Tam2021-08-182-8/+5
| | | | | | | | | | | | | | | | | | Herobrine uses the SPI mux to separate the SPI bus from the AP when programming the AP firmware. Overdriving signals on WARM_RESET is not needed. Make the WARM_RESET and POWER_GOOD GPIOs like normal power signals. BRANCH=None BUG=b:187098628 TEST=Booted AP properly. Flashed the AP firmware, even AP is off. Change-Id: Ie8e42de8174bc71c29424697810e46a2367e3e54 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3105006 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* driblee: modify thermistor defineMatt_Wang2021-08-181-2/+1
| | | | | | | | | | | | | | | | | | Remove CONFIG_THROTTLE_AP, CONFIG_THERMISTOR_NCP15WB and add CONFIG_THERMISTOR for driblee. BUG=b:196922071 BRANCH=keeby TEST=make BOARD=driblee Signed-off-by: Matt_Wang <Matt_Wang@compal.corp-partner.google.com> Change-Id: I6a412c116c7c7aa2e35865573e3027a456419901 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3102690 Tested-by: Matt Wang <matt_wang@compal.corp-partner.google.com> Reviewed-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* driblee: Increase the length of Battery Model stringMatt_Wang2021-08-181-0/+3
| | | | | | | | | | | | | | | | | | | | | Some battery model names that differ only beyond the 7th character, which cannot be differentiated with the current limitation of 8 characters per battery string. Introduce a new hostcmd version that allows longer battery strings and enable it on Driblee. BUG=b:196910958 BRANCH=keeby TEST=make BOARD=driblee Signed-off-by: Matt_Wang <Matt_Wang@compal.corp-partner.google.com> Change-Id: Ie52f5a35ddc48d66ad9422c0a414493e34ef888a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3102337 Tested-by: Matt Wang <matt_wang@compal.corp-partner.google.com> Reviewed-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* driblee: Initial EC image set gpioMatt_Wang2021-08-183-19/+28
| | | | | | | | | | | | | | | | Initial gpio for driblee. BUG=b:196922068 BRANCH=keeby TEST=make BOARD=driblee Signed-off-by: Matt_Wang <Matt_Wang@compal.corp-partner.google.com> Change-Id: Id6c14a5f5e8a039345d4ffb8974e8c240ccb015e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3099552 Tested-by: Matt Wang <matt_wang@compal.corp-partner.google.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
* driblee/raa489000: Control ASGATE stateMatt_Wang2021-08-182-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | There is 0.1V leakage from Charger to Vbus when a charger is removed in S5. Control ASGATE state to prevent the leakage. This commit uses the charger side registers to control the ASGATE when selecting our active charge port. This is done in addition to the existing implementation which uses the TCPCI registers to control ASGATE. BUG=b:196923271 BRANCH=keeby TEST=make BOARD=driblee Signed-off-by: Matt_Wang <Matt_Wang@compal.corp-partner.google.com> Change-Id: I9c43941fd1795e28456a959d0e46f8268e8ac071 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3102341 Tested-by: Matt Wang <matt_wang@compal.corp-partner.google.com> Tested-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com> Reviewed-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* driblee: Removed PD port 1 configuration and modified HDMI gpio settingMatt_Wang2021-08-184-117/+50
| | | | | | | | | | | | | | | | | | | Due to cret only support a USB PD port 0 on MB side, so remove the PD port 1 configuration in board layer. Also change the GPIOF5 and GPIO92 to HDMI function. BUG=b:186393859,b:185009499 BRANCH=kebby TEST=make BOARD=driblee Signed-off-by: Matt_Wang <Matt_Wang@compal.corp-partner.google.com> Change-Id: Ie4d7286d4b1c1a081bc0ca1be866d8d06c55adae Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3099428 Tested-by: Matt Wang <matt_wang@compal.corp-partner.google.com> Reviewed-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* primus: fix battery setting and add Simplo batteryScott Chao2021-08-182-5/+32
| | | | | | | | | | | | | | | - Follow Sunwoda spec to correct the setting. - Add Simplo battery. BUG=b:195568649 BRANCH=none TEST=make -j BOARD=primus TEST=ectool batterycutoff works. Change-Id: Ic9b44916a7bcbbc8497aa2a91f580d503dd1291b Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3102334 Reviewed-by: Boris Mittelberg <bmbm@google.com>
* herobrine_npcx9: Detect the Refresh key at row 3Wai-Hong Tam2021-08-182-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Herobrine uses the Vivaldi keyboard. The Refresh key is at T2 (col:2, row:3), instead of T3 (col:2, row:2). The code filters out the Refresh key and check any boot key remaining, like the Esc key. Misconfiguring it fails the recovery boot, as EC detects a redundant key pressed. BRANCH=None BUG=b:196885613 TEST=Pressed Refresh (T2) + Esc and booted EC. Checked the message: [0.005749 KB boot key mask 1] which showed the Esc key was recognized. Without this CL, the message won't show up, as a redundant key (T2 not recognized as Refresh) is pressed. Both EC-OS and Zephyr images behave the same. Change-Id: Iee82d7d4d6b3301ac342abc384488842a9858b7e Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3102287 Reviewed-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: Add support for CONFIG_KEYBOARD_REFRESH_ROW3Wai-Hong Tam2021-08-182-0/+13
| | | | | | | | | | | | | Add Kconfig option for CONFIG_KEYBOARD_REFRESH_ROW3. BRANCH=None BUG=b:196885613 TEST=zmake testall Change-Id: Idd55e5bc3af4aab95aa9577b49eb3d8eb5e90630 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3102286 Reviewed-by: Keith Short <keithshort@chromium.org>
* Mrbland: Add the support for ICM42607Siyu Qin2021-08-183-4/+103
| | | | | | | | | | | | | | | | BMI160 is going to EOL, so we intend to import ICM42607 to make 2 sources compatible for Mrbland. BUG=b:196287196 BRANCH=trogdor TEST=1.make BOARD=mrbland 2.ectool motionsense can get the sensor data Change-Id: Ie1b4c6722b460339a38ef48aeae1018f6c008949 Signed-off-by: Siyu Qin <qinsiyu@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3089082 Reviewed-by: Bob Moragues <moragues@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* Mrbland: Remove on-body detection and gesture detectionSiyu Qin2021-08-181-9/+1
| | | | | | | | | | | | | | | | | When import the second source sensor ICM42607, the on-body detection and gesture detection functions will course proccess going to null pointer. Mrbland does not require these features, so just remove the related macro. BUG=b:196287196 BRANCH=trogdor TEST=make BOARD=mrbland Signed-off-by: Siyu Qin <qinsiyu@huaqin.corp-partner.google.com> Change-Id: I7a6be7efe0c57c73ebdad0fb462eea0eb516ad61 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3088969 Reviewed-by: Bob Moragues <moragues@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* dedede: moving buttons and switches to use MKBPBoris Mittelberg2021-08-181-0/+1
| | | | | | | | | | | | | | | | | | Switching config option to route buttons and switches over MKBP instead of 8042 driver BRANCH=main,dedede BUG=b:170966461 TEST=manual tested on Madoo Cq-Depend: chromium:3094530 Signed-off-by: Boris Mittelberg <bmbm@google.com> Change-Id: I5c82ee09a64b1971e63547220ca20c1226cb5ba3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069163 Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Tested-by: Nick Vaccaro <nvaccaro@google.com> Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
* driblee: modify LED behaviorMatt_Wang2021-08-183-37/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | modify LED behavior for driblee Power LED: System S0: White System S0ix: Blinking white (1 sec on, 1 sec off) System S5/G3: Off. Battery LED: DC mode: System S0: off. System S5/G3: Off. System battery low: Blinking Amber (1 sec on, 1 sec off). AC mode: Charging: Amber. Full charged: White. Battery low or AC only: Blinking Amber (1 sec on, 1 sec off). BUG=b:196910961 BRANCH=keeby TEST=make BOARD=driblee Signed-off-by: Matt_Wang <Matt_Wang@compal.corp-partner.google.com> Change-Id: Iddd6d74a8073d8b409340a2585c45776e10388aa Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3102331 Tested-by: Matt Wang <matt_wang@compal.corp-partner.google.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Driblee: Initial EC image setup battery parameterjohnwc_yeh2021-08-182-54/+577
| | | | | | | | | | | | | | Setup battery parameter for driblee. BUG=b:196910958 BRANCH=keeby TEST=make BOARD=driblee Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com> Change-Id: I6196138c5546beb2a724921c2c1add03a7cd4ce9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3099426 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* driblee: Disable motionsensorMatt_Wang2021-08-184-297/+1
| | | | | | | | | | | | | | | | Driblee only 180 SKU so remove the motionsensor code. BUG=b:196929676 BRANCH=keeby TEST=make BOARD=driblee Signed-off-by: Matt_Wang <Matt_Wang@compal.corp-partner.google.com> Change-Id: I76fff7ad4f15ec3fb74268ae91c15e495e7ce4a9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3102686 Tested-by: Matt Wang <matt_wang@compal.corp-partner.google.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* adlrvp: Increase EC clock frequencypoornima tom2021-08-181-0/+4
| | | | | | | | | | | | | | | | | With all four PD tasks enabled, ADLRVP board was rebooting with WDT errors. On increasing the frequency from 48MHZ to 96MHZ, the issue got resolved. BUG=b:195406641 BRANCH=None TEST=ADL P RVP booting fine without any WDT errors Signed-off-by: poornima tom <poornima.tom@intel.com> Change-Id: I7f8ea030c2a9837f4468e2bcdd9fc6de00c33eb4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3067290 Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: caveh jalali <caveh@chromium.org>
* Pico: Fix I2C freqency for sensorSue Chen2021-08-181-1/+3
| | | | | | | | | | | | | | | | | For KX022 is recommended I2C CLK timing minimum to 2.5us, set IT83XX_I2C_CH_B to 400kbps. Fill min and max frequency in motion_sensors for KX022. BUG=b:196998259 BRANCH=icarus TEST=I2C timing meets the spec. Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I74e1bd6e59963dc86fd5f8725a5ee0d5aeda1d59 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3102329 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Shou-Chieh Hsu <shouchieh@chromium.org> Commit-Queue: Shou-Chieh Hsu <shouchieh@chromium.org>
* flash_ec: Add adlrvpp_npcx to NPCX internal SPI arrayVijay Hiremath2021-08-181-0/+1
| | | | | | | | | | | | | | | ADLRVP does not have standard overlays to program EC hence added adlrvpp_npcx board to NPCX internal SPI array. BUG=b:196998258 BRANCH=none TEST=Below command flashes NPCX MECC on ADLRVP ./util/flash_ec --board=adlrvpp_npcx Change-Id: I132aa21a0bed533c61cc8f2edf159c95774cad0b Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3102298 Reviewed-by: caveh jalali <caveh@chromium.org>
* flash_ec: add array for boards which use NPCX internal SPIVijay Hiremath2021-08-181-0/+7
| | | | | | | | | | | | | | | Created array for the NPCX internal SPI for the boards which do not use standard overlays. BUG=none BRANCH=none TEST=Able to flash npcx9m3f using MECC AIC on ADLRVP Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Change-Id: I57e4909f0b487b0efa4a3fa26f8b3d5465267dd7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3101842 Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com> Reviewed-by: caveh jalali <caveh@chromium.org>
* kano: remove als tcs4300David Huang2021-08-184-114/+1
| | | | | | | | | | | | | Remove als tcs4300 function. BUG=b:192370253 BRANCH=brya TEST=make buildall -j succeeded. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: I8e5f5145da807449ff90d9400072161516c35fa9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3098117 Reviewed-by: caveh jalali <caveh@chromium.org>
* Chronicler: Update usb3 signal settingYu-An Chen2021-08-181-0/+63
| | | | | | | | | | | | | Update usb3 signal setting BUG=b:194985848 BRANCH=volteer TEST=make BOARD=chronicler Signed-off-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com> Change-Id: I929ca1af7105b53f92c80c7e478e1815965daa00 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3060351 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* zephyr: add herobrine_npcx9 definitions of sku id and board versionMichał Barnaś2021-08-181-6/+30
| | | | | | | | | | | | | | | | | Add pins definitions in device tree file used to build zephyr BRANCH=main BUG=b:194136536 TEST=Build zephyr for herobrine npcx9 and verify if sku id and board version in EC console are correct. Change-Id: Ib5d36d0089e79b9202af0ecdd173490caf443e0d Signed-off-by: Michał Barnaś <mb@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3077543 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Wai-Hong Tam <waihong@google.com> Tested-by: Wai-Hong Tam <waihong@google.com>
* zephyr: add herobrine_npcx7 definitions of sku id and board versionMichał Barnaś2021-08-181-6/+30
| | | | | | | | | | | | | | | | | Add pins definitions in device tree file used to build zephyr BRANCH=main BUG=b:194136536 TEST=Build zephyr for herobrine npcx7 and verify if sku id and board version in EC console are correct. Change-Id: Ib47a4cafcd74c816ae26f884f811898eb2d46b89 Signed-off-by: Michał Barnaś <mb@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3077542 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Wai-Hong Tam <waihong@google.com> Tested-by: Wai-Hong Tam <waihong@google.com>
* zephyr: add lazor definitions of sku id and board version in dtMichał Barnaś2021-08-183-30/+47
| | | | | | | | | | | | | | | | | Add pins definitions in device tree file used to build zephyr BRANCH=main BUG=b:194136536 TEST=Build zephyr for lazor and verify if sku id and board version in EC console are correct. Change-Id: Ibdc1dcb456b5cecd48ddafeafff0f765ffa45081 Signed-off-by: Michał Barnaś <mb@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3077541 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Wai-Hong Tam <waihong@google.com> Tested-by: Wai-Hong Tam <waihong@google.com>
* zephyr: provide unified method to get sku id and board versionMichał Barnaś2021-08-186-1/+171
| | | | | | | | | | | | | | | | | | | | | | Previously, functions for reading board version and sku id were defined in board.c files which are not compiled in Zephyr builds. Logic from board.c files should be moved to the DeviceTree files. This commit adds support for defining board version and sku id pins and numeral system used to decode them. BRANCH=main BUG=b:194136536 TEST=Call system_get_sku_id and system_get_board_version on CrOS EC and Zephyr, values should be correct and the same on both versions Change-Id: I61b5e205cb2a2299ad86c5dff38c05a9659eb2d3 Signed-off-by: Michał Barnaś <mb@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3048102 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Wai-Hong Tam <waihong@google.com> Tested-by: Wai-Hong Tam <waihong@google.com>
* buggzy: disable console commands to save spaceBoris Mittelberg2021-08-181-0/+2
| | | | | | | | | | | | | | | | Disabling accelspoof and battfake EC console commands BRANCH=main,dedede BUG=none TEST=make -j BOARD=buggzy Signed-off-by: Boris Mittelberg <bmbm@google.com> Change-Id: Iea64aa822a103500d39d6d1045e8fc9fbe9e8c93 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3101840 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Rob Barnes <robbarnes@google.com>
* primus: set T15 as lock keyScott Chao2021-08-182-1/+11
| | | | | | | | | | | | BUG=b:185084342 BRANCH=none TEST=make -j BOARD=primus TEST=check lock key works Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Change-Id: I0f08cf8a71efda77ae9ca130a0ba32ea5e0f6902 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3099285 Reviewed-by: Boris Mittelberg <bmbm@google.com>
* zephyr: Enable -WerrorKeith Short2021-08-171-0/+3
| | | | | | | | | | | | | | | | | Enable -Werror compile options so that code warnings cause build failures. BUG=b:174871569 BRANCH=none TEST=zmake testall TEST=Introduce unused variable warning, verify build fails Change-Id: Ifecfc391dc936a56ba9c02d70f089e058f0453d2 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3101832 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* ps8xxx: Wait for chip to wake up from LPMCaveh Jalali2021-08-171-1/+51
| | | | | | | | | | | | | | | | | | The ps8815 can take up to 50ms to fully wake up from sleep/low power mode. When the chip is asleep, the 1st I2C transaction will fail but the chip will begin to wake up within 10ms. After this delay, I2C transactions succeed, but the firmware is still not fully operational. The way to check if the firmware is ready, is to poll the firmware register for a non-zero value. BRANCH=none BUG=b:195087071,b:186189039 TEST=buildall passes Change-Id: If047fc122d7f61ed5fc361f97b47180e5cf08970 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3084331 Reviewed-by: Keith Short <keithshort@chromium.org>
* bugzzy: Update EC variantAseda Aboagye2021-08-172-2/+7
| | | | | | | | | | | | | | | | | | | Per the schematics, bugzzy is actually using the NPCX797FC and not the NPCX796FC. This variant has more SRAM and will provide some more space to be used for the image. BUG=b:192521391,b:194554146 BRANCH=dedede TEST=`make -j BOARD=bugzzy` and verify that it compiles and is not out of space. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I8c0c8510d614cbaf07e53632676036bdb9284a79 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3101348 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
* CoachZ: Disable IRQ from CTN730 in RODaisuke Nojiri2021-08-174-8/+11
| | | | | | | | | | | | | | | | | | | When PCHG isn't enabled in RO, a keyboard is disabled until another USB device is plugged. This patch restores PCHG in RO but disables it by assigning an invalid value to the IRQ signal (GPIO_IH_COUNT). A PCHG task will be started but will not run because there will be no event. BUG=b:193223400, b:173235954 BRANCH=trogdor TEST=On CoachZ, stylus charges in normal mode and doesn't charge in recovery mode. Change-Id: Icb5702474ac5ef74119455ab4879447cb7a963e4 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3100491 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* adlrvp_ite: Trigger TCPC interrupts on falling edge onlyVijay Hiremath2021-08-171-7/+7
| | | | | | | | | | | | | | | To avoid unnecessary waking of USBC task changed code to Trigger TCPC interrupts on falling edge only. BUG=none BRANCH=none TEST=Added print statements in ISR and observed, Type-C interrupts are triggered only on falling edge only. Change-Id: I91ea8a23fe9736fbd28ab302b4ccc44447470386 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3060258 Reviewed-by: caveh jalali <caveh@chromium.org>
* adlrvp: Enable TCPC low power modeVijay Hiremath2021-08-171-0/+3
| | | | | | | | | | | BUG=b:195406641 BRANCH=none TEST=ADLRVP type-C ports can enter low power mode Change-Id: I0b457758ba67328c139c85dce977603e305715d0 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3088162 Reviewed-by: caveh jalali <caveh@chromium.org>
* TCPMv2: Fix LPM for non-dual role auto toggle chipsPoornima Tom2021-08-171-2/+11
| | | | | | | | | | | | | | | | | | | | | If the "dual role" is enabled and the TCPC chip does not support "Dual role auto toggle mode" then the PD state remains in PD_DRP_TOGGLE_ON state in active state of the AP. Hence check for CC line open state to decide to enter low power mode for such devices. BUG=b:195406641 BRANCH=none TEST=Tested on ADL RVP, FUSB302 & IT83XX can enter LPM > pd 0 state Port C0 CC1, Disable - Role: SRC-UFP TC State: LowPowerMode, Flags: 0x0010 PE State: , Flags: 0x0001 Change-Id: Ic70c6bfcd2ffd0721fdcaf6e61c68736971e037b Signed-off-by: Poornima Tom <poornima.tom@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3088161 Tested-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Vijay Hiremath <vijay.p.hiremath@intel.com>
* cret: Add six battery parameterjohnwc_yeh2021-08-172-6/+207
| | | | | | | | | | | | | | | | | | | | Add six battery type for cret. And add device name to identify. BUG=b:196943911 BRANCH=dedede TEST=make BOARD=cret,battery can be found via EC log check and battery can be cutoff by ectool command.Charge and discharge normally. Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com> Change-Id: I32a73783f13627d2e8b0e0f3e3f778340dc1cb38 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3099287 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* collis: The Type-C PDO "PD_MAX_POWER_MW" change to 45wMichael5 Chen12021-08-171-2/+3
| | | | | | | | | | | | | | | The Type-C PDO "PD_MAX_POWER_MW" change to 45w from 60w BUG=b:196325467 BRANCH=firmware-volteer-13672.B TEST=manual Check PDO using command "ectool usbpdpower". Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: Ie9d892eb22f9b486ceabfa2824819a6689b4046c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3093350 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* bugzzy: Initial EC imageRaymond Chung2021-08-1711-0/+1340
| | | | | | | | | | | | | | | | | | Create the initial EC image for the bugzzy variant by copying the waddledoo reference board EC files into a new directory named for the variant. (Auto-Generated by create_initial_ec_image.sh version 1.5.0). BUG=b:192521391 BRANCH=None TEST=make BOARD=bugzzy Signed-off-by: Raymond Chung <raymondchung@ami.corp-partner.google.com> Change-Id: I71b44d40a11a477f6fa81a75795dd972e44435f0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3067291 Reviewed-by: Henry Sun <henrysun@google.com> Commit-Queue: Henry Sun <henrysun@google.com>
* usb_hid_keyboard: fix incorrect sleep/lock key positionTing Shen2021-08-171-1/+2
| | | | | | | | | | | | | | | | | The position of SLEEP_KEY_MASK bit is not in its intended position because TK_* enum is 1-indexed. Fix this bug by shift the mask by 1. BUG=b:196934919 TEST=evtest BRANCH=trogdor Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I900636f032786510f7870948d1856d0bc4374800 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3097478 Reviewed-by: Rong Chang <rongchang@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* gimble: switch T6 to T10 keysWill Tsai2021-08-171-5/+5
| | | | | | | | | | | | | | We have keyboard backlight at T6, brightness_down at T7, brightness_up at T8, play_pause at T9, micmute at T10. BUG=b:194146863 BRANCH=none TEST=make -j BOARD=gimble Signed-off-by: Will Tsai <will_tsai@wistron.corp-partner.google.com> Change-Id: Ibd0362a4e668867b0f8307ca1baad8c1b8198871 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3099386 Reviewed-by: caveh jalali <caveh@chromium.org>
* nx20p348x: Check device status reg for sink modeCaveh Jalali2021-08-171-3/+8
| | | | | | | | | | | | | | | | | | | | | | | This fixes an issue where we sometimes time out waiting for the HVSNK_STS bit to get set after enabling sink mode using the EN_SINK GPIO. Checking for HV_SNK mode in the device status register is more robust as it appears to reflect the state of the EN_SINK pin as expected. I'm still not sure why the HVSNK_STS bit isn't set as expected sometimes. I suspect that it only gets set when there is actual voltage presented by the connected device. BRANCH=none BUG=b:194833460 TEST=with additional debug code, verified that we detect HV_SNK mode even when HV sink switch is off.N Change-Id: Ifa5b9ebaedfc03755306ecb4e3e6e1fa654418d0 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058079 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* zephyr: it8xxx2: use half space (512KB) from flashDino Li2021-08-174-17/+40
| | | | | | | | | | | | | | | | This saved about 3 seconds erasing time while running software sync. This also pull configurations of flash/memory layout to chip level. BRANCH=none BUG=b:195954913 TEST=software sync successfully. (without erase timeout patch of depthcharge) Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: Ia7fa08fdf6bdde4c47ca8d852f8eeaa83f39dae5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3097250 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* driblee: Initial EC imageFrank Wu2021-08-1711-0/+1581
| | | | | | | | | | | | | | | | | | Create the initial EC image for the driblee variant by copying the lalala reference board EC files into a new directory named for the variant. (Auto-Generated by create_initial_ec_image.sh version 1.5.0). BUG=b:191732473 BRANCH=None TEST=make BOARD=driblee Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com> Change-Id: Id6cffcdb7aad6c9cb7ac065fb377c6e7dfa9e574 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3070401 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* zephyr: npcx_evb: add the PSL hibernate wake-up pinsJun Lin2021-08-173-6/+22
| | | | | | | | | | | | | | | | | | | | Add PSL_IN1/PSL_IN2/PSL_IN3 as the hibernate wakeup pins. Also map the non-PSL (low power RAM) hibernate wakeup source to the same pads. (i.e. GPIOD2/GPIO00/GPIO01.) Then we can use either PSL hibernate mode (CONFIG_PLATFORM_EC_HIBERNATE_PSL=y) or non-PSL hibernate mode (CONFIG_PLATFORM_EC_HIBERNATE_PSL=n) on the EVB. BUG=none BRANCH=none TEST=pass "zmake testall" TEST='hibernate' & wake-up ec by those wakeup pins. Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Change-Id: I4175bdabee138c7bac25f8b43774268ae336d989 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3089083 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com>
* redrix: Fix C1 port bb retimer addressDevin Lu2021-08-171-1/+1
| | | | | | | | | | | | BUG=b:196476916 BRANCH=none TEST=No error with bb retimer initial. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: Iccf5bde3029ddcc2e0a83c7e5ea9f4d3da835973 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3068490 Reviewed-by: Boris Mittelberg <bmbm@google.com> Reviewed-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
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