| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
To implement FIPS module we need to bring many crypto functions in the
module boundary. Unfortunately, cryptoc is a third-party library used
by dcrypto code in cr50. Cryptoc is also not well-maintained and shared
with other projects. While just making local copy of cryptoc would
solve an issue, it's suboptimal as prevents from many optimizations and
improvements.
Provided SHA & HMAC implementations from Ti50 project. This provides
better performance (500us vs. 670us earlier for HMAC DRBG) and reduce
code size. This implementation also enables stack use savings when
only specific digest is needed. Earlier SHA512 context was allocated
when only SHA256 is needed greatly increasing stack consumption for
code using HMAC_DRBG and others.
However, it introduce subtle API changes which require handling.
As for tests, since core implementation is hardware-independent, make
it available for BOARD=host too.
Before change (with cryptoc):
*** 12368 bytes in flash and 5784 bytes in RAM
After:
*** 13136 bytes in flash and 5796 bytes in RAM
BUG=b:138578318
TEST=make BOARD=cr50 CRYPTO_TEST=1; test/tpm_test/tpmtest.py
Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com>
Change-Id: I2ff5362aee9078ce83dc1f8081943a5101d5f666
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3064201
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
To implement FIPS module we need to bring many crypto functions in the
module boundary. Unfortunately, cryptoc is a third-party library used
by dcrypto code in cr50. Cryptoc is also not well-maintained and shared
with other projects.
BUG=b:138578318
TEST=make BOARD=cr50 CRYPTO_TEST=1
Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com>
Change-Id: I40090f5d32df088c88d7313dd693fc8a0dd4b308
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3083187
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Linker script used by FIPS module broke several extension commands
used for testing due to section name used (no wildcards support).
FIPS self-integrity tests broke access to crypto commands as until
there is no correct digest it fails and prevents access to crypto.
This is temporary fix until digest computation is done.
TPM tests requires GCM for testing - adding this module when built with
CRYPTO_TEST=1.
U2F test status made a bit clearer (printing success) and hex dumps of
key handles, signatures only printed in debug mode now.
BUG=none
TEST=make BOARD=cr50 CRYPTO_TEST=1; test/tpm_test/tpmtest.py
Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com>
Change-Id: I7c974abf8ac71de2949b35a4411f77a03d9048a0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3082325
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
|
| |
|
|
|
|
|
|
|
|
| |
BUG=b:194901448
TEST=none
Change-Id: I9d4d5133d26ac528b2ecf5e1b0f4be20a47badb8
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3072819
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
BUG=chromium:1031705
BRANCH=master
TEST=None
Signed-off-by: kerker <kerker@chromium.org>
Change-Id: Idf4f5342da6b3f3307e1948c165d44b83031543a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2425983
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@chromium.org>
(cherry picked from commit 24f03775900d085130f4d411da3bfdfe29afc7ef)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3067596
Reviewed-by: Craig Hesling <hesling@chromium.org>
Commit-Queue: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch introduces an alternative USB SPI protocol implementation
to be used by Cr50: Raiden V2. The SPI USB endpoint descriptor is
modified to advertise the new version in the bInterfaceProtocol, which
allows the flashrom utility to use the new protocol version.
Protocol version 2 implements segmentation and reassembly where longer
flash read and write PDUs can be transferred split into shorter fixed
size USB packets. The comment section in usb_spi_v2.c describes the
protocol in detail.
Each time a USB packet is received from the host, the packet header is
examined to determine the command. The command could be a DUT
configuration query OR a request to read and or write some data
from/to the SPI flash chip, OR a request to retransmit the last PDU
from the beginning.
This patch implementation does not process the retransmittion request
command yet, in case a packet is dropped flashrom would need to be
re-run. This is a pretty rare condition, but if deemed necessary
support can be added later.
H1 SPI controller supports multibuffer transactions where the CS
signal is kept asserted while the controller clocks the bus when the
next portion of data to write becomes available or there is more room
to read data to send back to the host. This allows to support
arbitrary length read and write transactions. There is no need to
support write transactions longer than 256 bytes of data, as this is a
typical SPI flash chip page size. For read direction the size of 2040
was chosen, which is close to 2K and takes full payload of 34 USB
packets on top of 2 byte headers.
The protocol state machine on the device sideOB can be in one of
two states, IDLE or WRITING. Many of host requests do not require the
device to change state: configuration requests, or writes of short
blocks of data (fitting into one USB packet) can be executed
immediately. Requests to read long blocks of data can still be
executed without leaving the IDLE state, the device starts the SPI
transaction and then iterates reading one packet worth of data at a
time and sends it back to the host. Once the entire PDU is read, the
CS is deasserted.
In case the host requests to write a block of data which does not fit
into a USB packet the device asserts the CS, sends the first received
block to the SPI flash chip and then enters the WRITING state,
expecting the controller to send the rest of the PDU in following
packets.
Once the entire PDU is transferred the CS is deasserted and state is
changed back to IDLE.
BUG=b:79492818
TEST=performed numerous flash read/write operations with 16M SPI flash
chip on the Atlas device. Timing results comparison of various
operations:
Raiden V1 Raiden V2
Reading entire chip: 3m 16s 0m 52s
Vanilla writing of new image: 16m 22s 5m 48s
Writing of AP firmware into an
erased flash chip (no read
before or after writing) 4m 12s 1m 38s
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Change-Id: I374f3caab7146fc84b62274e9e713430d7d31de0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977965
Reviewed-by: Brian Nemec <bnemec@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add basic test to U2F generate, sign and attest commands to make sure
commands are processed correctly.
When build with CRYPTO_TEST=1 pretend that power button for U2F is
always pressed when requested to simulate user presence.
BUG=None
TEST=make BOARD=cr50 CRYPTO_TEST=1
tests/tpmtest.py
Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com>
Change-Id: I8fda8037ea7322eb5fa46421ded6da3d1bba9c66
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3048103
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Added computation of FIPS module SHA256 digest and comparison with
precomputed value.
BUG=b:138578318
TEST=make BOARD=cr50, check console output
Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com>
Change-Id: I3aaac07ff460b5021f2b7dab4f6df2710325c60b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3045839
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Added linker script to sort by name all symbols from FIPS module and
place them together in text.fips, rodata.fips and bss.fips sections
which are later placed at fixed locations by chip's linker script.
Note, this has impact on image size as LTO intentionally won't work
across FIPS module boundary and probably don't discard some unused
functions. Currently size increase is 1544 bytes.
List of functions added:
fips_p256_ecdsa_sign
fips_drbg_clear
DCRYPTO_asn1_sigp
board_set_fips_policy_test
u2f_gen_kek
DCRYPTO_asn1_pubp
fips_drbg_init
fips_throw_err
board_fips_enforced
fips_trng_bytes
dcrypto_p256_pick
DCRYPTO_hkdf
dcrypto_p256_rnd
fips_mode
adaptive_proportion_test
fips_rand_bytes
fips_set_policy
board_fips_power_up_done
fips_crypto_allowed
Note, some of these functions can be removed, and some will be used
once switch to FIPS key gen.
BUG=b:138578318
TEST=make BOARD=cr50
Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com>
Change-Id: I0ab3cf1fc7fd6de2025b69d46c71625d96d7873b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3041098
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
BUG=none
TEST=make buildall -j
find -name util.o
board/cr50/dcrypto/util.o is only a part of the cr50 build
./build/cr50/RO/common/util.o
./build/cr50/RO/board/cr50/dcrypto/util.o
./build/cr50/RW/common/util.o
./build/cr50/RW/board/cr50/dcrypto/util.o
./build/cr50/cryptoc/util.o
Change-Id: Ib1e82922548f9ec483338baaad94c6b2cb10f371
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3043359
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Group the code we are going to move into the fips module.
memcmp
memcpy
memset
memmove
reverse
strncmp
BUG=none
TEST=make buildall -j
Change-Id: Idb1162dd47f00f676cb1c1ec3f77b85808ad9c30
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3043358
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Recent changes with FIPS module - removal of ECIES from dcrypto build,
broke CRYPTO_TEST=1 build where tpm2/ecies.c used those functions.
So, removing it from build for consistency.
Also, some CRYPTO_TEST commands needs more stack, like newly added
u2f_test command. These commands are usually executed in the context
of TPM task which has larger stack, and to be executed in console task
it's size should be a bit larger.
BUG=none
TEST=make BOARD=cr50 CRYPTO_TEST=1
Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com>
Change-Id: I7b663eb0b0f64871682c907d66e855e75c091548
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3042142
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
FIPS module should be self contained. Adding __aeabi_uldivmod is
challenging as it comes from compiler builtin and used by other parts.
In this CL we implement udiv32() which divides 64-bit number by 32-bit
number. Since it doesn't compute reminder and don't have to support
real 64-bit by 64-bit division it's faster. Also, we can use ARM
instruction to count leading zeros instead of doing it manually.
This code is reused from Ti50 cryptolib code as is.
Exhaustive bn_div() test is provided by test/tpm_test/bn_test.c which
is now can be built with board/cr50/dcrypto version.
BUG=b:138578318
TEST=make BOARD=cr50
test/tpm_test/make CR50=1
build/tpm_test/bn_test
Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com>
Change-Id: I19cebc5c11d3a80bc50732350b7c598bfa374348
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3042138
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Build dcrypto and u2f separately as a part of the fips_module object.
This doesn't change how cryptoc is built. That'll be done in a followup
CL.
BUG=none
TEST=none
Change-Id: I411ee297ae8e88f0c38b6798c7b58c0e657750b1
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3002451
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
| |
BUG=none
TEST=none
Change-Id: I24314865ef591ae791e20559534ca4e40af7d46d
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3010921
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
| |
BUG=none
TEST=make -j BOARD=cr50 CRYPTO_TEST=1
Change-Id: Iad1c87d6ca3dfd798a6b63a0cffc087e1dd716a2
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3002450
Reviewed-by: Andrey Pronin <apronin@chromium.org>
Commit-Queue: Andrey Pronin <apronin@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
| |
BUG=b:192269002
TEST=none
Change-Id: Ied092d9dd0a909aae116f440fa545ee43ec4c6ed
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3002844
Reviewed-by: Andrey Pronin <apronin@chromium.org>
Commit-Queue: Andrey Pronin <apronin@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
We compute sha256 for this block to check integrity, but don't use
position independent code, so placing block closer to start of code
with as much constant address as possible to prevent sudden relocations
from breaking self-integrity check.
BUG=b:138578318
TEST=make buildall -j
Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com>
Change-Id: I81289fec8ed7fc73b34e2334c45c360cdabbcd88
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2988196
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Commit-Queue: Mary Ruthven <mruthven@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch removes the restriction of TPM_MODE vendor command,
allowing any board's AP to disable TPM mode if required.
In addition, TPM reset processing flow is being modified to always
reboot the H1 in case TPM reset happens when TPM is disabled.
BUG=b:191180387, b:191180208
TEST=on an Atlas device:
localhost ~ # gsctool -a -f
start
target running protocol version 6
keyids: RO 0xaa66150f, RW 0x334f70df
offsets: backup RO at 0, backup RW at 0x4000
Current versions:
RO 0.0.11
RW 0.6.30
$ localhost ~ # gsctool -a -m disable
TPM Mode: disabled (2)
localhost ~ # gsctool -a -f
start
[WARNING:bus.cc(638)] Bus::SendWithReplyAndBlock took 1516ms to...
Problems reading from TPM, got 10 bytes
Failed to start transfer
localhost ~ # reboot
-- GSC reboots during device rebnoot
localhost ~ # gsctool -a -f
start
target running protocol version 6
keyids: RO 0xaa66150f, RW 0x334f70df
offsets: backup RO at 0, backup RW at 0x4000
Current versions:
RO 0.0.11
RW 0.6.30
localhost ~ # reboot
-- GSC does NOT reboot during device rebnoot
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Change-Id: I492bd2f201f3c5c7d1cd9b228ec6ab1cdcf8fa53
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2987913
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
NVMEM commits are disabled for a few seconds after every TPM reset.
Setting TPM mode to 'disabled' requires the commits to be enabled
first, so that the NVMEM updates would be saved immediately.
Re-enabling the commits must be done by the same task which disables
them, i.e. the TPM task. This patch moves the invocation of
'nvmem_enable_commits()' to the main processing thread of the TPM mode
vendor command handler. When invoked through TPM it will be able to
properly reenable NVMEM commits. When invoked through USB it will fail
if TPM reset happened less than 3 seconds ago.
BUG=b:187831914
TEST=verified that when the TPM disable command is sent immediately
after TPM reset over USB it is rejected with error code 11, no
lockup/watchdog reset is observed.
Testing the AP sending the command will be done when debugging
NBR.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Change-Id: I035cd5db2c55fe5c9dd3679153bf9a2ec49210b6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2998302
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Cr50 doesn't use AES-CMAC and P256-ECIES functions. Currently these
functions are not linked in as they are not used. Since we will change
a build process to build crypto library separately to implement FIPS
certification requirements, better to remove it from library as
otherwise they will increase image size. Files are still there in case
if will be needed in the future.
BUG=b:134594373
TEST=make BOARD=cr50
Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com>
Change-Id: I0922a5f35a85b1a2d85e6b325716ac3838c2c9cb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2988186
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Commit-Queue: Mary Ruthven <mruthven@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
It is necessary to be able to send SPI transactions with sizes
exceeding the SPI controller buffer size. This can be achieved by
asserting CS before sending the first batch (data block) in a
transaction and deasserting CS after the last batch.
Let's add a SPI controller spi_sub_transaction() API, with an
additional parameter indicating when the last batch is submitted for
processing.
The existing spi_transaction() API becomes a wrapper which always
calls spi_sub_transaction() to send a full single batch transaction.
BUG=b:79492818
TEST='flashrom --flash-name' still succeeds.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Change-Id: Ia0c5114edd5caf6c6d0e22cab3bfa3c4d86ac79a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977964
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
| |
BUG=b:191799047
TEST=make buildall -j ; run tpmtest
Change-Id: I8b743c16c4e4b8b0779eb40ba1eb0a78613930f9
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2980812
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
To be able to send and receive multiple SPI buffer quantities in a
single SPI transaction it is necessary to control the SPI CS signal
directly, as opposed to connecting it to the SPI controller.
Direct mode allows to keep CS asserted as long as necessary to
transfer the full data blob, size of which might exceed the the size
of the SPI controller buffer.
BUG=b:79492818
TEST=flashrom access still works fine:
$ flashrom -p raiden_debug_spi:target=ap --flash-name
flashrom f10dff7b-dirty on Linux 5.4.0-71-generic (x86_64)
flashrom is free software, get the source code at https://flashrom.org
Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Raiden target: 2
Found GigaDevice flash chip "GD25Q127C/GD25Q128C" (16384 kB, SPI) on...
vendor="GigaDevice" name="GD25Q127C/GD25Q128C"
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Change-Id: Idecf019d3fd19675d7f78e4dc1140106a2112c6b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2973580
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Code placing data on the upstream usb_spi queue does not check if
there is enough room on the queue, which could result in silent
dropping of data when the upstream queue is busy.
This is not a big deal with Raiden protocol V1 where USB packets to
the host are sent one at a time, but becomes a problem if the DUT
sends multiple USB packets without waiting for the host.
Adding a sleep in the loop waiting for the room in the queue to free
up seems an appropriate solution, since the AP is held in reset at
this point and there is no much activity happening on Cr50.
Experiments have shown that with 2KB PDU size the total wait time
while reading a 16M flash does not exceed 30 ms when this fix is
deployed.
BUG=b:79492818
TEST=with the rest of the patches applied observed successful flashrom
operations running Raiden protocol version V2. Without this patch
there were periodic drops of data sent by DUT.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Change-Id: I73fdfdda09837891dc1db2453098ec1d219c4553
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2973573
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
| |
Porting consisted of running 2to3 and then modifying the Tee::write()
function by hand.
BUG=none
TEST='make -j buildall' does not throw Python2 warnings any more and
still succeeds.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Change-Id: I6762bfc176ef749dccba7572db171dd2f83aaebc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2973575
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
UpdateNoTPMWipe did not do anything. Replace it with 'Unused' in the
capabilities list.
We can't completely remove the capability because of how cr50 uses
the cap_info list. Every item from 0 to CCD_CAP_COUNT needs to have a
name and a default value. Renaming it makes it clear the capability
isn't used and keeps the relationship between capabilities and their
value in the capabilities bitmask.
BUG=b:182482706
TEST=none
Change-Id: Ie1e6674f414789ae52508b89e6f95d0a122cbd6f
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2970990
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
|
| |
|
|
|
|
|
|
|
|
| |
BUG=b:185783841
TEST=none
Change-Id: I4c9a43efd2d3c5e77a681b8b10054a07df99df96
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953866
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
Process FLASH_READ_FAILED the same as the rest of the errors. Put the
actual code in response and return INTERNAL_ERROR.
BUG=none
TEST=none
Change-Id: Iacbdc2db01c54da57cac28ccbdfd3210be95dc62
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954320
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
| |
Add support for running the VENDOR_CC_GET_AP_RO_STATUS vendor command.
BUG=b:182594555
TEST=gsctool -aB prints the AP RO verification status
Change-Id: If14073894441657746a84cff8f778fd57a126625
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2951963
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
AP RO verification has four outcomes. Shimless RMA needs to be able to
check the status. This change adds a vendor command to check the AP RO
verification status
NOT_TRIGGERED: The last AP reboot was not triggered by RO verification
key combination.
PASS: The last AP reboot was triggered by RO verification key
combination, and the verification passes
FAIL: The last AP reboot was triggered by RO verification key
combination, and it fails. In reality, the device should brick and
the system will not see this response.
UNSUPPORTED: The last AP reboot was triggered by RO verification key
combination, but there is no data to perform it or the
board doesn't support it.
BUG=b:182594555
TEST=manual
# Erase board id
# Erase AP RO hash
cr50 > ap_ro_info erase
# Check status
AP RO status = 3: unsupported
# Set gbb flags
/usr/share/vboot/bin/set_gbb_flags.sh 0x140
# Set AP RO hash
./util/ap_ro_hash.py -v True GBB
# Check status
AP RO status = 0: not run
# Trigger verification
# Check status
AP RO status = 1: pass
# Change gbb flags
/usr/share/vboot/bin/set_gbb_flags.sh 0xa39
# Trigger verification
# Check status
AP RO status = 2: FAIL
# Set board id to DUKI:0x10
# Check status
AP RO status = 3: unsupported
Change-Id: I354ccd6317cd36008a66ffd93afb3ee95f3c3561
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2950314
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Some factories programmed hashes into devices that don't support reading
from AP flash while EC_RST_L is asserted. Skip AP RO verification on
these devices if the RLZ is blocked.
BUG=b:185783841
TEST=manual
Set board id to YVRQ:0x10
Verify AP RO verification can be triggered
Set board id to VYRC:0x10
Verify AP RO verification is skipped even if the hash is stored.
Change-Id: I7ef5ceafd55ae5e90b4a754d1e92317a9a745ef9
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2950313
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
| |
Use one method to verify the AP RO hash is valid.
BUG=b:182594555,b:185783841
TEST=run ap ro check on hatch
Change-Id: I4a45e423180ee8494cefe1ca35685676b910efdf
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2950312
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
| |
BUG=b:186446598
TEST=none
Change-Id: I0192cd85904fe162c38bbedd5321187bc24be8d9
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2970991
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
Commit-Queue: Namyoon Woo <namyoon@chromium.org>
|
| |\
| |
| |
| | |
Signed-off-by: Josip Sokcevic <sokcevic@google.com>
|
| | |
| |
| |
| | |
Signed-off-by: Josip Sokcevic <sokcevic@google.com>
|
| |/
|
|
| |
Signed-off-by: Josip Sokcevic <sokcevic@google.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch adds the codes that support EC-EFS 2.1.
However, it is not enabled. EC-EFS 2.0 is still enabled as default.
BUG=b:187953899
TEST=built cr50 image, and ran it on hatch with CONFIG_EC_EFS2_VERSION
defined as 0 and 1 respectively. For both cases, CrOS booted good.
Also checked CrOS recovery was done good with corrupted TPM secdata, and
booted good at the end.
> ec_comm corrupt
> ecrst pulse
Ran the unittest for both version as well.
$ make run-ec_comm
$ make run-ec_comm21
Signed-off-by: Namyoon Woo <namyoon@google.com>
Change-Id: I7623fa56dd44a01002628685826105afe76e034f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2891925
Tested-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Commit-Queue: Namyoon Woo <namyoon@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The index is added to cr50 repository while the usage is only for
generic TPM2.0 case. In the future we don't want GSC to re-use the index
number.
BUG=b:187821960
BUG=b:191163997
TEST=make buildall -j
Signed-off-by: cylai@chromium.org
Change-Id: I6cfb12cf4558dd0bf2c99e045ef6e0b89698bbc7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2892151
Tested-by: Leo Lai <cylai@google.com>
Commit-Queue: Andrey Pronin <apronin@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
It's difficult to erase the board id. Skip the board id check for
setting the hash with a DBG image. These images are only used by
developers.
BUG=none
TEST=ap_ro_hash.py -v True GBB with and without the board id set with a
DBG image.
Change-Id: I3cb56323aac5d32c3552e91db8f05724ba04fe94
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2950311
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
For commands that do not take in an image, we cannot tell if we are
communicating with a haven or dauntless chip automatically. Add a way to
specify if we are communicating with a dauntless chip. Default to haven
if the optional --dauntless flag is not present
BUG=b:190659004
TEST=execute `gsctool -I` on haven chip and see success
TEST=execute `gsctool -I --dauntless` on haven chip and see failure that
it cannot find device with dauntless VID:PID
Change-Id: Ia92422846d283eba5b27cfaa130c782f13af90ca
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2952837
Commit-Queue: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
| |
If cr50 is open, flash_cr50 can just run 'reboot' on the cr50 console to
reboot cr50. Add support for doing that.
BUG=none
TEST=flash_cr50.py -p 9999 -i $IMG -c cr50-rescue -r console_reboot
Change-Id: Ibe0d7f98c64faf7f0ac35b04dfad89ad58333cac
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2945957
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
Commit-Queue: Namyoon Woo <namyoon@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
This adds support for running drbg_test with the lab vectors.
BUG=b:189376694
TEST=./tpmtest
Change-Id: I44f3671f55e1befcac36006568bf1a4deb2d4685
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2924406
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
| |
BUG=b:189376694
TEST=none
Change-Id: I943a94ff35e6a387717032df5bd9d6c5ac8d4293
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2924405
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
| |
pylint says there are too many local variables in drbg test. Break out
the drbg op handling into separate functions.
BUG=b:189376694
TEST=./tpmtest
Change-Id: Ic26cf28e85a9b56ce4f681175daaf077aea14e58
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2924404
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Save the results in a list with their group and test case ids. We'll
need all of this information to generate the response vectors for the
lab.
BUG=b:189376694
TEST=./tpmtest
Change-Id: I9a43d8397baed30e527b213c8860a0ec740c5398
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2924403
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
We won't have the responses for the lab vectors. Add a check_result bool
to the DRBG_GENERATE test items, so there's a way to tell when it needs
to record the result for the generate command. The test will compare
the expected result to the actual result while running if check_result
is True and the expected string is not empty.
BUG=b:189376694
TEST=./tpmtest
Change-Id: Ifbb5ad9737a6649affce4c885083b631f5056a26
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2924402
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
| |
For lab testing we won't get the response vectors just the output
bit length. Add a way to specify the byte length in TEST_INPUTS.
BUG=b:189376694
TEST=./tpmtest
Change-Id: I1c4f6940b4ccfced9494eefce6867176c79fa06f
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2923241
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
| |
Increase the size of the hmac output buffer to 512, so it's big enough
to support the lab responses.
BUG=b:189376694
TEST=drbg_test.py
Change-Id: Id5ff4024079241d36a33f1c36f322a27c4b929d7
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2923240
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
It has not always been like that but recently the following message
started showing up on the console when building Cr50 image with
CR50_DEV and H1_DEVID variables defined:
awk: cmd. line:1: warning: regexp escape sequence "' is not a ...
This patch fixes the problem.
BUG=none
TEST=running 'CR50_DEV=1 H1_DEVIDS="0 1" make BOARD=cr50 -j' succeeds
and does not generate the above error message any more.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Change-Id: I3a34e1dc5dc3ca58928bfeac32df1ac7e1aa3c4c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2931956
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
|
