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* usb_mux: Avoid accessing unavailable muxesstabilize-14031.B-mainCaveh Jalali2021-06-161-3/+20
| | | | | | | | | | | | | | | | This adds additional checks to avoid mux device accesses when the generic mux driver knows that the device has not been initialized or is in low power mode. This avoids spurious I2C transaction failures when attempting to access unavailable devices. BRANCH=none BUG=none TEST=observed "C0: Retimer I2C write err=1" messages are gone Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I762a878f2cab91ca98fd7a602e0b20be8b85ccd8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2955610 Reviewed-by: Diana Z <dzigterman@chromium.org>
* kodama: Enable CONFIG_DEBUG_ASSERT_BRIEF to reduce flash usageCaveh Jalali2021-06-161-0/+2
| | | | | | | | | | | | | | This enables CONFIG_DEBUG_ASSERT_BRIEF to reduce the flash footprint as we are running out of space. BRANCH=none BUG=none TEST=make BOARD=kodama passes, 1124 bytes are now available. Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: Ia2b6d186db0ebb5d751e464d9331d1c4e5aadc09 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2965785 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* elm: Undef CONFIG_CMD_ACCEL* to reduce flash usageCaveh Jalali2021-06-161-2/+1
| | | | | | | | | | | | | | This removes ACCEL related console commands to free flash space as we have run out of space on elm. BRANCH=none BUG=none TEST=make BOARD=elm passes, 2240 bytes are now available. Change-Id: Ibd51a02a97a246fae3c0f61aa53d070b85877c38 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2965784 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* ps8805: Add driver method to set/get GPIO signalsScott Collyer2021-06-162-0/+90
| | | | | | | | | | | | | | | | | The PS8805 has 3 GPIO signals which can be controlled by the EC with I2C register accesses. This CL adds functions to both set and get a one of the 3 PS8805 GPIO signals. BUG=b:159330563 BRANCH=quiche TEST=verified on gingerbread that VBUS control is functioning. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I1ef688e713ea84d2b0c6a6c23385fe6afb4f96b2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953868 Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Homestar:TCPM:Enable PD3.0 functongjian2021-06-161-0/+3
| | | | | | | | | | | | BUG=b:185415863 TEST=make -j BOARD=homestar Verify build on EVT board BRANCH=Trogdo Signed-off-by: tongjian <tongjian@huaqin.corp-partner.google.com> Change-Id: I1d2a71e10c0a63fd1e9756a7b46f82eb6e1cf764 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2962202 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* Cret: Modified NPCX7_PWM1_SEL defination to 1Josh Tsai2021-06-161-1/+1
| | | | | | | | | | | | | | | | | | | | | In Cret board, GPIOC1 is the power button signal from EC to PCH, if NPCX7_PWM1_SEL set to 0, it will cause the power button signal can't be controlled by EC. So we need to change the NPCX7_PWM1_SEL to 1. BUG=b:191184363 BRANCH=dedede TEST=DUT can resume from S0ix by press power button, GPIOC1 can be asserted when press power button. Signed-off-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Change-Id: I64a600a02791fa73db28d4315eb287622d114675 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2965804 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* cherry: enable HOST_SLEEP_STATETing Shen2021-06-161-0/+3
| | | | | | | | | | | | | | | Port CL:2954984 to Cherry. BUG=none TEST=make BRANCH=main Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I6cc934669a5fcaba64de8a9b61e4c2a94f6ddb14 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2962215 Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* lazor: Interpret the BOARD ID in the binary-first base3 systemWai-Hong Tam2021-06-163-0/+20
| | | | | | | | | | | | | | | | | | | Convert the raw BOARD ID to a binary-first base3 number. So it won't affect the original binary BOARD ID assignment. If all the GPIOs are not tri-state, it ends up to be a number in binary interpretation. Also cache the BOARD ID value. BRANCH=Trogdor BUG=b:190250108 TEST=Build the image and check the BOARD IDs. Change-Id: Ibd938fbc05977df1eb7d8d27460beab4cd0f7bf7 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2964390 Reviewed-by: Julius Werner <jwerner@chromium.org>
* util: Add function to convert binary first base3 numberWai-Hong Tam2021-06-163-0/+109
| | | | | | | | | | | | | | | | | | | | | | Add an util function to convert a ternary bit array (each element is either 0, 1, or 2) to a non-standard ternary number system where the first 2^n natural numbers are represented as they would be in a binary system (without any Z digits) and the following 3^n-2^n numbers use the remaining ternary representations in the normal ternary system order (skipping the values that were already used up). This function is useful for converting BOARd ID, which is initially used a binary and later decided to switch to tri-state after some revisions have already been built. BRANCH=Trogdor BUG=b:190250108 TEST=make runhosttests Change-Id: I853a04f3b28eb54c61855251dc5232c7e6994fef Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2964389 Reviewed-by: Julius Werner <jwerner@chromium.org>
* kracko: Add second source lid accel kx022Tommy Chung2021-06-162-0/+44
| | | | | | | | | | | | | | | | To avoid shortage, we add second source of lid accel kx022 for kracko. BUG=none BRANCH=dedede TEST=on kracko, make sure that lid accel kx022 works with related SSFC value. Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com> Change-Id: I4b5a270ad609982355bab36ed3f0d18a2d033d10 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2962193 Reviewed-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* brya: Add 2 ADC Channels for P2 buildKo_Ko2021-06-162-9/+25
| | | | | | | | | | | | | | | | | | | | Add 2 ADC channels SENSOR_3_CHARGER and ADC_TEMP_SENSOR_4_WWAN, and change sensor 2 naming for adc and thermal params. BUG=b:181271666, b:183452273 BRANCH=none TEST=build ec.bin and flash ec after not affect boot. Signed-off-by: Ko_Ko <Ko_Ko@compal.corp-partner.google.com> Change-Id: Ib26c264532c52364dc21eeca59c0611001898a42 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2905161 Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-by: Ko Ko <ko_ko@compal.corp-partner.google.com> Tested-by: Ko Ko <ko_ko@compal.corp-partner.google.com> Tested-by: Owen Ou <owen_ou@compal.corp-partner.google.com> Commit-Queue: Owen Ou <owen_ou@compal.corp-partner.google.com> Auto-Submit: Owen Ou <owen_ou@compal.corp-partner.google.com>
* config: Rename CONFIG_CROS_BOARD_INFOPhilip Chen2021-06-1639-45/+44
| | | | | | | | | | | | | | | | | | Rename CONFIG_CROS_BOARD_INFO to CONFIG_CBI_EEPROM to make it clear that the information comes from on-board EEPROM. It sets up the groundwork for adding more options of CBI sources later. BRANCH=None BUG=b:186264627 TEST=make buildall -j Signed-off-by: Philip Chen <philipchen@google.com> Change-Id: I9a6feee0a8b35bbf29e445544243485507767ad8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2945792 Reviewed-by: Philip Chen <philipchen@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org>
* primus: Enable PS/2 MouseScott Chao2021-06-164-0/+29
| | | | | | | | | | | | BUG=b:187969783 BRANCH=none TEST=make buildall Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Change-Id: I99a72393dbe732bcab51a02278b0c372239f895c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2952804 Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com>
* Metaknight: Remove legacy boardCaveh Jalali2021-06-161-6/+0
| | | | | | | | | | | | | | | This removes the last remaining reference to metaknight_light. We already removed the board. BRANCH=None BUG=None TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: Id230d32dbe51d3c7d1aedaf2b41e0d491c3fa627 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2964388 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* zephyr: Add ANX7451 and PS8811 to KconfigRob Barnes2021-06-162-0/+26
| | | | | | | | | | | | | | Add ANX7451 and PS8811 retimer/mux to Zephyr kconfig. BUG=b:190191868 TEST=Build, ANX7451 and PS8811 configs not reported as missing BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I86e1a8cb34360c13175766309152984254d117fc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2957030 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* asurada: Move board USB-C code into a separate fileSimon Glass2021-06-163-33/+29
| | | | | | | | | | | | | | Move this code into a new file so that zephyr can build it as well as ECOS. BUG=b:189855648 BRANCH=none TEST=make BOARD=asurada -j30 Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I86e10ff02154d09fb7c967cbe86034689d262e47 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2956087 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* asurada: Move baseboard USB-C code into a separate fileSimon Glass2021-06-163-402/+423
| | | | | | | | | | | | | | | | | Move this code into a new file so that zephyr can build it as well as ECOS. Put the definition of board_get_sub_board() at the top so we don't need the forward declaration. BUG=b:189855648 BRANCH=none TEST=make BOARD=asurada -j30 Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Id04730161efd4fb5ec4366352bc26cfd11d8bbee Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2941891 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* Metaknight: Remove legacy boardDiana Z2021-06-151-1/+0
| | | | | | | | | | | | | | | Metaknight has progressed past the point where the legacy board is needed, and it's down to less than 100 bytes of free flash at this point. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ie8899bc294745dceddc207428e8f5e8f8222da13 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2964921 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* TCPMv2: Ignore PR swap requests when PR transitioningDiana Z2021-06-151-0/+21
| | | | | | | | | | | | | | | | | | | | | | | The charge manager may request a PR swap when it is no longer charging from a port that is DRP and configured as sink. This can prevent us from depleting a tablet when there's a better charger available, for example. However, when the DRP partner has already initiated a PR swap this may lead to the chromebook inadvertently becoming the sink of the connection again. Ignore PR swap requests while we're in a state where our PR role doesn't match what it's expected to be shortly in order to prevent this. BRANCH=None BUG=b:174334068 TEST=on storo, connect guybrush and enable charging alternately from both DUTs. Then, when charging from the other DUT, connect a charger and ensure that storo swaps to sourcing the other system. Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I1908f4ee726d49ca89f6f0c8f75bdfdf0fb12a47 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2964920 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* bb_retimer: Explicitly check EC status codesCaveh Jalali2021-06-151-4/+4
| | | | | | | | | | | | | | | This replaces inverted boolean logic with explicit comparison with EC_SUCCESS for improved readability. BRANCH=none BUG=b:181743576,b:188826559 TEST=compare_builds.sh matches Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: Id5aaa167b2e9071e5757f561d788da49af03f9d9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2962214 Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Boris Mittelberg <bmbm@google.com>
* adlrvp: enable retimer firmware updateli feng2021-06-151-0/+1
| | | | | | | | | | | | BUG=b:189974129 BRANCH=none TEST=make BOARD=adlrvpp_ite pass Signed-off-by: li feng <li1.feng@intel.com> Change-Id: I06e85f651b6aada465b990215d2cde7c3ecc282c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954731 Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: caveh jalali <caveh@chromium.org>
* asurada: Add interrupt functions to a header fileSimon Glass2021-06-152-7/+9
| | | | | | | | | | | | | | | | | | | | | | | We need to split the implementation of USB-C into multiple files, since Zephyr cannot build board.c or baseboard.c This means that we cannot use static definitions for the interrupt functions, since it forces gpio_list.h to be included by only a single C file. Instead we must put them in a header file so they can be defined in any of the files that are built. Update these functions and add them to the baseboard_common header. BUG=b:190213172 BRANCH=none TEST=with other CLs, build asurada for Zephyr Change-Id: I99980db47820d903403a7b030d4bc33ff53373f4 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2941817 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* zephyr: hayato: Include board_id implementationSimon Glass2021-06-151-1/+2
| | | | | | | | | | | | | Add this to hayato so we can detect the board ID. BUG=b:190213172 BRANCH=none TEST=with other CLs, build asurada for Zephyr Change-Id: I2bf383f5f4cbe3d1c008bf2de8146cffe224ad5e Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2956086 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* zephyr: Add dummies for a few more task functionsSimon Glass2021-06-151-0/+15
| | | | | | | | | | | | | | These need to be implemented properly, or another way found. For now, add stubs. BUG=b:190213172 BRANCH=none TEST=with other CLs, build asurada for Zephyr Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I12283dcc2b70b5e2c788169b9b3939cba4380f10 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2941814 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* zephyr: Add support for CONFIG_USBC_PPC_SYV682CSimon Glass2021-06-152-0/+13
| | | | | | | | | | | | | Allow this option to be enabled on Zephyr. BUG=b:189855648 BRANCH=none TEST=with other CLs, build asurada for Zephyr Change-Id: I73f49b46ebb9ebe58f06cea51ae570a411ba3010 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2941890 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* zephyr: Complete Kconfig support for ITE TCPMSimon Glass2021-06-152-5/+26
| | | | | | | | | | | | | | | | | | Move PLATFORM_EC_USB_PD_TCPM_ITE_ON_CHIP down with the other TCPM options so that everything is together. Add an option to set the active port count. For now, hard-code the chip's USB PHY count. We don't seem to have access to that information from the zephyr side at present. BUG=b:189855648 BRANCH=none TEST=with other CLs, build asurada for Zephyr Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I8fd3c5c160f4baa74089730bad0371a01021c9f0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2941889 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* zephyr: Add support for the PS8743 USB muxSimon Glass2021-06-153-0/+14
| | | | | | | | | | | | | Add a Kconfig for this chip so it can be used with zephyr. BUG=b:189855648 BRANCH=none TEST=with other CLs, build asurada for Zephyr Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: If2eedaf9100462a9d591525d21bfa76c7e861af1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2941888 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* zephyr: Ensure that CONFIG_USBC_PPC can be definedSimon Glass2021-06-151-0/+5
| | | | | | | | | | | | | | | | | At present the Kconfig for this option never makes it through to the EC build. This does not seem to cause ill effects, but it does create a different between the configs enabled in ECOS and Zephyr, when CONFIG_PLATFORM_EC_USBC_PPC is defined. Fix it by adding a suitable #define. BUG=b:189855648 BRANCH=none TEST=with other CLs, build asurada for Zephyr Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ifd2dd9ee63d1575effd99376f6ea5fbd1baac5a0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2941887 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* zephyr: Support the IT5205 USB muxSimon Glass2021-06-153-0/+19
| | | | | | | | | | | | | Add support for this chip on Zephyr, needed for Asurada. BUG=b:189855648 BRANCH=none TEST=with other CLs, build asurada for Zephyr Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I868f46ee617003eef5ceba65be4241b502d6d280 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2941886 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* zephyr: Add support for ISL9238 Rev CSimon Glass2021-06-153-0/+22
| | | | | | | | | | | | | | | This chip version cannot be detected at runtime. Add support for the Kconfig option to signal that this revision is on the board, needed for Asurada. BUG=b:189855648 BRANCH=none TEST=with other CLs, build asurada for Zephyr Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I3a86b94e4b4936dc6f6f071d6facd364555865a4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2941885 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* zephyr: Add support for the MT6360Simon Glass2021-06-153-0/+29
| | | | | | | | | | | | | Add a Kconfig for this driver so it can be used from zephyr. BUG=b:189855648 BRANCH=none TEST=with other CLs, build asurada for Zephyr Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I14434a52388b21d2f4200cea50c326ffb2788abe Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2941884 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* pca9675: Initialize the I/O pins at initVijay Hiremath2021-06-151-11/+17
| | | | | | | | | | | | | BUG=none BRANCH=none TEST=Tested on ADLRVP, all the I/O pins are at default state as in GPIO.inc Change-Id: Id1f19d500860749183b4eaed90685efda3bbc716 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954729 Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.com>
* guybrush: Apply PS8811 tuning parametersRob Barnes2021-06-151-0/+26
| | | | | | | | | | | | | Applying tuning parameters recommended by retimer vendor. BUG=b:189317041 TEST=Build and boot guybrush BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I59bf25b196a0f0da8e71bd41dffb3b9cef251666 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2920147 Reviewed-by: Diana Z <dzigterman@chromium.org>
* zephyr: fix jdata pointerDawid Niedzwiecki2021-06-151-2/+10
| | | | | | | | | | | | | | | | | Zephyr stores the panic date not at the end of RAM, thus the pointer to the jump data has to be calculated in a different way. With the change, the function system_usable_ram_end returns a correct value which is used to calculate the SharedMem size. BUG=b:178011288 BRANCH=none TEST=run firmware_ECSharedMem test on Lazor Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: If777261a5582071822a998e796973ec5b8cb3cac Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2960174 Reviewed-by: Yuval Peress <peress@chromium.org>
* asurada: add least to boot AP battery percentstabilize-14029.B-mainEric Yilun Lin2021-06-151-0/+1
| | | | | | | | | | | | | | BUG=none TEST=make BARDO=hayato BRANCH=asurada Change-Id: I82be5b51508c91077f26fd014a666a7db4769ee8 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954987 Tested-by: Eric Yilun Lin <yllin@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* asurada: enable HOST_SLEEP_STATE to smooth suspend trasnsitionEric Yilun Lin2021-06-152-0/+73
| | | | | | | | | | | | | | | | | | | | | | | MT8192 previously didn't enable the command due to it already has AP_IN_SLEEP_L, but we found that if we don't have the command, EC might have rare chance to interrupt AP with hostevent when AP in transition to S3, and cause the suspend failure. This CL enables CONFIG_POWER_TRACK_HOST_SLEEP_STATE so the EC is able to handle the AP's hint to disable non-wakeup hostevent when it's transisting to S3. BUG=b:186709406 TEST=ensure EC received the AP's note BRANCH=asurada Change-Id: I7a2a7eefc7620817ca446fd24370375130daf6be Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954984 Tested-by: Eric Yilun Lin <yllin@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* zephyr: shim: move mpu code under core/cortex-mFabio Baltieri2021-06-143-1/+1
| | | | | | | | | | | | | | The MPU code is cortex-m specific, so move it out of shim/src and into shim/core/cortex-m. BRANCH=none BUG=b:180039888 TEST=build & run on volteer Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: Ic77d6f58751822e3dad461f9236f5b43da764164 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2961189 Reviewed-by: Yuval Peress <peress@chromium.org>
* zephyr: shim: add mpu enable and disable supportFabio Baltieri2021-06-143-56/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for allowing the EC code to control the MPU setup. ECOS code used to handle configuration as well as MPU enable/disable. Zephyr has its own way of handling MPU configuration, so that part of the EC code is compiled out, instead make sure that the fixed MPU regions (that cover code & data) are disabled before the EC code starts, and then enable them when mpu_enable() is called Zephyr APIs do not expose any memory protection funciontality outside of the arch specific code, so this sets the MPU regiers directly. That's not very elegant, but it's done in a sample application as well [1], so it should be an acceptable approach. Disabling the MPU unit entirely could also be an option, but only doing the fixed regions has the advantage of leaving the stack protection and null pointer detection regions enabled. [1] https://github.com/zephyrproject-rtos/zephyr/blob/main/samples/application_development/code_relocation/src/main.c BRANCH=none BUG=b:180039888 TEST=actually tried to write in the static region, verified it fauls after sysjump disable Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: I020c347e5f1b929500d4cf1c4c400dcd67e78dfa Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2950168 Reviewed-by: Yuval Peress <peress@chromium.org>
* guybrush: Add PS8811 driverRob Barnes2021-06-146-6/+92
| | | | | | | | | | | | | | | Add PS8811 USB A retimer driver. Reusing USB mux structure even though the retimer does not have a mux. BUG=b:176987937 TEST=Build and run BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Ie11a105f344e6acc1312cda517fdfe54ecb8c8ea Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2946307 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* PCHG: Flash multiple binaries in one update sessionDaisuke Nojiri2021-06-141-39/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CTN730 firmware consists of separate binaries and currently each binary is flashed in a separate session. This does not work if two binaries need to be updated at the same time because each session writes a new version (after closing the session) and CTN730 refuses to open a session if the version number is the same. This patch makes ectool write multiple binaries in one update session. Example session: localhost ~ # ectool pchg 0 update 0x1041 0x201200 /tmp/user_ee.bin \ 0x207000 /tmp/WLC_Host_UserApp_CRC.bin Opened update session (port=0 ver=0x1041 bsize=128): Writing /tmp/user_ee.bin (3072 bytes). ******************************************************************** Writing /tmp/WLC_Host_UserApp_CRC.bin (90624 bytes). ******************************************************************** Firmware is updated successfully (CRC32=0x5ef03e4d). localhost ~ # ectool pchg 0 reset Reset port 0 complete. localhost ~ # ectool pchg 0 State: ENABLED (2) Battery: 0% Errors: 0x0 FW Version: 0x1041 Dropped events: 0 BUG=b:182600604, b:173235954 BRANCH=trogdor TEST=See the description above. Change-Id: I554ae560947e896ae73979c85d637f32d3e114af Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2952836 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* flash_ec: support servo_v4p1_with_servo_microEric Yilun Lin2021-06-121-5/+7
| | | | | | | | | | | | | | | | | | There were some glob issues in the code so it can't flash with the servo_v4p1_with_servo_micro config. BUG=none TEST=flash_ec to hayato with servo_v4p1_with_servo_micro and servo_v4_with_servo_micro BRANCH=none Change-Id: If8fcb3046e4eeb492eac3a981484b7fbc276bcf5 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954985 Tested-by: Eric Yilun Lin <yllin@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Eric Yilun Lin <yllin@google.com>
* flash_fp_mcu: Add debug spi bytes activityCraig Hesling2021-06-121-0/+33
| | | | | | | | | | | | | | | | | | | | In an effort to understand why we see "Device or resource busy" when binding the raw spidev driver, we add a few byte count prints to indicate if spi activity occurred between certain operations. This should be removed when a fix for the linked bug is determined. BRANCH=none BUG=b:190744837 TEST=# On Hatch and Zork scp util/flash_fp_mcu ${DUT_HOSTNAME}:/usr/local/bin/flash_fp_mcu ssh ${DUT_HOSTNAME} flash_fp_mcu --hello Signed-off-by: Craig Hesling <hesling@chromium.org> Change-Id: I400ca76ee3451f1e155d7912a7c25613d9f68846 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954304 Reviewed-by: Patryk Duda <patrykd@google.com> Reviewed-by: Andrew de los Reyes <adlr@chromium.org>
* flash_fp_mcu: Abort if raw driver bind failsCraig Hesling2021-06-121-0/+5
| | | | | | | | | | | | | | | | This helps simplify the errors being reported. BRANCH=none BUG=b:190744837 TEST=# On Hatch and Zork scp util/flash_fp_mcu ${DUT_HOSTNAME}:/usr/local/bin/flash_fp_mcu ssh ${DUT_HOSTNAME} flash_fp_mcu --hello Change-Id: I74d57ec0d7fc4bda3fae144fe649124af5c61ba9 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954919 Reviewed-by: Patryk Duda <patrykd@google.com> Reviewed-by: Andrew de los Reyes <adlr@chromium.org>
* bb_retimer: Reduce retry delay to 10msCaveh Jalali2021-06-121-2/+2
| | | | | | | | | | | | | | | | This reduces the delay between poll intervals of the burnside bridge register accesses. A 10 ms delay is typically sufficient to achieve a successful register read if the first register read failed. BRANCH=none BUG=none TEST=with added timestamps, observed register accesses succeed after a 10ms delay. Change-Id: I33941b26ef093b0a6c2f38d1f5223991c9b9d4ba Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2955609 Reviewed-by: Boris Mittelberg <bmbm@google.com>
* brya: Check burnside bridge RESET signal statusCaveh Jalali2021-06-121-0/+14
| | | | | | | | | | | | | | | | | | This adds a level check of the burnside bridge reset signal GPIO. The signal is connected to a GPIO on the nct3808 which becomes uncontrollable when a debug accessory is connected and forces the BB into reset. We can check for this case by reading back the level of the GPIO and return an error when the desired signal level has not been achieved. BRANCH=none BUG=b:181743576,b:188826559 TEST=buildall passes, PD still works on brya Change-Id: Ia21cbc699f857542600cc5946868e9c58cfa6cf9 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2955608 Reviewed-by: Boris Mittelberg <bmbm@google.com>
* bb_retimer: Return status from bb_retimer_power_handle()Caveh Jalali2021-06-126-10/+18
| | | | | | | | | | | | | | | | | | | | | | | This allows the implementation of bb_retimer_power_handle() to return a status value indicating whether the request was successful. The default implementation simply controls a GPIO and is expected to succeed unconditionally. More complex implementations may run into failure cases that leave the BB unreachable. When this happens, device initialization returns an error so the caller can take mitigating action. USB MUX operations tend to be called from timing sensitive code paths in the TCPM, so careful error handling helps avoid cascading problems like PD negotiation failures. BRANCH=none BUG=b:181743576,b:188826559 TEST=buildall passes, PD still works on brya Change-Id: If79078be26e47d758e2cd6cc385ff2b34fecff63 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954198 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com>
* brya: Implement board_is_dts_portCaveh Jalali2021-06-111-0/+5
| | | | | | | | | | | | | | | | | Brya only has one DTS (CCD) port. We do not want debug accessory support enabled on non-CCD ports as that can have undesirable side-effects. In particular, with debug accessory support enabled on the nct38xx TCPC, some of its GPIOs revert to their primary function in the presence of a debug accessory resulting in undesirable system behavior. BRANCH=none BUG=b:188851792 TEST=brya only reports "Debug accessory detected" on C0 Change-Id: I1cfaf9b51df8e6783db0215fbc6f3cac9e2dd9f1 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954197 Reviewed-by: Boris Mittelberg <bmbm@google.com>
* Limozeen: buck IC solutionSue Chen2021-06-113-43/+52
| | | | | | | | | | | | | | | | | LAZOR model uses DA9313. The other model uses I2C to check that the dut has LN9310 or buck IC. Set VBOB_EN instead of SWITCH_ON_L for buck IC. BUG=b:190250108 BRANCH=trogdor TEST=Make sure dut can power on. Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: Ib70d7e37323747e270c44658bb38ccfa48532a80 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2943986 Reviewed-by: Wai-Hong Tam <waihong@google.com> Tested-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com>
* zephyr: add GPIO VBOB_EN enum nameWai-Hong Tam2021-06-112-0/+2
| | | | | | | | | | | | | | | Some code in EC OS will use this GPIO, i.e. CL:2943986. Make the Zephyr CQ pass. BRANCH=None BUG=b:190250108 TEST=Build the Zephyr image. Change-Id: Ib98c09916a2c7860653689a4c4d0d66bd4f64fdf Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2957073 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: Conditionally remove the task nameKeith Short2021-06-111-0/+15
| | | | | | | | | | | | | | | | | | The names stored in the shimmed task list are not accessible unless CONFIG_THREAD_NAME is defined. Compile out the task names unless CONFIG_THREAD_NAME is enabled. This provides a modest 300 byte savings. BUG=none BRANCH=none TEST=zmake testall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Iaf6bc8a1a7311ed42221a89fc9520e962cdf1b7f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2956829 Reviewed-by: Yuval Peress <peress@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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