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* Delbin: Add delbin_npcx796fc to support npcx796fcstabilize-13505.85.B-masterstabilize-13505.111.B-masterstabilize-13505.100.B-masterrelease-R87-13505.B-masterZhuohao Lee2020-12-113-0/+15
| | | | | | | | | | | | | | | | | | BUG=b:174106425 BRANCH=firmware-volteer-13521.B TEST=make BOARD=delbin make BOARD=delbin_npcx796fc Change-Id: I516994793db07f544ac64065aa05e7adacf6a39d Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567067 Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> (cherry picked from commit 7e0d430378247d7960699d5c91dc47def536c2f6) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2585853 Commit-Queue: YH Lin <yueherngl@chromium.org> Tested-by: YH Lin <yueherngl@chromium.org>
* flash_fp_mcu: Add config zork, uart transport and gpiosstabilize-13505.73.B-masterstabilize-13505.65.B-masterstabilize-13505.63.B-masterBhanu Prakash Maiya2020-10-191-41/+112
| | | | | | | | | | | | | | | | | | | Zork devices have FPMCU connected to AP via UART. Changes in this patch will let developer flash STM32 in chip's bootloader mode via UART. BUG=b:162368367 TEST=1. Run script on Zork device and confirm firmware flash. 2. Run script on Hatch devices and confirm that SPI functionality is intact. Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Change-Id: I9464ae7602e2b6b21d7d31283c6c242a4d603fe5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2444457 Commit-Queue: Yicheng Li <yichengli@chromium.org> Reviewed-by: Yicheng Li <yichengli@chromium.org> Tested-by: Yicheng Li <yichengli@chromium.org> (cherry picked from commit 347e73f4ea4347e142bd942aa879eb1c729ad2c0) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2485926
* Dedede: Check versus vSinkDisconnect on VBUS_REMOVEDstabilize-13505.1.B-masterDiana Z2020-10-022-2/+6
| | | | | | | | | | | | | | | | For variants using the charger Vbus ADC, add a check versus vSinkDisconnect to determine if the TC layer connection has been broken. BRANCH=None BUG=b:168831161 TEST=on waddledee, confirm we can reliably source 5V from a charger without erroneously detecting disconnect Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Icd06d91cd28db068c8cfa646152596d6eab80375 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2436581 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* TCPMv2: Add VBUS_REMOVED levelDiana Z2020-10-015-10/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | For boards which use Vbus ADCs, add a VBUS_REMOVED check level. The level for VBUS_PRESENT should be used in any locations looking for "Vbus is present" on transition, but in order to correctly detect disconnection with a load on Vbus, VBUS_REMOVED (vSinkDisconnect) is required. TODO statements have been added for places where work will be needed to support vSinkDisconnectPD in the future. For boards detecting Vbus through an external chip, the levels will likely be indistinguishable due to the chips setting a lower threshold for disconnect than for connection. Unit test code has also been added to encourage new Vbus levels to be added to the mock, and remind developers to update all locations using the vbus_level enum. BRANCH=None BUG=b:168831161 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I04014ce54ec162dd9c62f545126d921c6d880741 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2436580 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* volteer: Enable SW charge rampingKeith Short2020-10-0115-1/+38
| | | | | | | | | | | | | | | | Enable CONFIG_CHARGE_RAMP_SW because hardware based charge ramping doesn't work on the ISL9241. BUG=b:169350714, b:168960587 BRANCH=none TEST=make buildall TEST=Connect 1.5A CDP device to Volteer and verify charge ramp from 0.5A to 1.5A over about 7 seconds. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I81e8a3913bd776d0d3fda6d294fdeabbde5df62a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2438912 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* zephyr: shim in the timer moduleJack Rosenthal2020-10-016-1/+98
| | | | | | | | | | | | | | | | | | | | | | | | This enables building timer.c in the Zephyr shim. In addition, we provide definitions for the symbols __hw_clock_source_read64 and __hw_clock_event_get defined for Zephyr to provide times to the CrOS EC. The event timer does not make sense for Zephyr code, but we need it defined to prevent link errors (timerinfo uses it). Perhaps the solution to this is to add a new config option (e.g., CONFIG_EVENT_TIMER) which can be used to selectively enable/disable the event timer in the CrOS EC. But punting this work for now and just adding a fake definition. BUG=b:167590251 BRANCH=none TEST=compile for posix-ec, run gettime and timerinfo commands Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I58990a6295625f9c34ec080360470431b46155bd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427100 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: shim in util.cJack Rosenthal2020-10-011-0/+3
| | | | | | | | | | | | | Provides platform/ec utility functions. BUG=b:167590251 BRANCH=none TEST=compile posix-ec Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Ic6846e93dd5190b0db4d666e55ae185c4cc61392 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2442456 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: provide compatible config_chip.h and board.h filesJack Rosenthal2020-10-012-0/+33
| | | | | | | | | | | | | | | | | | | These include files are expected by the EC config system. For board.h, we intentionally leave it empty. For config_chip.h, we populate it with preprocessor guards that translate Zephyr config options to EC config options, and enable/disable some defaults for Zephyr. BUG=chromium:167590251 BRANCH=none TEST=compile common/timer.c with follow-up CLs Change-Id: I2294c6a296f69ae8d514b74ea29f288fe4a240fc Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427098 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: shim in the zephyr shell as the EC consoleJack Rosenthal2020-10-014-3/+154
| | | | | | | | | | | | | | | | | | | | | | | This provides compatible macros for DECLARE_CONSOLE_COMMAND, DECLARE_SAFE_CONSOLE_COMMAND, and DECLARE_CONSOLE_COMMAND_FLAGS. Note: the concept of command flags and command restriction are not enabled currently for Zephyr. We simply define everything for now. These macros use the Zephyr shell subsystem as the backend for commands. In addition, cprints, cprintf, and cputs have been redirected to the shell for CC_CONSOLE channel outputs, and printk for all other outputs. We will look at using Zephyr's logging subsystem instead of printk for the other channels in the future. BUG=b:167590251 BRANCH=none TEST=run "gettime" and "timerinfo" commands with follow-up CLs Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17caedcd0b84a21dd2b135312f683885eaf694af Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427097 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: implement atomic.hJack Rosenthal2020-10-011-0/+45
| | | | | | | | | | | | | | This implements a compatibility layer with the deprecated_* atomic operations using Zephyr's APIs. BUG=b:169151160 BRANCH=none TEST=compile timer.c in follow-up CL Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I49fa1afc28790ab14a91d472141a01e2370b24ac Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427096 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: disable DECLARE_HOOK and DECLARE_DEFERRED macrosJack Rosenthal2020-10-011-4/+8
| | | | | | | | | | | | | | | Going to guard this away, and then we can create more CLs later that actually get hooks working. BUG=b:16899177 BRANCH=none TEST=compile timer.c in follow-up CLs Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Id92850982aef360d3f5e774d30603d4fe1c30495 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427095 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* zephyr: make common.h compatible with ZephyrJack Rosenthal2020-10-011-0/+3
| | | | | | | | | | | | | | Zephyr provides definitions for these macros. Guard them away in the preprocessor so we don't get warnings about duplicate definitions. BUG=b:167590251 BRANCH=none TEST=no warnings in follow-up CLs Change-Id: If2ccb23878ee6cdffa004f95562ea6a24350e063 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427094 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: make IS_ENABLED compatible with shimJack Rosenthal2020-10-011-0/+22
| | | | | | | | | | | | | | | | | | | | | Since we are using Zephyr headers and EC sources together, we need to make an IS_ENABLED macro which is compatible with both the Zephyr concept of being enabled, and the CrOS EC concept (since we inherit many default options from config.h). The Zephyr concept of being enabled is defined, specifically only to the token "1". The CrOS EC concept of being enabled is defined, specifically to no tokens. Thus a macro which allows both concepts defines "enabled" as defined, either to no tokens, or the token "1". BUG=b:167590251 BRANCH=none TEST=compile common/timer.c in follow-up CLs Change-Id: Ieded05e65d0d7c27070f40ef1dd4d24db73b9de4 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427093 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: make task_id.h compatible with ZephyrJack Rosenthal2020-10-011-0/+10
| | | | | | | | | | | | | | | | Guard out parts of task_id.h which make the Zephyr build blow up. We don't have task lists defined for Zephyr, so we need to remove that. BUG=b:167590251 BRANCH=none TEST=compile common/timer.c in follow-up CLs Change-Id: Ie6682dd5771e0693874335609ba13a35da715428 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427092 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: make compile_time_macros.h compatible with ZephyrJack Rosenthal2020-10-011-0/+14
| | | | | | | | | | | | | | | Include sys/util.h in Zephyr, which provides the same definition of most of these macros. Guard the platform/ec implementations where appropriate. BUG=b:167590251 BRANCH=none TEST=compiles Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Icba8e1f7d846cc731ec3acf4f3472e108e4cd6f4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427091 Reviewed-by: Jett Rink <jettrink@chromium.org>
* config: add CONFIG_ZEPHYRJack Rosenthal2020-10-012-1/+21
| | | | | | | | | | | | | | This adds a new configuration option, CONFIG_ZEPHYR, which gets enabled during a build of the platform/ec Zephyr module. BUG=b:167590251 BRANCH=none TEST=compiles Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I157928720d9d6ec0b71c2138298f46c64723fe0b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427090 Reviewed-by: Jett Rink <jettrink@chromium.org>
* zephyr: add base files for Zephyr moduleJack Rosenthal2020-10-014-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | This adds the minimum files necessary for platform/ec to be considered a Zephyr module, as well as some of the discussed CMakeLists files from go/zephyr-shim. BUG=b:167590251 BRANCH=none TEST=Append platform/ec dir to ZEPHYR_MODULES, build for posix-ec To replicate: $ export ZEPHYR_TOOLCHAIN_VARIANT=llvm $ export ZEPHYR_BASE=... $ ZEPHYR_CHROME=... $ PLATFORM_EC=... $ cmake -S ${ZEPHYR_CHROME}/projects/experimental/posix-ec \ -B /tmp/zephyr-build \ -D ZEPHYR_MODULES="${ZEPHYR_CHROME};${PLATFORM_EC}" $ ninja -C /tmp/zephyr-build $ /tmp/zephyr-build/zephyr/zephyr.elf Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Id5eb4e4d3b761a9499e876dfe2178be7f7961e93 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427089 Reviewed-by: Jett Rink <jettrink@chromium.org>
* driver/it83xx, it8xxx2: avoid CCs open when TCPC initRuibin Chang2020-10-012-4/+14
| | | | | | | | | | | | | | | | | | | | | Between we disconnect Rd_DB and set USBPD_START(port), CCs are open state for few micro seconds, so I move Rd_DB disconnection behind USBPD_START(port) to avoid CCs temporarily open state. But this will cause about 1.5us that CCs assert both Rd_5.1k and Rd_DB. BUG=b:169691804 BRANCH=none TEST=on board asurada and reef_it8320, connect to adapter then, 1.power on reset: can go to SNK_READY 2."Reboot" reset: can go to SNK_READY Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Change-Id: I15656cf41c5c123efbb7b7c6ee56a5e74b8a21cb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2425792 Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* TCPMv2: Fix dereferencing a NULL pointerWai-Hong Tam2020-10-011-2/+4
| | | | | | | | | | | | | | | | | | | Some monitors or dongles may not follow the spec that sends a 'DP Status' VDM to the Chromebook. The 'DP Status' VDM is supposed to send from a DP source, not a DP sink. When the Chromebook receives this message, the dereference of a NULL pointer is triggered and EC crashes. Should ignore this assignment and leave it NULL so the Chromebook later NACK's the VDM message. BRANCH=None BUG=b:169611334 TEST=Build the image. Change-Id: I7bf80229be0c6ca20aa1eac63db762b3e4a9d683 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2437189 Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* doc: add zephyr shim designJett Rink2020-10-011-0/+168
| | | | | | | | | | | | | | | | We are turning platform/ec code into a zephyr module that we can then shim into a zephyr build. We are going to do this while we are transitioning to the zephyr codebase. BRANCH=none BUG=none TEST=none Signed-off-by: Jett Rink <jettrink@chromium.org> Change-Id: I68fb215296e872c68fef1cb5cd92902f3f8ee8e2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2438807 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* minute-ia/panic: Use newly provided functions to access panic dataPatryk Duda2020-10-011-29/+34
| | | | | | | | | | | | | | | This change removes usage of PANIC_DATA_PTR where possible. Now panic data is accessed through functions that performs more checks and in case of writing also moves other data when necessary. BUG=b:165773837, b:162254118 BRANCH=none TEST=make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I7f32eec1f03cccf8ddd3af29ac2821459a99629b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2381714 Reviewed-by: Jett Rink <jettrink@chromium.org>
* riscv-rv32i/panic: Use newly provided functions to access panic dataPatryk Duda2020-10-011-19/+25
| | | | | | | | | | | | | | | This change removes usage of PANIC_DATA_PTR where possible. Now panic data is accessed through functions that performs more checks and in case of writing also moves other data when necessary. BUG=b:165773837, b:162254118 BRANCH=none TEST=make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I156225d90ea3c7bc5a09e899afd0935e04d71680 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2381713 Reviewed-by: Jett Rink <jettrink@chromium.org>
* nds32/panic: Use newly provided functions to access panic dataPatryk Duda2020-10-011-19/+25
| | | | | | | | | | | | | | | This change removes usage of PANIC_DATA_PTR where possible. Now panic data is accessed through functions that performs more checks and in case of writing also moves other data when necessary. BUG=b:165773837, b:162254118 BRANCH=none TEST=make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Ic42ab9e334abf95f8437b41e828abe74d065b9d8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2381712 Reviewed-by: Jett Rink <jettrink@chromium.org>
* cortex-m0/panic: Use newly provided functions to access panic dataPatryk Duda2020-10-011-9/+17
| | | | | | | | | | | | | | | This change removes usage of PANIC_DATA_PTR where possible. Now panic data is accessed through functions that performs more checks and in case of writing also moves other data when necessary. BUG=b:165773837, b:162254118 BRANCH=none TEST=make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I2a5b474b03a65ce4a5c77cf5f5b671d1d72095f2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2381711 Reviewed-by: Jett Rink <jettrink@chromium.org>
* cortex-m/panic: Use newly provided functions to access panic dataPatryk Duda2020-10-011-9/+17
| | | | | | | | | | | | | | | This change removes usage of PANIC_DATA_PTR where possible. Now panic data is accessed through functions that performs more checks and in case of writing also moves other data when necessary. BUG=b:165773837, b:162254118 BRANCH=none TEST=make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Id4099d2a205f5e6118e83514dc4b88c980054ea9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2381710 Reviewed-by: Jett Rink <jettrink@chromium.org>
* it83xx/watchdog: Use newly provided functions to access panic dataPatryk Duda2020-10-011-2/+2
| | | | | | | | | | | | | | | This change removes usage of PANIC_DATA_PTR where possible. Now panic data is accessed through functions that performs more checks and in case of writing also moves other data when necessary. BUG=b:165773837, b:162254118 BRANCH=none TEST=make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Ibe23fcbbf829d25e573104c8bc6a407f8acc0282 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2379849 Reviewed-by: Jett Rink <jettrink@chromium.org>
* npcx/system: Use newly provided functions to access panic dataPatryk Duda2020-10-011-3/+5
| | | | | | | | | | | | | | | This change removes usage of PANIC_DATA_PTR where possible. Now panic data is accessed through functions that performs more checks and in case of writing also moves other data when necessary. BUG=b:165773837, b:162254118 BRANCH=none TEST=make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I83dacf1bf680f15a8d5ce3dbb30b03fc3cc54f48 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2379848 Reviewed-by: Jett Rink <jettrink@chromium.org>
* common/panic_output: Use newly introduced functions for panic info dumpPatryk Duda2020-10-011-9/+27
| | | | | | | | | | | | | | | | This patch adds use of function that provides pointer to the beginning of panic data in panic info host command. It also adds use of panic_get_data() in panicinfo command to get pointer that can be safely dereferenced. BUG=b:165773837, b:162254118 BRANCH=none TEST=make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I403300f796fc2add4fae06728d7da4e43616ef2d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2379847 Reviewed-by: Jett Rink <jettrink@chromium.org>
* common/system: Use beginning of panic data for calculationsPatryk Duda2020-10-011-1/+1
| | | | | | | | | | | | | | | | panic_get_data() function in some cases doesn't return the beginning of panic data. We should use get_panic_data_start() BUG=b:165773837, b:162254118 BRANCH=none TEST=Compile firmware. Flash EC RW on eve. while running RW firmware issue 'crash watchdog' command. Check if RW properly reports that reset cause was sysjump. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I2c0a7e4555b8c2e43487222d2d6c4500448ac80d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2379846 Reviewed-by: Jett Rink <jettrink@chromium.org>
* host/system: Implement functions for getting pointer to panic dataPatryk Duda2020-10-011-0/+6
| | | | | | | | | | | | | | | | This patch adds get_panic_data_start() function into chip/host/system.c This function can be used in unit tests as a mock for its real counterpart BUG=b:165773837, b:162254118 BRANCH=none TEST=make runhosttests && make runfuzztests Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Ib7435b3dc024c7568256898b8752f0361393286f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2401119 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Dooly: Relocate interrupts to new GPIO pinsAndrew McRae2020-10-011-4/+4
| | | | | | | | | | | | | | | | TCPC and PPC interrupts were routed to GPO (output only) pins. Relocate them to alternative GPIO pins. BUG=b:169638870 TEST=buildall BRANCH=none Signed-off-by: Andrew McRae <amcrae@google.com> Change-Id: I8d1453c71a262e1ef52a1e425e9b8ef35d08654e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2440017 Tested-by: Andrew McRae <amcrae@chromium.org> Reviewed-by: Nikolai Artemiev <nartemiev@google.com> Commit-Queue: Andrew McRae <amcrae@chromium.org>
* waddledee/drawcia: Update default resistanceAseda Aboagye2020-10-012-2/+2
| | | | | | | | | | | | | | | | | | | | The default combined Rbatt resistance is actually higher than what was currently specified. The wrong Rds(on) value was used as well as the sense resistor was missed. This commit updates the default resistances for these boards. BUG=none BRANCH=none TEST=Build and flash drawlat, verify default resistance is updated. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I6b669dfcd1ec11cb2f456b19e83ac4c2783c0b8a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2441803 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* eldrid: encode the keyboard backlight and numeric pad to fw_configScott Chao2020-10-011-0/+5
| | | | | | | | | | | | | | | | Follow volteer(https://crrev.com/c/2397933). Encode the keyboard backlight and numeric pad feature to the fw_config. BUG=b:168426960 BRANCH=none TEST=make -j BOARD=eldrid TEST=make buildall Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Change-Id: Ie2282c2eb61b4c65e36cdf65654e74de1cde7b37 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428344 Reviewed-by: Keith Short <keithshort@chromium.org>
* isl9241: set BC12 charge minimum voltageKeith Short2020-10-011-0/+3
| | | | | | | | | | | BUG=b:169350714 BRANCH=none TEST=make buildall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I87cd85b92b53fca6206d437012787c049fb075bc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2441388 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* build: add firmware_builder.py entry pointJett Rink2020-10-012-2/+88
| | | | | | | | | | | | | | | | | | | | | New ToT firmware builder will call firmware_builder.py to start the build process for FW. For EC, we need to call into out existing build system. To break up the build and test phases, we need to break out all of the build only steps out into a separate build target (buildall_only). BRANCH=none BUG=b:169178847 TEST=run `firmware_builder.py build` locally and see that it builds all EC images and also redirects stdout and stderror from sub command. TEST=chromite/api/contrib/call_scripts/firmware__build_all_tot_firmware run this script correctly. End-to-End tests. Signed-off-by: Jett Rink <jettrink@chromium.org> Change-Id: Idd039e686697ee88419e0e44aa3dc96d554b997d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2424895 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* magolor: add thermal tableBen Chen2020-09-302-0/+27
| | | | | | | | | | | | | Add setup_thermal for setting thermal table BUG=b:168353037 BRANCH=master TEST=thermal team verify value on AP Change-Id: I32e009aa8c81a8fbf5a925f009df54c467288e9d Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428352 Reviewed-by: Diana Z <dzigterman@chromium.org>
* mt6360: fix LDO6/LDO7 regulator vosel tableEric Yilun Lin2020-09-301-0/+2
| | | | | | | | | | | | | | | | The table missed 2 entries and such that it can't report regulator infos on reading. BUG=b:147789962 TEST=ectool regulatorget 3 (LDO7), and returns valid value BRANCH=none Change-Id: I7475a27d7d573fb9fa6712c77688c63a326e3a96 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2434602 Tested-by: Xi Chen <xixi.chen@mediatek.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* zork: Workaround VBUS=0 for charge_ramp_swEdward Hill2020-09-301-3/+22
| | | | | | | | | | | | | | | | | The ISL9241 sometimes incorrectly reports 0 for unknown reason, causing ramp to stop at 0.5A. Workaround this by ignoring 0. This partly defeats the point of ramping, but will still catch VBUS below 4.5V and above 0V. BUG=b:168569046 BRANCH=zork TEST=EC reboot with no battery and 65W charger, ramp to 3.25A @ 20V Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I2c08cc548b1fd67507865e7339e8168b0e53e628 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2438934 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* woomax: Use HPD to disable pi3hdx1204 in S0Michael5 Chen2020-09-303-2/+25
| | | | | | | | | | | BUG=b:169300359 BRANCH=zork TEST=check power consumption Signed-off-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: Ie1736313d004783ac2dc6bfd41591afa05c4edbc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2437573 Reviewed-by: Edward Hill <ecgh@chromium.org>
* elemi: Initial EC imageDevin Lu2020-09-308-0/+1454
| | | | | | | | | | | | | | | | | Create the initial EC image for the elemi variant by copying the volteer reference board EC files into a new directory named for the variant. (Auto-Generated by create_initial_ec_image.sh version 1.2.0). BUG=b:169409487 BRANCH=none TEST=make BOARD=elemi Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I44ad440cbc63d05b3e14288a50fa499134fadfc8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2431317 Reviewed-by: Keith Short <keithshort@chromium.org>
* Madoo: change EC from npcx796fc to npcx797fcelmo_lan2020-09-301-1/+1
| | | | | | | | | | | | | | Modify CHIP_VARIANT to npcx7m7fc. BUG=b:169105748 BRANCH=none TEST=make BOARD=madoo Signed-off-by: elmo_lan <elmo_lan@compal.corp-partner.google.com> Change-Id: Ic470412c0bca2e372c5648738f5bfc6af5cfbc9d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2422061 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Henry Sun <henrysun@google.com>
* driver/it83xx: change Rd_DB to Rd_5.1k in EC hibernateRuibin Chang2020-09-304-15/+25
| | | | | | | | | | | | | | | | | | We change Rd_DB to Rd_5.1k in EC hibernate. HW auto asserts Rd_DB on CCs when EC is power off. BUG=none BRANCH=none TEST=on board reef_it8320 and it8320_evb, in EC hibernate mode: 1.can wakeup by AC plug in, then pd state to SNK_READY. 2.Rd_5.1k power consumption is more 1uA than Rd_DB. Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Change-Id: I2d78838c9076dbe36a5d27204207c9da7cad9948 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2423668 Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw>
* it83xx/flash: the configuration only used by N8 coretim2020-09-302-3/+7
| | | | | | | | | | | | | | | | | We need to set the 56k~60k region to DLM on N8 core only. After copying data into it, we will disable the region and be the ram code section. BUG=none BRANCH=none TEST=use console commands of #flasherase and #flashwrite to erase and write are normal on the board of reef_it8320(N8) it8xxx2_evb(risc-v). Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Change-Id: I9e42329d2e9d614640b668a0b75606f45268b83e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428348 Reviewed-by: Jett Rink <jettrink@chromium.org>
* charge_state_v2: Move the first battery_get_params to HOOK_INITWai-Hong Tam2020-09-301-1/+5
| | | | | | | | | | | | | | | | | | Other tasks read the params like state_of_charge at the beginning of their tasks. In the existing code, the first battery_get_params is called at the beginning of the charger task. It is not guaranteed the battery params are ready. This change moves it to the HOOK_INIT. BRANCH=None BUG=b:169453974 TEST=Cut off the battery, checked the first boot has PD-enabled, which uses the battery state_of_charge param to make the decision. Change-Id: Ie7bd31ee71fb3d1ea47a31910f0dfa7ac93cbcef Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2436760 Tested-by: Nitin Kolluru <nkolluru@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* boldar: Initial EC imageRonak Kanabar2020-09-308-0/+1461
| | | | | | | | | | | | | | | | | | | | Create the initial EC image for the boldar variant by copying the volteer reference board EC files into a new directory named for the variant. (Auto-Generated by create_initial_ec_image.sh version 1.2.0). BUG=b:162202257 BRANCH=none TEST=make BOARD=boldar Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Change-Id: Ief1d95043f69e7c2678703013908825ec27df490 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2425989 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* tcpm: Add tpcm driver for stm32gx chipsScott Collyer2020-09-294-0/+166
| | | | | | | | | | | | | | | | | | This CL adds tcpm driver for the STM32Gx family of chips which have a ucpd peripheral for its on-chip type-c/usb-pd block. Ah this phase of development, only the methods required for type-c operation are implemented. BUG=b:167601672 BRANCH=None TEST=verfied type-c attaches properly on quiche Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: Ia23eb4e346682ab3a9f8c7da2b5519c330b67936 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2206155 Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* stm32g4: Initial UCPD driver for type-c functionalityScott Collyer2020-09-294-0/+582
| | | | | | | | | | | | | | | | | | | | | The STM32G4 contains a UCPD block that includes similar functions as a TCPC. This CL contains an initial version of the driver required to use this function. This CL adds register block definitions and the implementation of tcpci driver functions required to support type-c operation. This CL does not include support for USB-PD functionality. BUG=b:167601672 BRANCH=None TEST=verfied type-c attaches properly on quiche Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I3e7912f33efa716501896b1f96b4c6d67db0f573 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213840 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* honeybuns: Increase flash size to work with RO onlyScott Collyer2020-09-291-1/+6
| | | | | | | | | | | | | | | | | | | | | We don't have enough flash space on to do a full RO + RW image. This CL simply adjusts the flash size define from 128k to 256k and only the RO image is only being used for development and HW verification. Note also that at this stage there is no support for RO -> RW jump other than using EC console command, so RO is the only image being executed. BUG=b:167462264 BRANCH=None TEST=make -j BOARD=quiche is successful. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: Iec062f9f3be966c0653cbdafe72f5a160351cf07 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213839 Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* cleanup: button: Reword commentsAseda Aboagye2020-09-292-6/+8
| | | | | | | | | | | | | | | | This commit is just a clean up CL to clean up some of the comments introduced with the new ADC detected buttons feature. BUG=b:167319238 BRANCH=None TEST=None Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: Ie08a8ca26ceaec26dae2d55f3493f28f1e4a414c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2438676 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org>
* button: presss volume button detected by adcBen Chen2020-09-293-1/+27
| | | | | | | | | | | | | | | supports volume up/dwon pressed by adc buttons config BUG=b:167319238 BRANCH=master TEST=make buildall pass Change-Id: Ide3522b4af3c92df906bafb1f944f138a822280a Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2431310 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org>
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