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* asurada: enable PPC syv682x on C0/C1stabilize-quickfix-13099.93.B-masterstabilize-13099.94.B-masterstabilize-13099.90.B-masterstabilize-13099.85.B-masterstabilize-13099.73.B-masterstabilize-13099.70.B-masterstabilize-13099.118.B-masterstabilize-13099.110.B-masterstabilize-13099.101.B-masterrelease-R84-13099.B-masterEric Yilun Lin2020-05-154-14/+188
| | | | | | | | | | | | | | | | Enable PPC on C0 and C1, where C1 port is optional and dependent to the daughter board connected. BUG=b:152562604 TEST=ensure C0/C1 can sink and source power. BRANCH=master Signed-off-by: Ting Shen <phoenixshen@google.com> Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Change-Id: I2fabe59562ffbe63e91b60f36b726d63fefdc83b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2195721 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* Ezkinil: update LED behaviorSue2020-05-151-17/+17
| | | | | | | | | | | | | | | | | | | Power LED behavior Charge Amber on (S0/S3/S5) Full charge Blue on (S0/S3/S5) Discharge in S3 Amber on 1sec off 3sec Discharge in S5 Off Error Amber on 1sec off 1sec Discharge in S0 Blue on BUG=b:156553303 BRANCH=none TEST=check the led behavior meeting the spec. Change-Id: I524734fa30cbe0df785654a80118a534fbeeaf5d Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2200836 Reviewed-by: Edward Hill <ecgh@chromium.org>
* usb_pd: Rename CONFIG_CMD_PD_CONTROL to CONFIG_HOSTCMD_PD_CONTROLVijay Hiremath2020-05-1526-27/+31
| | | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall -j Change-Id: I33a63d6ac45bbd46da74db34a21d1bb130476362 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2196946 Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* usb_pd: Cleanup is_modal operation functionAyushee2020-05-151-2/+1
| | | | | | | | | | | | | | | | | | Removing CONFIG_USB_PD_TBT_COMPAT_MODE check as the enable_tbt_compat_mode() checks if CONFIG_USB_PD_TBT_COMPAT_MODE is enabled. BUG=b:148528713 BRANCH=none TEST=Tested with Thunderolt dock, able to enter Thunderbolt-Compatible mode. Change-Id: Id2b1f6a5ac53221f976becc753b17156b07c359d Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2128267 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
* TCPMv2: Add PRL state entry prints for debuggingDiana Z2020-05-151-47/+165
| | | | | | | | | | | | | | | This commit adds printing of the PRL states on entry when debug level 2 has been selected. BRANCH=None BUG=b:155229288 TEST=on kindred with TCPMv2, no PRL states print by default but when debug level is set to 2 states are seen Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I7049205c44ebf9e98b910d773603adde844e6849 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2181714 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* common/util: Add is_alignedTom Hughes2020-05-153-0/+35
| | | | | | | | | | | | | | | Helper function to check power-of-two alignment. BRANCH=none BUG=b:155229277, b:156501835 TEST=make buildall -j TEST=make run-utils Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: Iadcdaeb59e496f10035bd6c7f9660a3cc33a4898 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2202849 Commit-Queue: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* TCPMv2: Handle Not Supported response to VDMsAbe Levkoy2020-05-151-0/+14
| | | | | | | | | | | | | | | | | | A partner may respond to a Discover SVIDs or Discover Modes REQ with Not Supported instead of NAK, and the meaning is the same. Handle this case in PE_INIT_VDM_{SVIDs,Modes}_Request. BUG=b:156535637 TEST=Attach port partner that ACKs Discover Identity but responds to Discover SVIDs with Not Supported; observe graceful exit of discovery. BRANCH=none Change-Id: I0fe912f831de3280189bfc4e829dc9c0698548e2 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2202517 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* syv682x: fix chip init sequenceCaveh Jalali2020-05-152-43/+28
| | | | | | | | | | | | | | | | | This fixes a failure mode in the syv682 chip init sequence. Resetting the chip registers using the RST_REG sets the over-voltage threshold to 6V and at the same time enables the high voltage path. It is not unusual for the high voltage channel to carry a high voltage like 15V, so we get an OVP interrupt before finishing our chip init sequence. BRANCH=none BUG=b:156585531 TEST=no more VBUS OVP interrupts Change-Id: Iab19012d390e0c5dd8f2cb726ac45cd14732c6f8 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2201396 Reviewed-by: Keith Short <keithshort@chromium.org>
* system: Add option to console command to reboot to ROTom Hughes2020-05-141-1/+4
| | | | | | | | | | | | | | | | | This is the same as "ap-off-in-ro", except it does not have the "AP_OFF" flag. BRANCH=none BUG=b:156401765 TEST=make buildall -j TEST=On bloonchipper console: > reboot ro Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I2f74b8c0558f60a5d5da0fe44ba30158bd946a15 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2197623 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Craig Hesling <hesling@chromium.org>
* rwsig: Do not jump to RW if "STAY_IN_RO" flag is setTom Hughes2020-05-141-0/+6
| | | | | | | | | | | | | | | | | | BRANCH=none BUG=b:156401765 TEST=make buildall -j TEST=On bloonchipper console: > reboot ro => stays in RO TEST=On bloonchipper console: > reboot => jumps to RW after RO Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I44faa6ed85a671db3d7217562adfd49650229147 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2197622 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Craig Hesling <hesling@chromium.org>
* chip/stm32: Save STAY_IN_RO flag if set during resetTom Hughes2020-05-141-0/+4
| | | | | | | | | | | | | | | This matches the behavior of system_encode_save_flags() and allows us to reboot into RO for testing. BRANCH=none BUG=b:156401765 TEST=make buildall -j Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: Ibbb95ca81fb87eaa48639dea99be1bd0e35ea230 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2197621 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Craig Hesling <hesling@chromium.org>
* test: Add rollback entropy on-device unit testTom Hughes2020-05-147-0/+207
| | | | | | | | | | | | | | | | | | This unit test validates the behavior of adding entropy to rollback. BRANCH=none BUG=b:151105339 TEST=make BOARD=bloonchipper test-rollback_entropy -j && ./util/flash_jlink.py --board bloonchipper --image ./build/bloonchipper/rollback_entropy/rollback_entropy.bin Dragonclaw console: > reboot ro > runtest Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I0532104d483e3a8c16c2c3b9fd7fef8554eaadad Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2197620
* rollback: create private header file for use by unit testsTom Hughes2020-05-142-15/+35
| | | | | | | | | | | | | | | Expose definitions that we want to use in unit tests, but are internal details that should not be used by other EC code using the rollback functionality. BRANCH=none BUG=none TEST=b:151105339 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: Ib81251cce63e0a8b929b6e7a8e1fc1ec4a664f5f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2197619 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* rollback: const correctnessTom Hughes2020-05-142-4/+4
| | | | | | | | | | | | | Entropy being added is never modified. BRANCH=none BUG=none TEST=make buildall -j Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I2b54334812c9a86fad059576725e6212e88c2ec9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2197334 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* rollback: include stdint since we use int8_t, etcTom Hughes2020-05-141-0/+2
| | | | | | | | | | | | BRANCH=none BUG=none TEST=make buildall -j Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I8318556e0ba989b9e878b878a180301ff7d46b3b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2197335 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Waddledee: Use cached Vbus presenceDiana Z2020-05-141-5/+1
| | | | | | | | | | | | | | | Convert pd_snk_is_vbus_provided() to return the cached Vbus presence from the charger driver. BRANCH=None BUG=None TEST=on waddledee, confirm charger and powered dongle can connect to both ports Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: If45956072f41f8a20e5880825e687230ef239a1a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191375 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* SM5803: Add cached vbus presenceDiana Z2020-05-142-0/+14
| | | | | | | | | | | | | | Cache the current Vbus presence to provide a quick-access reference to the PD task. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I4b90339b28d182a57dabd39725315d061b8b7336 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191374 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Waddledee: Remove CONFIG_FPUDiana Z2020-05-141-1/+0
| | | | | | | | | | | | | | FPU no longer needed with charger using integer math to convert Vbus into a voltage. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I77fd210ad60c051f2632083215d4f10dc074c4c2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191373 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* SM5803: Use integer math for VbusDiana Z2020-05-141-1/+1
| | | | | | | | | | | | | | | Change Vbus retrieval to use integer math, to avoid the need to FPUs to be configured. BRANCH=None BUG=None TEST=on waddledee, confirm "ectool usbpdpower" shows same voltage for ports as manual calculation on the ADC registers Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I357c9ec419dd3825af3a79d414de793aa62f9259 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191372 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Charger: Handle Vbus retrieval from secondary charger chipDiana Z2020-05-141-0/+4
| | | | | | | | | | | | | | | | | When a board is using multiple charger chips, fetch the Vbus level assuming that the port is the same as the charger number. When waddledee enables OCPC, the config can be easily changed to follow CONFIG_OCPC instead. BRANCH=None BUG=None TEST=on waddledee, "ectool usbpdpower 1" gives correct port 1 voltage Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I9226b8ffd12c515d2a638236f2e618799637296e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191371 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* SM5803: Correct Vbus threshold registersDiana Z2020-05-141-2/+2
| | | | | | | | | | | | | | Vbus threshold register addresses end in A. BRANCH=None BUG=None TEST=on waddledee, verify Vbus interrupt comes in when a charger is plugged in Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I86e3367216aecae76f25d1712b34c8683743052e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191140 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* kakadu: modify charger and gauge parameter to reduce charging timeScott Chao2020-05-142-3/+3
| | | | | | | | | | | | | | | After power team experiment, change those parameter can reduce charging time. BUG=b:156398259 BRANCH=kukui TEST=make -j BOARD=kakadu TEST=make buildall Signed-off-by: Scott Chao <scott.chao@bitland.corp-partner.google.com> Change-Id: I636ac4608e7af4afcc8d1adbadeead75d3e6c3b6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2198815 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* asurada: enable C0/C1 USBPDEric Yilun Lin2020-05-145-8/+135
| | | | | | | | | | | | | | | | | | This CL enable it81202 on-chip TCPC at C0 and C1 port. The functionality is not completed yet (TODO: PPC). C0: on the main board. C1: on the subboard. BRANCH=master BUG=b:152562604 TEST=ensure C0 and C1 can do PD-comm (SNK and SRC) Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Change-Id: Ia8a2e557fd376a05f422bc1139abfd78be0c2b58 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2192466 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Ayo Wu <ayowu@google.com>
* ioex: Initialize IO expander for early sysjumpDaisuke Nojiri2020-05-141-2/+2
| | | | | | | | | | | | | | | | | | When EFS triggers sysjump, IO expander is currently not initialized. This patch will make IO expander initialized in RW if sysjump is triggered by EFS. IO expander initalization should be skipped only for late sysjump. BUG=b:156101251, chromium:1072743 BRANCH=none TEST=Verified the bug is fixed. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I25b173aa4cae9c3de5ae6bac0d5c40216ef466b6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2200244 Reviewed-by: Edward Hill <ecgh@chromium.org>
* system: Add EC_RESET_FLAG_EFSDaisuke Nojiri2020-05-145-0/+23
| | | | | | | | | | | | | | | | | This patch adds EC_RESET_FLAG_EFS. It indicates EC jumped to RW by successfully running EFS. system_jumped_late can be used to avoid running some code twice (once in RO and again in RW). Such code is currently (wrongly) guarded by system_jumped_to_this_image. BUG=b:156101251, chromium:1072743 BRANCH=none TEST=Verified the bug is fixed. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I58fc18510b2f95dfd116cbacba09875cb7cf5051 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2200245
* puff: Determine BJ power based on fw config.Sam McNally2020-05-142-13/+34
| | | | | | | | | | | BUG=b:154657629 TEST=make buildall -j; chgsup reports current according to fw config BRANCH=none Change-Id: Ieea86484ee49e056c368a6e764a217958bae3835 Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2198816 Reviewed-by: Andrew McRae <amcrae@chromium.org>
* volteer: Enable EFS2Daisuke Nojiri2020-05-141-0/+2
| | | | | | | | | | | | | | This patch enables EFS2 for volteer. BUG=b:152998236 BRANCH=none TEST=Verify system boots and software sync works. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I7af9f0c5abbda4fea613d39c1981f5995acf76b4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2196955 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* VCONN: Request Vconn swap if power state transitions above G3madhusudanarao amara2020-05-141-0/+6
| | | | | | | | | | | | | | | | | | | | To communicate with cable plug VCONN is required and the VCONN is typically provided by 5V rail. When the DUT is below S5, 5V rail is down & VCONN sourcing is disabled. Hence need to re-enable the VCONN sourcing when the power state transition happens from G3 to higher state. BUG=b:156174498 BRANCH=none TEST=Connect TBT device in G3 behind DP port connected to external monitor. Observed TBT alt mode after wakeup Signed-off-by: madhusudanarao amara <madhusudanarao.amara@intel.corp-partner.google.com> Change-Id: I011b33f2f7cd56669f84781c5d1ad014e00387ef Signed-off-by: madhusudanarao amara <madhusudanarao.amara@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2194157 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* endeavour: add pse initJeff Chase2020-05-144-2/+184
| | | | | | | | | | | | | | | | Endeavour has an onboard PoE PSE controller. This change initializes the controller and sets per port maximum power. BRANCH=none BUG=b:155863756 TEST=build + boot, various pse commands Change-Id: I1505917f6fac8a569f40102162b0d036e8079a36 Signed-off-by: Jeff Chase <jnchase@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2189562 Reviewed-by: Joe Tessler <jrt@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* risc-v: add comments about not needing 16-byte stack frame alignmentDino Li2020-05-133-7/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we are not actually executing on a stack frame that is not 16-byte aligned, we are following the guidance (linked below). Add comments for future developers to explain why. Also, saving system stack pointer in the switch to function since the isr function takes special care to not over write the stack pointer when we are already using the system stack. According to documentation, the stack frame should be 128-bit aligned upon entering function boundaries. "In the standard RISC-V calling convention, the stack pointer sp is always 16-byte aligned" from https://riscv.org/specifications/isa-spec-pdf/ "The stack grows downwards (towards lower addresses) and the stack pointer shall be aligned to a 128-bit boundary upon procedure entry" from https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md See also documentation issues discussing this https://github.com/riscv/riscv-elf-psabi-doc/issues/21 BRANCH=none BUG=none TEST=ITE RISC-V FPU implementation still works Signed-off-by: Jett Rink <jettrink@chromium.org> Change-Id: I3460e6ee2b68c7793c72517e7d2d9bc645aaea65 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2173119 Tested-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* test: Add rollback unit testTom Hughes2020-05-137-0/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This test only runs on device and requires manual verification that a memory access violation occurred. Note that bloonchipper region 1 on dragonclaw fails as indicated in tests below. BRANCH=none BUG=b:155229277, b:151105339 TEST=Compile and flash bloonchipper on dragonclaw with region 0 "runtest" on console => Reboots with "Data access violation, mfar = 8020000" => PASS TEST=Compile and flash bloonchipper on dragonclaw with region 1 "runtest" on console => Memory is successfully read => FAIL TEST=Compile and flash dartmonkey on dragontalon with region 0 "runtest" on console => Reboots with "Data access violation, mfar = 80c0000" => PASS TEST=Compile and flash dartmonkey on dragontalon with region 1 "runtest" on console => Reboots with "Data access violation, mfar = 80e0000" => PASS Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I3e9cc568a0b16c6091d96c4373798fe4de4ab65b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2190829 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Commit-Queue: Nicolas Boichat <drinkcat@chromium.org>
* tcpmv2: hard reset AutoDischarge enable only when neededDenis Brockus2020-05-121-3/+6
| | | | | | | | | | | | | | | | | | | | | The allow unattach path is common code in PE and it gets called even if we are not doing Hard Reset. This can change AutoDischarge to be incorrect during a PR Swap. So guard this code to only being performed if we are actually in a Hard Reset. BUG=none BRANCH=none TEST=check Hard Reset and PR Swap Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Ie7e9084d41432d6c449aaaa189b3a55d0dd7f780 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2196642 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* tcpmv2: Add AutoDischarge for CT connectionsDenis Brockus2020-05-121-0/+3
| | | | | | | | | | | | | | | | | Added AutoDischarge to CT.SNK connections. BUG=none BRANCH=none TEST=Verify USBC is still working Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Ida3ce6b13d8e922034087b5d07db04191efc7127 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2194264 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org> Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* Zork: Use FW_CONFIG for IOEX_HDMI_CONN_HPD_3V3_DB.Edward Hill2020-05-129-3/+48
| | | | | | | | | | | | | | | | Use FW_CONFIG to only enable IOEX_HDMI_CONN_HPD_3V3_DB interrupt when appropriate. BUG=b:156046102 BRANCH=none TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: Ib12943e6ebbbd9af9c46ac548921aea5eb96f504 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2195187 Reviewed-by: David Huang <david.huang@quanta.corp-partner.google.com> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* Zork: Use FW_CONFIG for IOEX_MST_HPD_OUT.Edward Hill2020-05-128-33/+129
| | | | | | | | | | | | | | | | | Move mst_hpd_interrupt() out of variant_trembyle.c into individual boards. Use FW_CONFIG to only enable IOEX_MST_HPD_OUT interrupt when appropriate. BUG=b:156046102 BRANCH=none TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I3f188088254208f01aea2094b7f2b57590b0d91b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2195186 Reviewed-by: David Huang <david.huang@quanta.corp-partner.google.com> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* asurada: keep vbat voltage when not chargingTing Shen2020-05-121-1/+2
| | | | | | | | | | | | | | | | | | On asurada, Vbat is also used to supply power to the system. This CL keeps Vbat outputs 6V even if battery not present. Otherwise, Vbat will drop to VOLTAGE_MIN(~=2V) and causes system down. BUG=b:154303178 TEST=able to boot without battery BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I5daa7b6c377ab696b2cf2c84a07b7535d2c44dca Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2179143 Reviewed-by: Eric Yilun Lin <yllin@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* asurada: enable battery cut-offTing Shen2020-05-122-2/+3
| | | | | | | | | | | | | | | add CONFIG_BATTERY_CUT_OFF and set correct cut-off command BUG=b:150341271 TEST=`cutoff` command in ec-console works BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I757990df5b0c71e4d522c9bbf53ca900590b4fe9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2164467 Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* asurada: set uart_rx gpio to hi-zTing Shen2020-05-121-2/+2
| | | | | | | | | | | | | | | remove pull-down to save power BUG=b:154279402 TEST=flash ec over ccd BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I876e4b967bd15b4129dc6777c440ecb82dcb8119 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2164466 Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* ppc/sn5s330: set the deglitch time to 1000 us for PP2James_Chao2020-05-121-4/+8
| | | | | | | | | | | | | | | | | | | | | | | Some type-c device (eg. ASUS MB16ACE) and dongle (eg. Hub-type-c-promate-0001) can't be detect when system resume from S5. After modulating PPC parameter PP1_ILIM_DEGLITCH_0 from 200us to 1ms, those devices can be detect work normally. BUG=b:155109735 BRANCH=octopus TEST=Check the devices can work normally 1.Promate Hub-type-c-promate-0001 2.Apple USB-C Digital AV Multiport Adapter 3.Dell S2718D 4.MONITOR-PHILIPS-258B6QU 5.BENQ EW3270U 6.ASUS MB16ACE,MX27UC 7.LG-34WK95U-W Change-Id: I8a62cb309055b8e64babf1d447eacacc518f9bbd Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2193251 Reviewed-by: Diana Z <dzigterman@chromium.org>
* usb_pd_alt_mode_dfp: Move pd_set_svids_discoveryAbe Levkoy2020-05-121-9/+8
| | | | | | | | | | | | | Place it next to the other SVIDs accessor functions. BUG=none TEST=make buildall BRANCH=none Change-Id: I1ddfd5cc1d4617671e78c6405ddecc3d27be16fc Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2194260 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv2: Discover cable plug modesAbe Levkoy2020-05-121-0/+6
| | | | | | | | | | | | | | | Enter PE_INIT_VDM_Modes_Request with transmit type SOP', following cable-plug (SOP') SVID discovery. BUG=b:152420269,b:152419795 TEST=Attach port partner via cable; TCPM sends SOP' modes request and TEST=then continues with mode entry. BRANCH=none Change-Id: I62be147e7809ee3955c1db7704e965f576176f67 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2174468 Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMv2: Discover cable plug SVIDsAbe Levkoy2020-05-121-0/+10
| | | | | | | | | | | | | | | Enter PE_INIT_VDM_SVIDs_Request with transmit type SOP', following cable cable-plug (SOP') identity discovery. BUG=b:152420269,b:152419795 TEST=Attach port partner via cable; TCPM sends SOP' SVIDs Request, then TEST=continues with enter-mode process. BRANCH=none Change-Id: Icaf08e0849380bd48ae1a6eec32fa22eb4ac470f Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2174467 Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMv2: Implement mode discovery for port partnerAbe Levkoy2020-05-123-10/+266
| | | | | | | | | | | | | | | | Implement PE_INIT_VDM_Modes_{Request,ACKed,NAKed}. Store mode discovery state for each discovered SVID and provide accessors for that state. Consider transmit type when consuming modes. BUG=b:152420269,b:152419795 TEST=Attach port partner; TCPM discovers modes for previously discovered TEST=SVIDs and then continues with discovery/mode-entering process. BRANCH=none Change-Id: I72a605fa500e7eea0a5fa3b65a74d8b567a78751 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2174466 Reviewed-by: Diana Z <dzigterman@chromium.org>
* strago: Disable Vivaldi keyboardAbe Levkoy2020-05-121-0/+1
| | | | | | | | | | | | | | | BUG=none TEST=make buildall BRANCH=none Strago predates Vivaldi and does not need custom top-row keys. This is just keep strago building at ToT; do not pick this onto a release branch. Change-Id: Ic1b769cee89150c5f13049c995754cc77f7e7651 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2189961
* TCPMv2: Use CMD_DISCOVER_IDENT during discoveryAbe Levkoy2020-05-121-4/+4
| | | | | | | | | | | | | | | | enum vdm_cmd is redundant with the CMD_DISCOVER_* macros in usb_pd.h and will no longer be needed after pe_do_port_discovery is replaced. Remove uses of enum vdm_cmd from the new VDM request states. BUG=none TEST=make buildall BRANCH=none Change-Id: I068fa3a1f9208953b18b1bf765a0adfa54ad8df0 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2178092 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMv2: Add new state for SVID discovery flowAbe Levkoy2020-05-121-1/+120
| | | | | | | | | | | | | | | Implement PE_INIT_VDM_SVIDs_Request. Enter this state from PE_{SRC,SNK}_Ready if identity discovery succeeded. Subsequently, continue with discovery via PE_DO_PORT_DISCOVERY. BUG=b:152419850,b:152418267 TEST=Attach port partner; TCPM discovers SVIDs and continues discovery BRANCH=none Change-Id: Ic8a4e08ab0d2bfbeb7541c662f7503c74c22bcf5 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2174465 Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMv2: Define fields for SVID discovery stateAbe Levkoy2020-05-126-83/+172
| | | | | | | | | | | | | | | Index discovery results by SOP type and track SVID discovery state for each type. Define accessors for this state and modify existing accessors to be SOP-type-aware. BUG=b:152419850,b:152418267 TEST=make buildall; attach port partner; observe discovery via Twinkie BRANCH=none Change-Id: I24ee19aac087c5752a3a822ab2b0c9da7a55af1b Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2174464 Reviewed-by: Diana Z <dzigterman@chromium.org>
* hatch: Remove the board keyscan_config definition and use the defaultWai-Hong Tam2020-05-1114-34/+0
| | | | | | | | | | | | | | | | | | | The keyscan_config is the same as the default. Don't define the board custom keyscan_config. For the board.h, most of them have duplicated definitions from the baseboard.h. Remove them by the script: $ grep -rl 'BASEBOARD:=hatch' * | cut -f1 -d/ | xargs -IX sed -i \ '/#define CONFIG_KEYBOARD_BOARD_CONFIG/d' X/board.h BRANCH=hatch BUG=b:156007029 TEST=Build all the hatches boards, no error. Change-Id: Ib02550708d533ced77f5fad05b074291b66dd4fc Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2194160 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* keyboard_scan: Update the default scan delay to compensate H1 signal delayWai-Hong Tam2020-05-111-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The default value of the keyboard scan delay was measured at around 2013. That time H1 hadn't been introduced. The keyscan lines go straightforward to the keyboard matrix. In recent Chrome OS clamshell/convertible devices, the KSO2 line goes through H1. It adds more signal delay for inverting the signal. The default keyboard scan rate seems too fast for the KSO2 line. When an user presses Refresh key (KSO2, KSI2), EC iterates to assert the next KSO3, KSO2 still remains asserted that causes T key (KSO3, KSI2) detected unexpectedly. Most of the boards override this default value. But a board, which just uses the default value, may have this Refresh-triggering-T bug. People debug the same issue over and over again. Should update the default value and save people time. BRANCH=None BUG=b:156007029, b:155696516 TEST=Press Refresh key, only Refresh key detected, no sign of T key. Change-Id: I5a9ee8058adcac123fdd5500d478913926b00497 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2190953 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* util: Remove unnecessary halt in gdbinitTom Hughes2020-05-111-2/+0
| | | | | | | | | | | | | | The reset on the line before is sufficient. BRANCH=none BUG=none TEST=none Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I7eef41a4263764375ff1c8a16bb462edf7b3209c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2190820 Commit-Queue: Craig Hesling <hesling@chromium.org> Reviewed-by: Craig Hesling <hesling@chromium.org>
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