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* volteer: Support keyboardAbe Levkoy2019-10-113-1/+27
| | | | | | | | | | | | | | | Configure keyboard features, enable keyboard-related tasks, and define a custom time period to wait for output to settle during key scan. BUG=b:139554320 TEST=make buildall BRANCH=none Change-Id: I0d28389361c87a868f62325b86b65fc5b2550a70 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1841885 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* volteer: enable CONFIG_BRINGUPKeith Short2019-10-111-0/+6
| | | | | | | | | | | | | | Prevent EC from powering up AP during initial board bringup. BUG=none BRANCH=none TEST=make buildall -j Change-Id: Id0ec787ed34444a9e40174925d8c11a8e71d66d0 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1850276 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* usbc: check positive condition before errorJett Rink2019-10-111-8/+8
| | | | | | | | | | | | | | | | | | Since it is possible for the TCPC to give us both a TX complete and have the RX message waiting for us, it makes sense to check the TX complete success case first, and only transition to the error scenario if we get an unexpected RX and we haven't completed the TX BRANCH=none BUG=none TEST=build and passes all tests Change-Id: Ifc5bc52250d25963f2ce6e4ce78f73d9881385e4 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1837996 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* power: Fix CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS checksKeith Short2019-10-111-20/+20
| | | | | | | | | | | | | | | | | | | | | | | | Regardless of the state of CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS, if CONFIG_HOSTCMD_ESPI is enabled, then the AP can still generate virtual wire interrupts. Replace checks of CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS for power signals with CONFIG_HOSTCMD_ESPI. This fixes a processor exception that was caused by siglog_add() when the AP generated a virtual wire interrupt. The VW signals start at GPIO_COUNT so were causing buffer overflows of gpio_list[]. BUG=b:142406787 BRANCH=none TEST=buildall -j TEST=Enable CONFIG_BRINGUP on kohaku. Without change RO causes processor exception, with change RO and RW boots and AP boots. Change-Id: I81ab6f2fed217f5aad3ca7fae64c850e3af49f43 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1850275 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* tcpci: protect against buffer overflowCaveh Jalali2019-10-111-6/+12
| | | | | | | | | | | | | | | | | we need to sanity check data read from TCPCs to avoid buffer overflows. the TCPC can return bogus size information which can cause a buffer overflow when processing TCPM messages. if the claimed message size is bogus, return an error. BUG=b:142296767 BRANCH=none TEST=EC no longer gets an exception Change-Id: I7754c6e3d20847827b849423c5880756bae46393 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1845587 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Caveh Jalali <caveh@google.com>
* util: add build include for private host toolsHarry Cutts2019-10-112-2/+8
| | | | | | | | | | | | | | | | | | | | | | We have provision for private host commands (see the `EC_PRIVATE_HOST_COMMAND_VALUE` macro), but no way to make a private host-side tool that can share the host command protocol implementation in util/. This CL allows a private directory to be symlinked as util/private and have its build.mk file included in the build. For an (internal-only) example of what you might put in private, see https://crrev.com/i/1914158. BRANCH=none BUG=chromium:1008568 TEST=Patch https://crrev.com/i/1914158 in the private repo (or add a util directory there with a build.mk), then from the ec directory, run `ln -s ../private/util util/private`. Run a build and verify that the private build.mk gets run. Change-Id: Ie1ad00cb454ba9ed57e4e9b24d4f5d397ca0d7a5 Signed-off-by: Harry Cutts <hcutts@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1836757 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* usbc: update CRCReceiveTimerJett Rink2019-10-102-18/+16
| | | | | | | | | | | | | | | | | Shorten the CRCReceiveTimer and document that either the pe send or error function will get called in response to a prl_ send message. BRANCH=none BUG=none TEST=build; Change-Id: Icc43886cadfdcd67c943b25aebfdfb55b2693ade Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1825514 Tested-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* helios: Add TEMP_SENSOR4Paul Fagerburg2019-10-103-1/+10
| | | | | | | | | | | | | | | | | | Helios adds TEMP_SENSOR4 to the EC ADC2 pin. Add this to the list of temperature sensors that the EC can report on. BRANCH=None BUG=b:142266102 TEST=`make buildall -j` Verify that Helios builds correctly. Change-Id: I05ccaf5ac339d8a7e1ccd1e3079fc7bddfb841be Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1848968 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Commit-Queue: Sean Abraham <seanabraham@chromium.org> Commit-Queue: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
* akemi: Add battery informationPaul Ma2019-10-102-31/+55
| | | | | | | | | | | | | | | | | | Akemi support three batteries: - LGC: L18L4PE0 - SUNWODA: L19D4PG2 - SMP: L19M4PG2 This CL add the support of them. BUG=b:141621369, b:141660298 BRANCH=none TEST=boot akemi board with battery, charging/discharging/cutoff work as expected. Change-Id: I8735f6a0bcd90abc4923d98b2d337ca41b9f12c7 Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1831717 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* usbc: fix flaky testsJett Rink2019-10-103-90/+145
| | | | | | | | | | | | | | | | | | | | | | Change waits in USBC tests to 1 MSEC. When we wait and don't care, wait for much longer. We also need to ensure that the lower priority task actually ran when we are trying to cycle the state machine. If the entire process is starved then we have to do some manual checking. Added more prints statements to help debug failing tests. BRANCH=none BUG=none TEST=repeat all tests 100 times without failure Change-Id: I12e0f0fa5247a24c87a4ff457e2be684991f0cad Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1837995 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* fpsensor: Add support for migration to positive match secret.Yicheng Li2019-10-101-4/+34
| | | | | | | | | | | | | | | | | | | | On receiving an template, if the template has format version 3 and has empty positive match salt, then generate positive match salt for this template so that it has positive match secret on the next match. BRANCH=nocturne BUG=chromium:927095 TEST=make -j buildall TEST=tested enrollment, matching, deletion, multifinger on DUT nocturne TEST=tested migration on DUT nocturne, specifically, enrolled template with old FPMCU firmware, then updated firmware, verified that templates are migrated and continue to work. Change-Id: If8020acfb60a03269af9ddb41023796920116fca Signed-off-by: Yicheng Li <yichengli@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1769395 Reviewed-by: Nicolas Norvez <norvez@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* trembyle: define the IOEX_USB_A0_RETIMER_EN pinDenis Brockus2019-10-101-0/+1
| | | | | | | | | | | | BUG=b:138600691 BRANCH=none TEST=make buildall -j Change-Id: I4083e501e76a626370ebb36fa05418af532f3bc7 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1850192 Commit-Queue: Edward Hill <ecgh@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* flash_fp_mcu: Add pwr enable for hatch followersCraig Hesling2019-10-101-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | This change ensures that the power is enabled for the FPMCU. This change is valid for all hatch followers. BRANCH=hatch BUG=b:142001487 TEST=cros_workon --board=hatch start chromeos-base/ec-utils-test emerge-hatch chromeos-base/ec-utils-test cros deploy --root=/usr/local dut1 chromeos-base/ec-utils-test # Manually power off the fpmcu cd /sys/class/gpio echo 467 >export echo out >gpio467/direction echo 0 >gpio467/value echo 467 >unexport # ectool --name=cros_fp version # should fail # flash_fp_mcu prior to this CL should fail here, also # determine the proper firmware for fp board and replace below flash_fp_mcu /opt/google/biod/fw/*.bin # Ensure that flash_fp_mcu succeeds Change-Id: Ia96690d49bb4e5bb25aeebddcc08687b13a43b0b Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1845781
* fpsensor: Enable positive match secret and positive match salt on enrollment.Yicheng Li2019-10-096-23/+88
| | | | | | | | | | | | | | | | | | | | | | On enrollment success, generate new positive_match_salt and send it as part of the encrypted blob. Also enable positive match secret to be read. The positive_match_salt is used to derive positive_match_secret and is different from the encryption salt for encrypting the templates. The positive_match_salt needs to be sent to biod and stored with templates because it needs to be re-uploaded to FPMCU the next time the user logs in. The positive match secret needs to be sent to biod so that it knows what to compare against at a match. BRANCH=nocturne BUG=chromium:927095 TEST=make -j buildall TEST=tested enrollment, matching and multifinger on DUT nocturne Change-Id: I3e44a972ee17c5a93bddd52340f8f2249836463a Signed-off-by: Yicheng Li <yichengli@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1828058 Reviewed-by: Nicolas Norvez <norvez@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* hatch: Add baseboard function for retrieving Board IDTim Wawrzynczak2019-10-092-0/+17
| | | | | | | | | | | | BUG=none BRANCH=none TEST=Verify print output matches CBI dump Change-Id: I7a61179d1ad8a4d3f7e4eea3d2e94b066176bc20 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1838883 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* usb_pd: drop duplicate func get_max_request_mv()Yilun Lin2019-10-093-12/+1
| | | | | | | | | | | | | | The function is added by chromium:1737899 and is duplicate of pd_get_max_voltage(). TEST=make buildall -j BUG=None BRANCH=firmware-kukui-12573.B Change-Id: Ida1f56d108573a1776dcec8460dd48439427d10d Signed-off-by: Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1847513 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* max32660: put slave-only code in `#ifdef`sHarry Cutts2019-10-091-403/+395
| | | | | | | | | | | | | | | | | | | | | This fixes a bunch of "<method> defined but not used" build warnings when working with a board that only uses the I2C master and not the slave. Also fixed various checkpatch.pl errors and warnings that appeared in the lines that were moved. BRANCH=none BUG=chromium:1008568 TEST=Build a MAX32660 board that only uses the I2C master and check that it succeeds with no warnings. Modify it to use the slave as well and check that host commands still work. Change-Id: Icee04ad6d7b641f934e56b670be8770710a41e64 Signed-off-by: Harry Cutts <hcutts@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1832892 Reviewed-by: Jes Klinke <jbk@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* common: Add more macros for making unsigned intsHarry Cutts2019-10-091-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A `UINT32_FROM_BYTE_ARRAY_BE` macro would be good to have for https://crrev.com/i/1898937, and since it seems there are use cases for for a little-endian variant of that and a big-endian variant for uint16_t, add those as well. BRANCH=none BUG=none TEST=Add the following host command somewhere and manually verify the results: static int command_macro_test(int argc, char **argv) { uint8_t bytes[] = { 0x01, 0x23, 0x45, 0x67 }; CPRINTF("Bytes (all hex): %02X, %02X, %02X, %02X\n", bytes[0], bytes[1], bytes[2], bytes[3]); CPRINTF("16 bits (using first two bytes of array):\n"); CPRINTF("UINT16_FROM_BYTE_ARRAY_LE(bytes, 0): %04X\n", UINT16_FROM_BYTE_ARRAY_LE(bytes, 0)); CPRINTF("UINT16_FROM_BYTE_ARRAY_BE(bytes, 0): %04X\n", UINT16_FROM_BYTE_ARRAY_BE(bytes, 0)); CPRINTF("32 bits:\n"); CPRINTF("UINT32_FROM_BYTE_ARRAY_LE(bytes, 0): %08X\n", UINT32_FROM_BYTE_ARRAY_LE(bytes, 0)); CPRINTF("UINT32_FROM_BYTE_ARRAY_BE(bytes, 0): %08X\n", UINT32_FROM_BYTE_ARRAY_BE(bytes, 0)); return EC_SUCCESS; } DECLARE_CONSOLE_COMMAND(macro_test, command_macro_test, "", "Test the UINT macros"); Change-Id: I7c2053c846f43d369402c01c0d46ce8546e4923a Signed-off-by: Harry Cutts <hcutts@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1848259 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* docs: Add dartmonkey to FPMCU partner docsTom Hughes2019-10-093-25/+43
| | | | | | | | | | | | | Also rename dragonclaw to bloonchipper. BRANCH=none BUG=none TEST=View in gitiles Change-Id: Ib2da4547bc4d8dbf44a0bc12b79a9136786a3764 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1842214 Reviewed-by: Craig Hesling <hesling@chromium.org>
* trembyle: board specific fast switch enable/disableDenis Brockus2019-10-095-3/+28
| | | | | | | | | | | | | | | | | Added board specific tcpc FRS enable/disable to work around timing issues that we found with trembyle. Also added some of the bringup debug settings BUG=b:138599218 BRANCH=none TEST=make buildall -j Change-Id: Ia16db22a9c2b3a47a4273ea1350a5ea58b78f5aa Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1847174 Commit-Queue: Edward Hill <ecgh@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* test: add nvmem tuple capacity testVadim Bendebury2019-10-091-1/+55
| | | | | | | | | | | | | | | | | | | | A recently discovered bug would cause variable update failure in case the tuple section of the NVMEM is close to capacity and the new variable is larger in size. The new test verifies both that tuple storage can be filled to capacity, does not overflow, and a variable could be updated to a larger size when tuple storage is almost full. BRANCH=cr50, cr50-mp BUG=b:141774726 TEST='make run-nvmem' succeeds if crrev.com/1829292 is applied, and fails if not. Change-Id: I2030a921a888bd185540d9d3cb7b50e737497834 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1834284 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* Zero data toggles on endpointis when appropriate.Barry Twycross2019-10-091-15/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The data toggle should be reset on an endpoint in two circumstances when the device is configured (with a SET_CONFIGURATION), or whent the endpoint is "cleared" (with a CLEAR_FEATURE(endpoint_halt). The endpoint reset code is deficient, in that the data toggle is not reset when appropriate. The upshot of this is that if the device and host ever get out of sync, the transfer will be ACKed, but the data thrown away (which is correct behaviour per spec). This causes all sorts of head scratching. In this particular case, the data which is discarded is a mailbox command to a Haven (root of trust) chip. Thus the host hangs forever waiting for a response that never comes, because the device never got the command. This behaviour is seen in testing for reasons which are not clear, but can be provoked by sending resets to the device, while sending resets to the device. The device will hang as the following SET_CONFIGURATION is supposed to clear the toggles (but doesn't) After implementing this fix, the device no longer hangs after a reset in this test. This issue is doubly bad for the device, as the recovery should be to time out the bulk transfer, and reset the endpoint, or if that doesn't work, reset the device. With the deficient code it is impossible to use standard recovery mechanisms when running across this issue. Note: The Synopsis data book notes under the register (Device Endpoint-n Control Register: DIEPCTLn/DOEPCTLn), DPID "The application must program the PID of the first packet to be received or transmitted on this endpoint, after the endpoint is activated." This is what this change is fixing, the code does not currently do this. BUG=b:141140341 BRANCH=cr50, cr51, cr52 TEST=(cr51) Problem can be reproduced by sending a reset to the haven, while it is being access by USB EC commands. 50% of the time, the next transfer will hang as the toggle is now incorrect. With this fix, the device can be reset and no hang. TEST=(cr51) A similar test is done by sending CLEAR_FEATURE(endpoint_halt) commands to the device while processing USB EC commands. On a USB analyser you can see the toggle has been reset, as the device continues to work, even if the PIDs before and after the CLEAR_FEATURE were both DATA0. TEST=(cr50) Ran flash_ec on fleex through CCD. Ran uart_stress_test on fleex as well. Signed-off-by: barryt@google.com Change-Id: Id621cfaa422d3589187db7be8a188ed411bb4c98 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1804065 Tested-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org> Commit-Queue: Namyoon Woo <namyoon@chromium.org>
* common: add `RETURN_ERROR` macroHarry Cutts2019-10-092-6/+7
| | | | | | | | | | | | | | This had been used in the GT7288 driver, but is now being used quite a bit in the private repo, so it's time to put it in common. BRANCH=none BUG=chromium:1008568 TEST=Check that a board which uses the GT7288 driver builds correctly. Change-Id: I111018a73def7a30ff899f9bf435da6f89d9b86a Signed-off-by: Harry Cutts <hcutts@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1848493 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* npcx: Ensure the watchdog isn't stopped while it is invalid to do soJett Rink2019-10-094-10/+38
| | | | | | | | | | | | | | | | | | | We cannot unlock the watchdog timer within 3 watch dog ticks of touching it per the datasheet. This is actually around 100ms so we should protect against this. Note: To avoid bringing in other dependencies into the npcx_monitor_fw, the "old" method of stopping the watchdog is used (no waiting first). BRANCH=none BUG=b:140207603 TEST=eliminates cold reset issue. Change-Id: I440d36fb9aecdd6d78bae6fc4002208198a3357f Signed-off-by: Jett Rink <jettrink@chromium.org> Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1842592 Reviewed-by: ML Chao <mlchao@nuvoton.corp-partner.google.com>
* fpsensor: Implement command to read positive_match_secret.Yicheng Li2019-10-099-10/+343
| | | | | | | | | | | | | | | | | | | | | Add EC command to read positive_match_secret on match success. If the attempt to read is 5 seconds after the match, the read is not allowed (the readable bit for positive match secret is cleared). Test that the command can read the data correctly and can read for each finger only once. Test that attempt to read secret after deadline will be rejected. BRANCH=nocturne BUG=chromium:927095 TEST=make buildall TEST=tested enrollment, matching and multifinger on DUT nocturne TEST=tested that if biod requests to download template and secret for a finger that's not currently matched, reading secret will fail. Change-Id: Idc734c6392d271e2aaee1cddf7c2c5b81b727b4a Signed-off-by: Yicheng Li <yichengli@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1679372 Reviewed-by: Nicolas Norvez <norvez@chromium.org>
* Trembyle: Update config for bringupEdward Hill2019-10-092-16/+3
| | | | | | | | | | | | BUG=none BRANCH=none TEST=build Change-Id: I05c3fa2a8b72941ef1758be45428b9911938d013 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1845783 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* Revert "Temporarily disable jerry due to CQ outages"Jack Rosenthal2019-10-081-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 437e7346ab38a1eca1bb8526ae03b120635f03e9. Reason for revert: jerry RO space issue resolved BUG=chromium:1011621 Original change's description: > Temporarily disable jerry due to CQ outages > > jerry is out of RO flash space and causing CQ outages. disable from > buildall until it gets a proper fix. > > BUG=chromium:1011621 > TEST=buildall > > Change-Id: I09c6d2729660d94c0462b0ed5795b977ace90a3a > Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1844145 > Reviewed-by: Jason Clinton <jclinton@chromium.org> > Reviewed-by: Mike Frysinger <vapier@chromium.org> > Commit-Queue: Jason Clinton <jclinton@chromium.org> Bug: chromium:1011621 Change-Id: I52bd1c661684da39192e82ea801e7998bb07bbd0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1847773 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jason Clinton <jclinton@chromium.org> Tested-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* cleanup: move return to separate lineJett Rink2019-10-081-4/+7
| | | | | | | | | | | | | | The return type of state machine functions are void, so put the return statement on its own line. BRANCH=none BUG=none TEST=builds Change-Id: I30f3922228840dca7441a31f0ef0727a375b351e Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1847774 Reviewed-by: Edward Hill <ecgh@chromium.org>
* docs/sitemap: add ccd howtosMary Ruthven2019-10-081-0/+1
| | | | | | | | | | | BUG=b:140551928 BRANCH=none TEST=link takes you to the howtos doc. Change-Id: Id018dccb08bd0e74463b5917f02fcd4f8ad5b867 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1846678 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* docs: ccd gsc: add description of G3 WP issueMary Ruthven2019-10-082-3/+30
| | | | | | | | | | | | | | Cr50 may not be able to disable write protect in G3. Add a description and workaround for this issue to the ccd gsc docs. BUG=b:140551928 BRANCH=none TEST=none Change-Id: I752a1d4fd5a148af44b595924e57aaa7ec64e7a4 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1845780 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* docs: add disable write protect howtoMary Ruthven2019-10-081-0/+136
| | | | | | | | | | | BUG=b:140551928 BRANCH=none TEST=read doc Change-Id: I37409c284a1959c584146e41d3d586785a6683f2 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1816927 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* cleanup: moving define closer to useJett Rink2019-10-081-4/+3
| | | | | | | | | | | BRANCH=none BUG=none TEST=builds Change-Id: Ifa60ca375fda22e6d5f79610f10ca1d5b4f2e894 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1845813 Reviewed-by: Edward Hill <ecgh@chromium.org>
* cleanup: use different condition for clarityJett Rink2019-10-081-1/+2
| | | | | | | | | | | | | | | No functionality is changing, just using a different set of equivalent condition to make code more readable. BRANCH=none BUG=none TEST=builds Change-Id: I6e77758514fe20e5ae8be29eb2fd1ba85414c9b6 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1845812 Reviewed-by: Edward Hill <ecgh@chromium.org>
* usbc: fix cc interpretation errorJett Rink2019-10-086-1/+97
| | | | | | | | | | | | | | Ensure that two Rp values are interpreted as a debug accessory. Added unit test for meaningful combinations. BRANCH=none BUG=none TEST=passes unit test. Change-Id: Ia454382f20f9377edc944dc01be133e062c218b0 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1845811 Reviewed-by: Edward Hill <ecgh@chromium.org>
* Trembyle: Don't enable the new USB-C PD stack yetEdward Hill2019-10-081-0/+3
| | | | | | | | | | | | | | Wait for charging to work using the new USB-C PD stack before enabling it. BUG=b:142284905 BRANCH=none TEST=Plug charger in Trembyle USB-C0 Change-Id: I9dbadd7d955afbb8d7f7a148ed2ffb0def6c27ff Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1846751 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* kodama: not provide dock keyboard power supply in S5/G3xiong.huang2019-10-082-5/+16
| | | | | | | | | | | | | | | When dock keyboard is connected to MB, MB doesn't provide power supply for dock keyboard to save system power in S5/G3. BUG=b:141157295 BRANCH=master TEST=GPIO EN_PP3300_POGO level is 0 through command 'ectool gpioget'. measure power of dock keyboard with multimeter. Change-Id: I587f39063054de83dbbeb12bd23a1113a04e61da Signed-off-by: Xiong Huang <xiong.huang@bitland.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1809180 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* npcx7: fix RAM powerdown regressionCaveh Jalali2019-10-081-2/+3
| | | | | | | | | | | | | | | | chromium:1518660 introduced a subtle change in which RAM bank power-down bits are set. this change reverts to the original bit pattern and masks the reserved bits as suggested by nuvoton. BUG=b:141715856 BRANCH=none TEST=boots on atlas. Change-Id: Idfbedd73fd46aa639f12c9991911d96f15739174 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1833153 Reviewed-by: Caveh Jalali <caveh@google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* jacuzzi: disable PP1800 when chipset offTing Shen2019-10-083-1/+32
| | | | | | | | | | | | | | | | | To improve G3 power consumption, a pin EN_PP1800_S5_L is added in board rev 1 and should be turned on before pmic on, and turned off after pmic off. BUG=b:138180455,b:141592177 TEST=verify jacuzzi rev 1 is bootable with this change BRANCH=master Change-Id: Iacd9b0fab97d775f15faa9b2df491940871bc7ff Signed-off-by: Ting Shen <phoenixshen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1773031 Reviewed-by: Yilun Lin <yllin@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* charger/mt6370: fix the disable sequence of bc12 detectionTing Shen2019-10-081-3/+12
| | | | | | | | | | | | | | | | | BC12_DET_EN should be disabled after mt6370 stops bc12 detection. Otherwise, race condition may happen because both ap and charger have access to D+ and D- pins. BUG=b:141005922 TEST=make sure b:141005922 is not reproducible after this fix. BRANCH=master Change-Id: I89750efe58ba65b72bc47ee42c4923e560d9d534 Signed-off-by: Ting Shen <phoenixshen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1839711 Reviewed-by: Yilun Lin <yllin@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* Trembyle: Use correct battery settings.Edward Hill2019-10-082-17/+17
| | | | | | | | | | | | BUG=b:138601173 BRANCH=none TEST=battery charges ok Change-Id: I5dc993bfeb125ab188029375a5f37b3c06d67dd4 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1845782 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* npcx: espi: guard to call power_signal_interruptCHLin2019-10-081-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | The source of the SLP_Sx power signals can come from only either GPIO or virtual wire. The firmware now assumes that, when the GPIO is chosen, (i.e. CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS is not enabled.) there should be no virtual wire SLP_Sx event is triggered. However if the host accidentally sends a SLP_Sx VW to EC, EC will call the power_singal_interrput(signal) by passing an invalid enum signal number. (i.e. The index is of the range of GPIO table.) It may cause the system problematic when the firmware uses the enum signal number to access the GPIO table. BUG=b:141730279 BRANCH=none TEST=No error for "make buildall" TEST=Test on trembyle, the crash symptom can be fixed. Change-Id: I0fa606f812b377d6616e314ca1f1c9675a04e2a8 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1844658 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* npcx: espi: clear pending bit while setting VW interruptCHLin2019-10-081-0/+3
| | | | | | | | | | | | | | | | | | | | | According to the datasheet, firmware should clear MIWU pending register (WKPND) after configuring WKMOD/WKEDG/WKAED register and before enabling WKEN register. Otherwise, the module might cause a false wake-up or interrupt event. BUG=b:141730279 BRANCH=none TEST=No error for "make buildall" TEST=Test on yorp, check the fake virtual wire events are no longer generated and the system crash symptom is fixed when CONFIG_BRINGUP is defined. Change-Id: I89e055b4174419658cdd823f04acff41aa14cfe6 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1844660 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* Volteer: fix I2C bus 0Keith Short2019-10-081-1/+1
| | | | | | | | | | | | | | | | Wrong pins were configured for alternate mode on I2C bus 0. BUG=none BRANCH=none TEST=make buildall -j TEST=Loaded volteer image on Kohaku (which uses same EC and I2C configuration, verified i2cscan Change-Id: If9cd2eb38424c3cc821cf2cfe1ab4209a5f77b4a Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1846236 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* fpsensor: Prepare derivation of positive match secret.Yicheng Li2019-10-084-2/+249
| | | | | | | | | | | | | | | | | Implement derivation of positive match secret for a template. This derivation will be used when biod sends a command to ask for positive match secret and the secret readable bit is set. Also add unit tests for this derivation. BRANCH=nocturne BUG=chromium:927095 TEST=make -j buildall TEST=tested enrollment, matching and multifinger on DUT nocturne Change-Id: Ife477a98573284f69c5fb07e814d9a3d09f92127 Signed-off-by: Yicheng Li <yichengli@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1639440 Reviewed-by: Nicolas Norvez <norvez@chromium.org>
* ppc: driver changes for FRSDenis Brockus2019-10-081-1/+1
| | | | | | | | | | | | BUG=b:138599955 BRANCH=none TEST=make buildall -j Change-Id: I84f54f4bef9f38bc194e2a45802fb6fcf335e643 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1834023 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* jerry: Enable LTO to save spaceDouglas Anderson2019-10-081-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | We're outta space on jerry. Builders are failing. It seems like we can magically save space like CL:1663540 by turning on LTO. Let's do it! Before on my local build: *** 28 bytes in flash and 5380 bytes in RAM still available on jerry RO **** *** 4476 bytes in flash and 5380 bytes in RAM still available on jerry RW **** After on my local build: *** 3168 bytes in flash and 5448 bytes in RAM still available on jerry RO **** *** 7616 bytes in flash and 5448 bytes in RAM still available on jerry RW **** BRANCH=None BUG=chromium:1011621 TEST=See above Change-Id: I2de0e6474a6d561fa4c44cc12d904a7c6339712f Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1846231 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
* hatch: Reset TCPCs after boot (HOOK_INIT)Tim Wawrzynczak2019-10-071-0/+5
| | | | | | | | | | | | | | | For Hatch baseboard, reset all TCPCs in the system after boot (RO only), to make sure they're in a known-good state. BUG=b:142215640 BRANCH=none TEST=Ensure both TCPC ports still work after wake from hibernate Change-Id: I13104d4698ccb6905742202f86c6d41fe2b49f84 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1845312 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* tcpc: driver changes for FRSDenis Brockus2019-10-073-22/+99
| | | | | | | | | | | BUG=b:138599955 BRANCH=none TEST=make buildall -j Change-Id: Ic8d386355f9297c3da69021999142f35120b214c Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1834022 Reviewed-by: Edward Hill <ecgh@chromium.org>
* pd: FRS enable/disable and interrupt handlingDenis Brockus2019-10-078-21/+244
| | | | | | | | | | | BUG=b:138599955 BRANCH=none TEST=make buildall -j Change-Id: I0c639aae18e8c2c2d1b457e2e209f8484a834f6b Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1825507 Reviewed-by: Edward Hill <ecgh@chromium.org>
* cr50: correct the comment on ENTERING_RW in gpio.incNamyoon Woo2019-10-071-2/+5
| | | | | | | | | | | | | | | | The previous comments were not correct. ENTERING_RW is not a GPIO at H1. The reason of marking it unimplemented in gpio.inc is to avoid the compile error from cros FW common module. BUG=None BRANCH=cr50 TEST=make buildall. Change-Id: Ieecbc9128e4071accbe4408d41ec51cefb68cffc Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1842031 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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