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* gsctool: fix in setting '--tpm_mode'.Namyoon Woo2018-11-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | b:119626285 reported the problem with '--tpm_mode'. $ gsctool -a --tpm_mode Unrecognized option: -m $ gsctool -a --tpm_mode enable TPM Mode: enabled (0) $ gsctool -a --tpm_mode disable TPM Mode: enabled (0) "tpm_mode" long opt should have 'has_arg' set to 'optional_argumenet', not 'required_argument'. Before this CL, --tpm_mode worked in a wrong way as reported in BRANCH=none BUG=b:119626285 TEST=manually and with autotest (crrev.com/c/1340640) as well. $ gsctool -a --tpm_mode TPM Mode: enabled (0) $ gsctool -a --tpm_mode enable TPM Mode: enabled (1) $ gsctool -a --tpm_mode disable TPM Mode: disabled (2) Change-Id: Ie11852925a21a3a3b8d9dda6092eac5040f1cd5c Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1340642 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* Fizz: Set initial fan speed to 50%Daisuke Nojiri2018-11-191-0/+2
| | | | | | | | | | | | | | | | | This patch sets initial fan speed to 50% to reduce fan noise at start-up and resume. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:118701592 BRANCH=none TEST=Verify fan starts spinning on Fizz at 50% speed. Change-Id: I230eb2b6c33499f96d0583b5d75f2674960a35ff Reviewed-on: https://chromium-review.googlesource.com/1309036 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Fizz: Add Jax supportDaisuke Nojiri2018-11-192-19/+26
| | | | | | | | | | | | | | | | | | | If OEM_ID is equal to 8 (Jax), the EC works as follows: - Set barrel jack adapter spec to (19V, 3.42A). - Set fan_count to zero Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:116588924 BRANCH=none TEST=Boot Fizz with OEM=8. Change-Id: Id6489b65a0bb71cd56d4fcf5e2fdbacb630aa99a Reviewed-on: https://chromium-review.googlesource.com/1308258 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Fan: Allow fan count to be set dynamicallyDaisuke Nojiri2018-11-197-33/+77
| | | | | | | | | | | | | | | | | | Currently, the fan count is statically set. This patch allows it to be set dynamically so that a single binary can support devices with a different number of fans (including fan-less). Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:116588924 BRANCH=none TEST=Boot Fizz with OEM=8. Verify fan spins with OEM=1. Change-Id: I77fc4e07ce2a1be2e288df145857a79c0003542f Reviewed-on: https://chromium-review.googlesource.com/1308257 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* touchpad_st: do not generate 0 finger hid eventWei-Han Chen2018-11-191-1/+3
| | | | | | | | | | | | | | | | | When we receive a beacon, we will also try to collect finger events. In this case, there might be the case that there is not finger but dome switch is on. In this case, we should not report the click. BRANCH=nocturne BUG=b:119597909 TEST=manual on whiskers Signed-off-by: Wei-Han Chen <stimim@chromium.org> Change-Id: I03fe4481d17f6e919ab9501b2a93fa19635e381f Reviewed-on: https://chromium-review.googlesource.com/1337253 Commit-Ready: Wei-Han Chen <stimim@chromium.org> Tested-by: Wei-Han Chen <stimim@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* Ampton: enable the interrupt for GPIO_BASE_SIXAXIS_INT_LJames_Chao2018-11-192-1/+7
| | | | | | | | | | | | | | | BUG=none BRANCH=none TEST=accelinfo on Change-Id: I04764b0ce3f963f12f7977b08c89a375c2319d00 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1335292 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* kukui: Fix shipping mode VSYS leakage.Yilun Lin2018-11-195-5/+96
| | | | | | | | | | | | | | | | | | | | Follow the cut-off procedure recommended by Richtek. Also, tcpc_read/tcpc_write function will wake the TCPC up from low power mode and thus causing the TCPC re-init again, and this will break the register state we set. So, here we use mt6370_i2c_read/write to replace tcpc_read/write. TEST=boot system; Exec cutoff, and check that Vsys equals to zero. BUG=b:116682788 BRANCH=None Change-Id: I5cbd0df490ddb64b9376507e42a259c008c3ba16 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1335289 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* util:ecst: add the CHIP_VARIANT npcx7m6fc support for NPCX7CHLin2018-11-181-1/+3
| | | | | | | | | | | | | | | | | | | This CL adds the support for chip variant npcx7m6fc in the ecst utility. BRANCH:none BUG=none TEST=No build errors for make buildall. TEST=Change CHIP_VARIANT to npcx7m6fc in board/npcx7_evb/build.mk; "BOARD=npcx7_evb make"; Check ec image can be built and image header is correct. Change-Id: I138b19e21c361a42c2e613f6066957aabea17c0d Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/1335293 Commit-Ready: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* headers: make EC commands headers C++-friendlyNicolas Norvez2018-11-162-1/+17
| | | | | | | | | | | | | | | | - wrap headers in 'extern "C"' - use relative path to #include BRANCH=None BUG=chromium:889250 TEST=make buildall -j TEST=emerge-nocturne ec-utils Change-Id: I67d8ba88edf77f72bd54500eff169537ffb6257f Signed-off-by: Nicolas Norvez <norvez@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1338599 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Mike Frysinger <vapier@chromium.org>
* Makefile.toolchain: Add TEST_FUZZ checks.Allen Webb2018-11-161-0/+2
| | | | | | | | | | | | | | | This prevents a bunch of warnings that show when trying to run pkg-config for libprotobuf-mutator when not building the fuzzer targets. BRANCH=None BUG=None TEST=make -j buildall Change-Id: Idf8de959d86db744754cd237796ccaacd3668a63 Signed-off-by: Allen Webb <allenwebb@google.com> Reviewed-on: https://chromium-review.googlesource.com/1338605 Reviewed-by: Mike Frysinger <vapier@chromium.org>
* gsctool: explicitly set buffering type to line bufferedWei-Cheng Xiao2018-11-161-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | This CL allows gsctool outputs to be instantly piped and shown in crosh when crosh executes cr50-verify-ro.sh, which calls gsctool, indirectly via debugd. Program stdout buffering type by default changes from line buffered to block buffered if the output is redirected to a file or pipe. Since we are going to call gsctool from inside debugd (CL:1337190) and want to pipe the output instantly to the dbus request sender, the buffering type of gsctool needs to be explicitly set. BRANCH=none BUG=b:113893821 TEST=in crosh run verify_ro, which indirectly runs gsctool via debugd, and verify that output is instantly piped and shown in crosh. (see CL:1337190 for detailed output) Signed-off-by: Wei-Cheng Xiao <garryxiao@chromium.org> Change-Id: I515854a29e5e2ede0acc8c2d9e2c4df367a5062e Reviewed-on: https://chromium-review.googlesource.com/1337250 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Louis Collard <louiscollard@chromium.org>
* core/minute-ia: fixes toolchain incompatibiltyKyoung Kim2018-11-161-1/+1
| | | | | | | | | | | | | | | | | | | Default coreboot toolchain(gcc 8.1, linker) does not generate __bss_size_words absolute value. ABSOLUTE() built-in function is used to make both old(4.9) and new(8.1) toolchains compatible. BUG=b:118355015 BRANCH=none TEST=built code with both old(4.9) and new(8.1) and verified __bss_size_words abolute value and tested if ISH system boots. Change-Id: I07ca0b68b222a2754866abdacb0a5d8585d01566 Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1332810 Commit-Ready: Li1 Feng <li1.feng@intel.com> Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com> Reviewed-by: Caveh Jalali <caveh@google.com> Reviewed-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
* cr50: Add board strapping options for Sarien/ArcadaKeith Short2018-11-162-8/+47
| | | | | | | | | | | | | | | | | | | | | Add 2 new board properties: * BOARD_WP_DISABLE_DELAY - forces an additional delay after detecting battery removal before disabling write protect * BOARD_CLOSED_SOURCE_SET1 - enables custom CR50 options for Sarien/Arcada boards that use a closed source EC Add Sarien/Arcada to board_cfg_table. BUG=b:118688072 BRANCH=none TEST=make buildall, flashed RW Cr50 firmware onto Careena board and verified boots new version Change-Id: Ic9ffdf4861c2239a1e68eb682152c70fb1f9bfc3 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1310093 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* Liara: Add LGC batteryEdward Hill2018-11-162-0/+32
| | | | | | | | | | | | | | BUG=b:113823864 BRANCH=grunt TEST=Boot Liara with LGC battery; "cutoff" EC command succeeds; Plug in AC => boot to OS login. Change-Id: If2ea7bd1a6888b7bbe5f4eb0dd3217073d32e346 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1337468 Tested-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* octopus: ignore C0 interrupts if in resetJett Rink2018-11-161-2/+5
| | | | | | | | | | | | | | Now that we have a reset line to C0, we should ignore interrupts while the C0 TCPC is in reset. BRANCH=none BUG=none TEST=flashed on fleex (uses C0 reset) without issue Change-Id: I014e95f80844b30623d1fba7e59bea8f5eb8572e Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1332807 Reviewed-by: Diana Z <dzigterman@chromium.org>
* usb-pd: preprocess pending interrupts after resetJett Rink2018-11-161-0/+14
| | | | | | | | | | | | | | | | | | If the EC resets while the TCPC interrupt line is asserted and the board configures the interrupt as edge trigger (which is very common), then the interrupt line will never present and edge and the ISR will never get called. Preemptively checking for pending interrupts should prevent this. BRANCH=none BUG=b:119564103 TEST=test that ec reboot with hub attached no longer malfunctions. Change-Id: I77ca5815e2bdc94e3173a621aeac8620bf332613 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1337466 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* phaser: update gpio based on next revJett Rink2018-11-162-11/+21
| | | | | | | | | | | | | | | | | | The reset pin for ANX3447 was added. This pin used to be a 1.8V signal and it now a 3.3V signal, so we need to take care to ensure that older boards don't try to drive 3.3V into the SoC. Other changes are just renames. BRANCH=none BUG=none TEST=current phaser (ID=2) works Change-Id: Ife0a1617f94e4f4a40d43b16328d5540ea35b3ff Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1334031 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* ppc/nx20: add more fault condition printsJett Rink2018-11-161-2/+11
| | | | | | | | | | | | | | When the PPC detects a fault condition such as a short or reverse current, we should print something to the EC console. BRANCH=none BUG=b:115307099 TEST=build. Couldn't get this to trip on demand though. Change-Id: Ib5298074b08a7d7d0d278258822fb7edf562c7aa Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1334527 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Battery: Use host full capacity to compute display percentageDaisuke Nojiri2018-11-163-17/+27
| | | | | | | | | | | | | | | | | | | | | | | | The full capacity known by the host may slightly differ from the full capacity known by the EC because we notify the host of the new capacity only if the difference is larger than 5 mAh. This patch makes the EC use the host's full capacity instead of the local full capacity to compute the display percentage. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:109954565,b:80270446 BRANCH=none TEST=Verify display percentages printed by EC and power_supply_info move up synchronously on charge and the LED and the taskbar icon turn to full at the same time. TEST=buildall Change-Id: Ie695a9937a22fc7a769b82448f4600d4491935b3 Reviewed-on: https://chromium-review.googlesource.com/1330101 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Nami: Supply power up to 3A + 1.5ADaisuke Nojiri2018-11-161-0/+1
| | | | | | | | | | | | | | | | | | This change allows Nami to supply 3A on one port and 1.5A to the other without changing the max current of the currently active port. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:115291657 BRANCH=none TEST=Charge Pixel phone on one port and a USB fan on the other. Verify the current provided to the phone does not drop. Change-Id: I38208feedc616e363c9095f273ea926ea8ebbb12 Reviewed-on: https://chromium-review.googlesource.com/1322070 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* USB-PD: Supply power up to 3A + 1.5ADaisuke Nojiri2018-11-162-22/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, USB PD ports supply 3A only if there is no other active supplier. We enforce this rule even if the port is actively supplying power. That is, we drop the max current of an active port to 1.5A if a sink device is plugged to another port. This change makes USB PD ports supply 3A if the other ports are not supplying 3A. (P0, P1) and '*' indicates a sink device is plugged. Unplug both: (3A, 3A) Plug P0: (*3A, 1.5A) Plug P1: (*3A, *1.5A) Unplug P0: (1.5A, *3A) Unplug P1: (3A, 3A) Plug P1: (1.5A, *3A) Plug P0: (*1.5A, *3A) Unplug P0: (1.5A, *3A) Unplug P1: (3A, 3A) Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:115291657 BRANCH=none TEST=Performed as shown above and verify current of active port is not affected by the other port. Change-Id: I08fb04da7e0177d5e71f823fb1e47e6945ae12fc Reviewed-on: https://chromium-review.googlesource.com/1322069 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Raymond Chou <raymond_chou@compal.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* meep: set PD on unused interruptJett Rink2018-11-161-8/+5
| | | | | | | | | | | | | | | If the SKU does not populate the base accel, then we should not enable the interrupt and add a pull down to keep the line from floating. BRANCH=none BUG=none TEST=verfied similar change on bobba Change-Id: I29b4367905dadb741916bc5b9bb045bfc6b784ea Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1336289 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* fleex: set PD on unused interruptJett Rink2018-11-161-8/+5
| | | | | | | | | | | | | | | If the SKU does not populate the base accel, then we should not enable the interrupt and add a pull down to keep the line from floating. BRANCH=none BUG=none TEST=verfied similar change on bobba Change-Id: I85fdfc001bcafdf4d56a2459837c2f4f4f0b64fa Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1336288 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* phaser: set PD on unused interruptJett Rink2018-11-161-8/+5
| | | | | | | | | | | | | | | If the SKU does not populate the base accel, then we should not enable the interrupt and add a pull down to keep the line from floating. BRANCH=none BUG=none TEST=verfied similar change on bobba Change-Id: Ifd3ef029a18484a4c227db6fcc4312ea3a8603db Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1336287 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* bobba: add PD to unused lines to prevent floatJett Rink2018-11-161-11/+11
| | | | | | | | | | | | | | | | | | | | Depending on the model, we do not stuff the base accel or the camera. When we detect those SKU, do not enable the interrupt and add a pull down resistor to prevent the line from floating since there isn't an external pull BRANCH=none BUG=none TEST=Verified that sensors/board still work on Bobba360 and Bobba, also verified that power stayed the same or slightly lower (11.32mW on PP3300_ec_mw to 11.29mW over 10 sec average on bobba. 13.62mW->13.56mW for bobba360). Change-Id: I36b01dd79a0f493a2bf9d3cbae54e9863773a056 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1335686 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* Meep: update EC GPIOs for board version 1Diana Z2018-11-152-13/+20
| | | | | | | | | | | | | | | | | | | | Between board versions 0 and 1, meep added the Analogix reset GPIO. This line should never be driven high on proto boards, so it's set to open drain on board version 0. Other changes include reallocation of the previous WoV pins, and a renaming of the CCD_MODE pin. BRANCH=None BUG=None TEST=imaged meep proto to verify C0 reset was low, imaged meep EVT and verified default GPIO levels Change-Id: I22b40883b8677327887b92922d63d421e1a27596 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1334531 Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Makefile.toolchain: Add vars for libprotobuf-mutator.Allen Webb2018-11-151-3/+11
| | | | | | | | | | | | | | libprotobuf-mutator is a helper library for fuzzing using protocol buffers. BRANCH=None BUG=None TEST=make -j buildfuzztests && make -j buildall Change-Id: I855691860042bdbdeafe68cc0e0d7bea0f2667cc Signed-off-by: Allen Webb <allenwebb@google.com> Reviewed-on: https://chromium-review.googlesource.com/1334030 Reviewed-by: Mike Frysinger <vapier@chromium.org>
* cr50: Add extern "C" to headers used by future fuzzing target.Allen Webb2018-11-1515-2/+110
| | | | | | | | | | | BRANCH=None BUG=None TEST=make -j buildall Change-Id: Icf2cfb6a2657064c10721c0e527d24fbb3be6ab3 Signed-off-by: Allen Webb <allenwebb@google.com> Reviewed-on: https://chromium-review.googlesource.com/1330102 Reviewed-by: Mike Frysinger <vapier@chromium.org>
* Battery: Make battery command print display percentageDaisuke Nojiri2018-11-151-1/+8
| | | | | | | | | | | | | | | | | | This patch make battery console command print display percentage and compensated full capacity. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:109954565,b:80270446 BRANCH=none TEST=Verify display percentage and compensated full capacity are printed on Sona. Change-Id: Idc8ee063249fd0937209c8cb32aee59ee3598258 Reviewed-on: https://chromium-review.googlesource.com/1313475 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Nami: Apply full factor to full capacityDaisuke Nojiri2018-11-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | This change applies 'full factor' to the battery full capacity. It makes the rest of the system see consistent charge percentage behavior. More concretely, with this change we can get rid of 'full factor' from Powerd because it sees the current charge equal to the full capacity. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> CQ-DEPEND=CL:1314048 BUG=b:109954565,b:80270446 BRANCH=none TEST=Verify display percentages printed by EC and power_supply_info move up synchronously on charge and the LED and the taskbar icon turn to full at the same time. Change-Id: Ic16463d457a6c5c2860b97476c78bdafb9021572 Reviewed-on: https://chromium-review.googlesource.com/1315411 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* atlas: clean up ROP PMIC registersCaveh Jalali2018-11-152-17/+34
| | | | | | | | | | | | | | | | | this replaces some ROP PMIC register magic numbers with their actual names. corrected a few comments about the bits we're writing into these registers along the way. BUG=b:75070158 BRANCH=none TEST=boots on atlas Change-Id: If3be6b4c1d550d7e0770450e9f713282835656b5 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1278096 Commit-Ready: Caveh Jalali <caveh@google.com> Tested-by: caveh jalali <caveh@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* ISH: Fix FPU flagKyoung Kim2018-11-151-1/+1
| | | | | | | | | | | | | | | | | Fix bug in following CL. https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1154187 BUG=b:118628615 TEST=check if FPU-utilzing tasks can operate properly. Change-Id: Id7f6a5f7827a9ffc81684b7f91705b4c72f03eab Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1304893 Commit-Ready: Caveh Jalali <caveh@google.com> Tested-by: Caveh Jalali <caveh@google.com> Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com> Reviewed-by: Caveh Jalali <caveh@google.com> Reviewed-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
* ish gpio: GPIO functionalityli feng2018-11-152-3/+120
| | | | | | | | | | | | | | BUG=b:116451255 BRANCH=none TEST=Tested on Atlas board, ISH GPIO is working. Change-Id: I29121dd143a5bf44a7431d12d9e05a3510fb4654 Signed-off-by: Sadashiva Rao Pv <sadashiva.rao.pv@intel.com> Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://chromium-review.googlesource.com/954718 Commit-Ready: Caveh Jalali <caveh@google.com> Tested-by: Li1 Feng <li1.feng@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ec_commands: move __ec_* macros to end of struct definitionBrian Norris2018-11-151-458/+458
| | | | | | | | | | | | | | | | | | This matches the typical style for kernel structs, and it avoids tripping up the kernel's kernel-doc parser/validator. This matters, because we sync this header with the Linux kernel tree regularly. This transformation was done entirely with vim macros, to match '^struct __ec_' and move the second word down to the next '^};'. BRANCH=none BUG=chromium:621123 TEST=presubmits Change-Id: I54c1b5b2daa47a54727049551ef1401a4881e1a5 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1335685 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ec_commands: more kerneldoc conversionsBrian Norris2018-11-151-31/+67
| | | | | | | | | | | | | | | It's not necessarily required that all structs be using kerneldoc, but several of these are adequately documented and fit the same pattern of conversions that were done upstream -- except that they currently only exist in the EC sources. Let's convert preemptively. BRANCH=none BUG=chromium:621123 TEST=presubmits Change-Id: I0922db83983ed03f9a02142606c425f0af6313d1 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1330109
* ec_commands: sync some header comments, kerneldoc from kernel treeBrian Norris2018-11-151-109/+216
| | | | | | | | | | | | | | | | | | External folks helped rewrite much of the kernel tree's header style: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e2bbf91cad09118d7500f1fdaaa83d7741d30395 Subject: mfd: cros_ec: Fix and improve kerneldoc comments. Let's sync with that, to reduce the noise when syncing the EC tree to the kernel tree. BRANCH=none BUG=chromium:621123 TEST=presubmits Change-Id: I5b6b7810d8943a164a4b7738d6911a9393261aeb Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1330108
* Ampton: add sku id for convertible skuJames_Chao2018-11-151-2/+3
| | | | | | | | | | | | | | | | According to b:112290350, the convertible sku is 1,2,3,4 BUG=b:112290350 BRANCH=none TEST=build Change-Id: I2de55eb070741f3a0058fd390f897a863562f762 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1335290 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* cheza: Enable CONFIG_HOSTCMD_AP_RESET for debug usageWai-Hong Tam2018-11-151-0/+1
| | | | | | | | | | | | | | | | | | | Enable the host command to issue AP reset. BRANCH=none BUG=b:119261783 TEST=Manually tested as follow: Flashed EC image. Copied the compiled ectool to Cheza. Ran "ectool apreset". Checked EC console: [6698.093141 chipset_reset(4)] [6698.093753 power off 5] ... the power state changing S0 -> S5 -> S0 Change-Id: I2d3e425f7bd7dcb319f039ab4866b2a25197f499 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1327842
* chipset: Add a host command to issue AP resetWai-Hong Tam2018-11-155-0/+30
| | | | | | | | | | | | | | | | | | | | | | The host command is enabled by defining CONFIG_HOSTCMD_AP_RESET. It calls the chipset_reset() function, similar to the console command "apreset". BRANCH=none BUG=b:119261783 TEST=Manually tested as follow: Enabled CONFIG_HOSTCMD_AP_RESET on Cheza and flashed EC image. Copied the compiled ectool to Cheza. Ran "ectool apreset". Checked EC console: [6698.093141 chipset_reset(4)] [6698.093753 power off 5] ... the power state changing S0 -> S5 -> S0 Change-Id: I09f26f0c7ccd22905979e8b8675185505ad739eb Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1327841 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* eve: Enable support for multi-profile DPTFFurquan Shaikh2018-11-152-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | This change enables support for multi-profile DPTF on eve, which uses a hall sensor. Thus the following changes are made: 1. Select config CONFIG_DPTF_MULTI_PROFILE 2. Set profile number based on the TABLET_MODE_L GPIO state (input from the hall sensor indicating completely flipped mode). This change is being done only as a reference for future boards with hall sensors to enable multi-profile DPTF. DO NOT cherry-pick this to any eve branch. CQ-DEPEND=CL:1295851,CL:1295852 BUG=b:117844490 BRANCH=None (Do not cherry-pick to any eve branch) TEST=make -j buildall Change-Id: I71e2078d8f63cc4d5939b76ffca962f041a48e42 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1313471 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com>
* soraka: Enable multi-profile DPTFFurquan Shaikh2018-11-152-0/+10
| | | | | | | | | | | | | | | | | | This change enables multi profile DPTF for soraka by selecting CONFIG_DPTF_MULTI_PROFILE and setting appropriate profile numbers based on base attach/detach state. CQ-DEPEND=CL:1295851,CL:1295852 BUG=b:17844490 BRANCH=None TEST=make -j buildall Change-Id: I7b48025f8eeca9fd585099dc5dce011963780117 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1313470 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com>
* nautilus: Enable multi-profile DPTFFurquan Shaikh2018-11-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | This change enables multi-profile DPTF by selecting the following config options: 1. CONFIG_DPTF_MULTI_PROFILE: Set appropriate profile number based on mode. 2. CONFIG_DPTF_MOTION_LID_NO_HALL_SENSOR: Indicate board does not have a hall sensor and hence profile numbers are updated by motion_lid driver. CQ-DEPEND=CL:1295851,CL:1295852 BUG=b:117844490 BRANCH=None TEST=make -j buildall Change-Id: Ib6f146d4465e815f7f008cc3e2682e412acc32bb Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1313469 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com>
* motion_lid: Add support for setting DPTF profile based on lid angleFurquan Shaikh2018-11-152-1/+76
| | | | | | | | | | | | | | | | | | | | | | | This change adds support in motion_lid driver to set DPTF profile number based on the lid angle, only when: 1. CONFIG_DPTF_MULTI_PROFILE is selected by board 2. If board does not have a hall sensor to indicate completely flipped mode. This is done by adding another new config option CONFIG_DPTF_MOTION_LID_NO_HALL_SENSOR which will have to be selected by boards to indicate to motion_lid driver to set DPTF profile numbers. BUG=b:117844490 CQ-DEPEND=CL:1295851 BRANCH=None TEST=make -j buildall Change-Id: If695429240e0645e3d19eeb9073bd00bac580705 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1295852 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* dptf: Add support for DDPNFurquan Shaikh2018-11-154-3/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change adds Device DPTF Profile Number(DDPN) to EC_ACPI_MEM_DEVICE_ORIENTATION field to indicate to host which DPTF profile should be loaded depending upon the device mode. This is done to de-couple DPTF table loading from tablet mode flag to allow different drivers within EC to set the profile number depending upon their design. In order to maintain backward compatibility, this change treats 0 as reserved to indicate to host that it should fall back to using tablet mode switch to decide which DPTF table to load. Additionally, it provides helper function to allow drivers to set the profile number that will be returned on host query for EC_ACPI_MEM_DEVICE_ORIENTATION. It also adds a new config option CONFIG_DPTF_MULTI_PROFILE that should be selected by the boards that support multiple DPTF profiles on the host side. CQ-DEPEND=CL:1295852 BUG=b:117844490 BRANCH=None TEST=make -j buildall Change-Id: Idfa0cfea48b9df346533342647258474fb63e86c Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1295851 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com>
* chip/npcx: Default output the i2c_recovery() error messageZhuohao Lee2018-11-141-2/+3
| | | | | | | | | | | | | | | | | | | The i2c_recovery() will be called if the i2c bus error is detected. This is an serious error handling and may be caused by the slave which doesn't follow the spec. We should output this error message to let developer catch this error at the beginning like proto stage. BUG=b:118063849 BRANCH=master TEST=error message popped out on Nami and Rammus Change-Id: I4996cd18415d6ee4c5cd48ac374252a2230628b0 Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1331249 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: ML Chao <mlchao@nuvoton.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Battery: Apply full factor to full capacityDaisuke Nojiri2018-11-142-11/+14
| | | | | | | | | | | | | | | | | | | | This change introduces CONFIG_BATT_HOST_FULL_FACTOR. If it's 100, meaning no compensation, we multiply full capacity by CONFIG_BATT_FULL_FACTOR. This makes the rest of the system see consistent charge percentage behavior. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:109954565,b:80270446 BRANCH=none TEST=Verify display percentages printed by EC and power_supply_info move up synchronously on charge and turns to full at the same time. Change-Id: Ifb27c802b0cf04195ac5b426c13f9476189feb75 Reviewed-on: https://chromium-review.googlesource.com/1313468 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Kalista: Match variable names to LED colorTino Liu2018-11-143-21/+21
| | | | | | | | | | | | | | | Power LED is blue not green. This patch renames variables to match the actual color. There is no behavior change. BUG=b:119292627, b:119153673 BRANCH=none TEST=`ectool led power blue=100` and `led blue` can let power led show blue Change-Id: Ie6aefe1e2f6de0711c7f94c5470287c8fd975b4d Signed-off-by: Tino Liu <tino.liu@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1333210 Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* cleanup: updating grunt & octopus style to matchJett Rink2018-11-142-13/+19
| | | | | | | | | | | | | | | | Making style of tcpc_alert_event method match the style of other ToT implementations. BRANCH=grunt BUG=none TEST=octopus pd still works. Change-Id: Id9132380a466b6e9580cff6d014f30e1c11de583 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1283453 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* usb-c: use higher priority task for interruptsJett Rink2018-11-1416-102/+134
| | | | | | | | | | | | | | | | | This should be the last step to make all boards on ToT follow go/usb-pd-slow-response-time. Theses boards all have the higher priority tasks, but they aren't being used since the tcpc interrupt wasn't scheduling calls on it. BRANCH=none BUG=b:112088135 TEST=builds Change-Id: I2c39e661e804f88edd5b34636b93e6e63a5af57f Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1283452 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* SN5S330: treat interrupts as level-sensitiveDiana Z2018-11-138-22/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | The SN5S330 PPC will pull its /INT pin low until all interrupts are cleared. Since the interrupt pin is treated as edge-sensitive, its handler needs to provide level-checking before exiting. Otherwise, if not all interrupts are cleared before the handler exits, the EC won't see another edge to call the handler again. Boards which share the PPC interrupt pin with other sources may choose to implement their own callback, if they are able to determine which chip was the source of the interrupt. BUG=b:118846062 BRANCH=None TEST=performed several power swaps and unplugs on a pair of Careenas, verifying that in instances where the handler had to loop around we correctly cleared the interrupts and the "ectool usbpdpower" output was normal Change-Id: Iccbe40976a746d109d67b9a91f8fbd81898f9b3f Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1327123 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
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