| Commit message (Collapse) | Author | Age | Files | Lines |
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This patch makes ectool check the address of comm_init_lpc and
comm_init_i2c before calling them.
Related bug:b/35571850
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/122478187
BRANCH=none
TEST=buildall
Change-Id: I32499174d7f82e45941cd97cf7780ea04517115f
Reviewed-on: https://chromium-review.googlesource.com/c/1414032
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
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This patch fixes the ec_readmem function pointer, which is currently
set to fake_readmem unconditionally.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/122568808
BRANCH=none
TEST=Verify 'ectool battery' runs successfully on Nami.
Change-Id: I2d57d0ca7103d9b9a1e44e685bc966d158a16a47
Reviewed-on: https://chromium-review.googlesource.com/c/1405068
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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The /dev/cros_ec interface has a built-in mutex, thus we do not
need to use /run/lock to arbitrate access since we can assume other
tools (mosys, flashrom) also use the dev interface.
$ generate_logs
...
feedback/cbi_info
...
$ cat feedback/cbi_info
[0]
As integer: 1 (0x1)
As binary: 01 02
[1]
As integer: 3 (0x3)
As binary: 03
[2]
As integer: 103 (0x67)
As binary: 67 3a
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=chromium:849399
BRANCH=none
TEST=Verify 'ectool version' runs on Nami. Verify lock is acquired
when '--interface=lpc' is specified. Verify debugd can run cbi_info.
Change-Id: Id94317472917a974218bb137bda11fe5618a4b88
Reviewed-on: https://chromium-review.googlesource.com/1393729
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
(cherry picked from commit aed008f87c3c880edecf7608ab24eaa4bee1bc46)
Reviewed-on: https://chromium-review.googlesource.com/c/1398342
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Instead, use the event flag.
BUG=b:73557414
BRANCH=scarlet,poppy
TEST=Compile.
Change-Id: Ic1b123edb6f67012f38b1022d492492175b5d59d
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1128551
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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We haven't need the OCM erase command for anlogix TCPCs for a while
since they are being shipped with the OCM pre-erased
BRANCH=octopus
BUG=b:109882250
TEST=buildall
Change-Id: Ic4d2fa1e40037e01d5ed03116e8ceb14840f0ea9
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1352057
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
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oem is also defined as a global in board.c. This removes a local
variable of the same name to avoid confusion.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=Verify LEDs' behavior doesn't change on Sona.
Change-Id: I5e4d2e44f8770d6cdbac368ce93b8a6a0a0af83b
Reviewed-on: https://chromium-review.googlesource.com/1354491
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Set the unused pins as input with an internal pull-up if there is no
external pull-up/pull-down. This helps save some power. Update the name
for CCD_MODE_EC_L pin. Add configuration for USB_C_OC and
TRACKPAD_INT_1V8_ODL pins.
BRANCH=None
BUG=b:110192175
TEST=make -j buildall && Bootup to chromeos. Also verified that power
stayed the same or slightly lower(18.67mW on PP3300_ec_mw to 18.23 mW over
10 sec average on Grabitter).
Change-Id: Icad1da2f76e119f2571769e3e953ff80c714817e
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1336733
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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According USB-PD spec ch.6.7.1, if transmitter sends
the repetitive message id packet, receiver does not respond
subsequent message(except softreset).
BRANCH=None
BUG=None
TEST=GRL USB-PD test
Change-Id: Ideea31cdf2e2d24dc70ac66f5cb830b4cb4b7d46
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/1309564
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Overly large sensor batches lead to timestamp synchronization
issues on Nocturne, causing - among others - CTS to sometimes
fail the sensor batching tests.
Reduce the size of the FIFO and restore the threshold to being
a third of the size. This value was changed in CL:1134494 in an
attempt to solve a problem which turned out to be unrelated.
BUG=b:117169255, b:73551961, b:120100420, b:120098451
BRANCH=nocturne
TEST=run CTS sensor test cases, observe them pass
Change-Id: Ia27bfe0a4756c22d4e48ba525d585ff11ab1cb63
Signed-off-by: Enrico Granata <egranata@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1354484
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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MODEL_ID is an optional field containing a numeric value identifying
models. Model IDs are unique within each OEM and <OEM_ID, MODEL_ID>
should form a unique ID within the family.
$ cbi-util create --file ~/cbi_image --board_version 0 --oem_id 6
--sku_id 255 --dram_part_num "012345679abcdef" --model_id 127 --size 256
$ hexdump -C /tmp/cbi.bin
0000 43 42 49 fa 00 00 26 00 00 01 00 01 01 06 02 01 |CBI...&.........|
0010 ff 05 01 7f 03 10 30 31 32 33 34 35 36 37 39 61 |......012345679a|
0020 62 63 64 65 66 00 ff ff ff ff ff ff ff ff ff ff |bcdef...........|
$ cbi-util show --file /tmp/cbi.bin
CBI image: /tmp/cbi.bin
TOTAL_SIZE: 38
Data Field: name: value (hex, tag, size)
BOARD_VERSION: 0 (0x0, 0, 1)
OEM_ID: 6 (0x6, 1, 1)
SKU_ID: 255 (0xff, 2, 1)
MODEL_ID: 127 (0x7f, 5, 1)
DRAM_PART_NUM: 012345679abcdef (3, 16)
Data validated successfully
localhost # ectool cbi set 5 127 1
localhost # ectool cbi get 5
As integer: 127 (0x7f)
As binary: 7f
> cbi
[1289.860454 CBI Reading board info]
CBI_VERSION: 0x0000
TOTAL_SIZE: 22
BOARD_VERSION: 513 (0x201)
OEM_ID: 3 (0x3)
MODEL_ID: 127 (0x7f)
SKU_ID: 14951 (0x3a67)
43 42 49 b0 00 00 16 00 00 02 01 02 01 01 03 02
02 67 3a 05 01 7f ff ff ff ff ff ff ff ff ff ff
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:119522898,b:120105950
BRANCH=none
TEST=See above.
Change-Id: Ifd6f3087f5422bcf4c36d3d981b262653d0c89dc
Reviewed-on: https://chromium-review.googlesource.com/1341099
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This patch just correct comments of base accel/gyro rotation reference
for SKU with AR Cam.
There is no behavior change.
BUG=none
BRANCH=none
TEST=make buildall pass
Change-Id: Ie9a72d7bafa2c225be939a8a55a95ced89680492
Signed-off-by: Tino Liu <tino.liu@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1351927
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Set the unused pins as input with an internal pull-up if there is no
external pull-up/pull-down. This helps save some power. Update the
name for CCD_MODE_EC_L pin. Add configuration for TRACKPAD_INT_1V8_ODL
pin.
BRANCH=None
BUG=b:110192175
TEST=make -j buildall && Bootup to chromeos. Also verified that power
stayed the same or slightly lower(6.63mW on PP3300_ec_mw to 6.57 mW over
10 sec average on Phaser360).
Change-Id: I181bd718eb1d7915593e2185813590395fbea048
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1336732
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Set the unused pins as input with an internal pull-up if there is no
external pull-up/pull-down. This helps save some power.
BRANCH=None
BUG=b:110192175
TEST=make -j buildall && Bootup to chromeos. Also verified that power
stayed the same or slightly lower(5.51mW on PP3300_ec_mw to 5.51 mW over
10 sec average on Meep).
Change-Id: Ibebaf5362424fcb3d5d8e4c0e3de08d24fae6e28
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1336731
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Set the unused pins as input with an internal pull-up. This helps save
some power. Update the name for the CCD_MODE_EC_L pin. Add configuration
for USB_C_OC & TRACKPAD_INT_1V8_ODL pins.
BRANCH=None
BUG=b:110192175
TEST=make -j buildall && Bootup to chromeos. Also verified that power
stayed the same or slightly lower(5.28mW on PP3300_ec_mw to 5.27 mW over
10 sec average on Bobba360).
Change-Id: I8e38004411b86e8d584fbca340f257a1e9692283
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1336730
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This change adds support for host to configure the tablet mode
threshold angle and hysteresis degree using a new motionsense command
MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. Additionally, the EC sets a new
feature bit to indicate support for this refined tablet mode
detection. This feature bit can be used by kernel to expose an
inclinometer device which can eventually help remove the redundant lid
angle calculation in Chrome.
BUG=b:120050761
BRANCH=octopus
TEST=make -j buildall. Additionally, verified that tablet mode lid
angle can be configured by host using ectool. Also, feature flag is
correctly set to indicate support for this feature.
Change-Id: I51bd160bbfae02d899bdf63096618c13eb5800e8
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1351518
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This change aligns tablet mode detection in EC to match the behavior
of Chrome. When lid angle goes beyond 200 degree, tablet mode is set
to 1. On the other hand, tablet mode is set to 0 when lid angle goes
below 160 degree.
BUG=b:120050761
BRANCH=None
TEST=make -j buildall. Verified that EC reports tablet mode close to 180
degrees.
Change-Id: If20a8e7545683b2a01f401f7db8d7973e70deb14
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1350472
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This change updates motion_lid driver to use CONFIG_TABLET_MODE to
decide if device requires reporting of tablet mode. This basically
makes the config options CONFIG_LID_ANGLE_INVALID_CHECK and
CONFIG_LID_ANGLE_TABLET_MODE obsolete. Now that EC will always report
tablet mode aligned with Chrome (at 180 degree), any device that
supports tablet mode and uses motion lid driver will require this by
default and should not require boards to individually select any
special config options. Thus, it also gets rid of unused
CONFIG_LID_ANGLE_TABLET_MODE and CONFIG_LID_ANGLE_INVALID_CHECK.
BUG=b:120050761
BRANCH=octopus
TEST=make -j buildall
Change-Id: Ib73af66ca1c17d4033cf54f0b4b86bf41793f3a3
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1350470
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This change performs the following renaming:
1. CONFIG_TABLET_SWITCH -> CONFIG_HALL_SENSOR
Indicates if a device has hall sensor
2. TABLET_MODE_GPIO_L -> HALL_SENSOR_GPIO_L
Provides the interrupt line from hall sensor to EC.
3. tablet_mode_isr -> hall_sensor_isr
Interrupt routine that gets control on hall sensor interrupt.
4. tablet_mode_init -> hall_sensor_init
Init routine for initializing hall sensor interrupt.
5. tablet_switch_disable -> hall_sensor_disable
Disable hall sensor interrupt and tablet mode sub-system.
This is done to separate hall sensor interrupt from tablet mode
handling. It is another step towards aligning tablet mode detection on
EC with Chrome. Hall sensor interrupt occurs when the lid is in
360-degree flipped mode. If tablet mode is not already triggered by
lid motion driver, then hall_sensor_isr will set tablet mode and take
necessary actions to disable input peripherals.
CQ-DEPEND=CL:1351518
BUG=b:120050761
BRANCH=octopus
TEST=make -j buildall
Change-Id: I5841f6875d538a624cb888bc048f252397ab457c
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1350469
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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On all platforms where there is a GPIO interrupt line between EC and AP
for MKBP events, the EC will keep the interrupt pin set as long as there
are events to be served, but the AP will need to re-enter its IRQ handler
once per event in order to serve all the events in the FIFO.
This commit adds a version 2 of EC_CMD_GET_NEXT_EVENT, such that the EC
will use the most-significant bit of the event type to record the fact
that the EC has more events available. This, in turn, enables the AP to
keep its interrupt handler thread awake and loop until all events
are served.
Since it uses a new command version, this change is forward and backward
compatible:
- new EC, old kernel: the old kernel will use the V1 command
and never see the flag
- new kernel, old EC: the old EC will not accept the V2 command
and never send the flag
BUG=b:119570064
TEST=patched Linux kernel can see and use the flag on nocturne
BRANCH=nocturne
Change-Id: I5bae7fdc85efcd26f7bdebcd31a7f27ecf570d88
Signed-off-by: Enrico Granata <egranata@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1341159
Commit-Ready: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This CL includes:
1. add CHIP_VARIANT_NPCX7M6FC in the npcx chip configuration files to
define what (RAM, features...) is supported in npcx7m6fc.
2. add the chip id and chip revision id of npcx7m6fc.
BRANCH=none
BUG=none
TEST=No build errors for make buildall.
TEST=Change CHIP_VARIANT to npcx7m6fc in board/npcx7_evb/build.mk;
flash image in the internal testing board of npcx7m6fc; make sure the
EC can boot up. Check the chip ID and chip revision ID are correct by
console command "version".
TEST=build and flash the yorp image to the platform; make sure no issues
are found.
Change-Id: Ibcb25fc09b21ec3e5738418af16826035ec81e69
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/1343639
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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No functional changes. Update names to BOARD_ID=2 version of the
schematics.
BRANCH=none
BUG=none
TEST=builds
Change-Id: I05d49aa436e9d08c0f61da3de7032c2875b3054c
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1332467
Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Some versions of some boards keep the port 0 PPC powered on while
the EC hibernates (so Closed Case Debugging keeps working).
Make sure the source FET is off and turn on the sink FET, so that
plugging in AC will wake the EC. This matches the dead-battery
behavior of the powered off PPC.
BUG=b:119850162,b:113654692
BRANCH=grunt
TEST=1) "ectool reboot_ec hibernate", wake on port 0 AC.
2) AP in S0, sink in port 0, EC console: "hibernate", unplug sink,
wake on port 0 AC.
Change-Id: I4dd7ebe5408bbb2d4c92da1a44ea8b4152dbb7da
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1352059
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This patch make cbi-util and ectool show OEM_NAME and DRAM_PART_NUM
take a string parameter.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:118798180
BRANCH=none
TEST=buildall
Change-Id: I7b4e126f02f9488ce6059c090a5f3ec665b39406
Reviewed-on: https://chromium-review.googlesource.com/1323852
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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switch Blue and Amber GPIO by different board for power consumption.
BUG=b:118657568
BRANCH=master
TEST=`make board=aleena`
Signed-off-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com>
Change-Id: Ib782397082f2efc799422db8bf0e2d637db1b32f
Reviewed-on: https://chromium-review.googlesource.com/1345550
Commit-Ready: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
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Initial image for casta based on the most recent schematics available.
BUG=b:119174492
BRANCH=octopus
TEST=builds
Change-Id: Ie0575476d79fd8f6c5f697499bc8a660880348e3
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1347011
Reviewed-by: Jett Rink <jettrink@chromium.org>
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with keypad
BUG=b:119798830
BRANCH=firmware-nami-10775.B
TEST=Use ksstate console to check it can show the right point
for the "Search" key after pressing the key.
Change-Id: I068b629d962a3f9ebf70ef9785610bc9fc424696
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1352064
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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motion_lid_set_tablet_mode accepts reliable as its input parameter and
returns back the param value without any change. Effectively, the
return value doesn't change anything. This change gets rid of the
return value for motion_lid_set_tablet_mode.
BUG=None
BRANCH=None
TEST=make -j buildall
Change-Id: I0f379d9148131d9dcb1d3f53a1db08d3ef72831f
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1341161
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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On plug DP dongle, we sohuld:
1. set USB_C0_DP_POLARITY bit accordingly
2. set USB_C0_DP_OE_L low
3. set USB_C0_HPD_OD high
On unplug DP dongle, we should:
1. set USB_C0_DP_OE_L high
2. set USB_C0_HPD_OD low
TEST=pd 0 dualrole on; plug DP dongle, see GPIO pins set accordingly.
TEST=unplug DP dongle, see GPIO pins set accordingly.
TEST=plug dp and seeing output to external display for both polarity.
BUG=b:114162810
BRANCH=None
Change-Id: I4e4755e3b757d25a081fd65f8eb68235766d6e0b
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1221406
Commit-Ready: Yilun Lin <yllin@chromium.org>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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This is so that U2F registrations are invalidated after
the device goes through powerwash.
TEST=test_that <..> firmware_Cr50U2fPowerwash, manual tests
BRANCH=none
BUG=b:112604850
Change-Id: I94257ec71adc7d49dcb676f0b1dc9aa1151116bd
Signed-off-by: Louis Collard <louiscollard@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1308238
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
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This is to be used initially by U2F, to store an additional salt
that can be cleared on powerwash.
CQ-DEPEND=CL:1264316
TEST=manual tests, test_that <..> firmware_Cr50U2fPowerwash
BRANCH=none
BUG=b:112604850
Signed-off-by: Louis Collard <louiscollard@chromium.org>
Change-Id: I77d19bd27011fa732419993d8019a60647b70221
Reviewed-on: https://chromium-review.googlesource.com/1264395
Reviewed-by: Andrey Pronin <apronin@chromium.org>
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GPIO pins don't get set high or low after sysjump. This cause
CEC not to work if RO image doesn't set CEC_GPIO_PULL_UP.
This patch sets CEC_GPIO_PULL_UP to high in cec_init.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:119901859
BRANCH=none
TEST=Verify CEC_PULL_UP=1 on Teemo in normal mode and recovery mode.
Change-Id: I0c88a789a8731054c2e4b0bb1066529933473b70
Reviewed-on: https://chromium-review.googlesource.com/c/1346990
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Stefan Adolfsson <sadolfsson@chromium.org>
(cherry picked from commit 258e4a3d2c89cbf1f81e384bc179cb748611f24e)
Reviewed-on: https://chromium-review.googlesource.com/1347013
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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The resulting binary shouldn't depend on the user or hostname,
at least when the user explicitly asks for reproducible builds.
Change-Id: I95604cfd93028b8d60e11550d4322424088f425f
Signed-off-by: Nico Huber <nico.h@gmx.de>
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1341410
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
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SW short protect current.
The default values of Vconn SW protection time of inrush current is 19us and power SW short protect current is 370mA, it finds that the current of Vconn will up to 656mA during press F3+power
button with Huawei dongle plugged in MB, then Vconn will drop when the large current happen. Vendor suggest to adjust Vconn SW protection time of inrush current(modify register 0xAA from 19us to
2.43ms) and power SW short protect current(modify register 0xA8 from 370mA to 440mA).
BUG=b:119540455
BRANCH=none
TEST=The HDMI display well with Huawei dongle at MB side when pressing F3+ power button to reboot OS.
Change-Id: Ibb7e602fc4a4aa9cb69231a7f199f4ea31265148
Reviewed-on: https://chromium-review.googlesource.com/1343643
Commit-Ready: Xiong Huang <xiong.huang@bitland.corp-partner.google.com>
Tested-by: Xiong Huang <xiong.huang@bitland.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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The factory mode is indicated by blue on for 2sec & amber on for 2sec.
BUG=none
BRANCH=firmware-nami-10775.B
TEST=Check charge led is blue on 2sec Amber on 2sec when factory testing
Change-Id: Ifc3786151ccef29e709587f8f5b3d3306a6b344f
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1351512
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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BUG=b:119842039
BRANCH=none
TEST=check the led behavior
Change-Id: Ieb684f7a3d38e3b36aab9bcf27cbc823b5a7df82
Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1345791
Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com>
Tested-by: James Chao <james_chao@asus.corp-partner.google.com>
Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Fix the workaround of ECC key generation.
The workaround crrev.com/c/360441 for b/35576109 use a wrong EK
template to generate the hash (object name of publicArea), and
the format of that embedded hash is incorrect either.
BRANCH=none
BUG=b:35576109,b:80207339
TEST=Dump the EK seed from CR50 and verify the public and private
key are matched in both cr50-side (also checked returned value of
CreatePrimary) and factory-side.
Change-Id: Ia53084757d9d848fd92e6ca309de83450cb64309
Signed-off-by: Meng-Huan Yu <menghuan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1329261
Reviewed-by: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
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If HAS_TASK_CHIPSET is not defined, common/power.c is not compiled.
So provide a default implementation which indicates the chipset
is always off.
BUG=b:119846880
BRANCH=scarlet
TEST=emerge-scarlet chromeos-ec
Change-Id: Ieb123bb27f088b3ec6b138b56db39a0d46016718
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1346989
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Enable NPCX to deep sleep when idle to save power.
BUG=b:119879261
BRANCH=grunt
TEST=pp3300_ec_a_mw on Careena reduced by 19 in S0 and 14 in S3
> idlestats
Num idle calls that sleep: 136585
Num idle calls that deep-sleep: 9874
Time spent in deep-sleep: 824.368551s
Total time on: 884.911062s
Change-Id: I2cf515dc3ad983ecb1f6108f48bb5a51c5d7044b
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1347014
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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add IRQ to vector entry for doorbell busy bit clear interrupt.
BUG=b:79676054
BRANCH=none
TEST=tested on Atlas board
Change-Id: I3c168326b8c7e300eac0f80f828bcadf1585e54d
Reviewed-on: https://chromium-review.googlesource.com/1288033
Commit-Ready: Caveh Jalali <caveh@google.com>
Tested-by: Caveh Jalali <caveh@google.com>
Tested-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Reviewed-by: Caveh Jalali <caveh@google.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
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send Host Command FW ready notification to host driver.
BUG=b:79676054
BRANCH=none
TEST=tested on Atlas board
Change-Id: I5148351d91151e964561c821c02634bd32163dfd
Reviewed-on: https://chromium-review.googlesource.com/1297031
Commit-Ready: Caveh Jalali <caveh@google.com>
Tested-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Reviewed-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
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remove sending MNG_HC_FW_READY from task.
the sending MNG_HC_FW_READY should be done by
IPC task that supports Host Command.
BUG=b:79676054
BRANCH=none
TEST=tested on Atlas board
Change-Id: Iea2d2864c67763c8c8e18b520c5a776b5ce469fb
Reviewed-on: https://chromium-review.googlesource.com/1288032
Commit-Ready: Caveh Jalali <caveh@google.com>
Tested-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Reviewed-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
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According to section 6.8.2 of the PD spec, during hard reset it is
required that the sink cease sourcing Vconn, and that the source turn
Vconn off and back on (specific timing for the source can be found in
section 7.1.5).
BRANCH=None
BUG=b:119540455,b:119742692,b:116764439
TEST=set up a hub which requires Vconn on bobba, ran EC reset and
verified that after the port hard reset the EC was sourcing Vconn
Change-Id: I9c4c89e46b2b32d658ce2eaae4a6b23fd465c406
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1344793
Reviewed-by: Edward Hill <ecgh@chromium.org>
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BUG=b:118756407
BRANCH=none
TEST=accelinfo on
Change-Id: I3e9f1791a12e5cb63572b1d50435b4e7a42b7ccd
Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1343641
Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com>
Tested-by: James Chao <james_chao@asus.corp-partner.google.com>
Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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The CONFIG_FLASH_NVMEM_VARS_USER_NUM constant was incorrectly defined,
so nvmem_vars was failing with EC_OVERFLOW.
BRANCH=None
BUG=None
TEST=make -j buildfuzztests && ./build/host/cr50_fuzz/cr50_fuzz.exe
Change-Id: I52facfd44423bb69284b54e6831e5e777cf35a05
Signed-off-by: Allen Webb <allenwebb@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1344800
Reviewed-by: Manoj Gupta <manojgupta@chromium.org>
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Liara only has a single LED on one side, and it should show only the
charge state (instead of including chipset state and low battery state
as well).
Change from CONFIG_LED_PWM_ACTIVE_CHARGE_PORT_ONLY to use the newly
added CONFIG_LED_PWM_CHARGE_STATE_ONLY.
BUG=b:119746227
BRANCH=grunt
TEST=Liara LED is on when charging from either side.
Change-Id: If71339be836037a88eb17933ba1a817bd10d5002
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1344796
Tested-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Add an option for devices that want to show only the charging state,
but on all LEDs.
BUG=b:119746227
BRANCH=grunt
TEST=Liara LED is on when charging from either side.
Change-Id: I819eaf27d3700748e47886855765c2da6f3d9eb8
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1344795
Tested-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Atlas is migrated from Host Command to HECI protocol.
Remove Host Command task and old ipc task.
BUG=b:79676054
TEST=none
Change-Id: Ic77b1d16de7772a1c69cba6fcf5d7d7849a06213
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1263897
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
Reviewed-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
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Remove flag related to IPC interface & Host command protocol
to add new IPC & HECI protocol
BUG=b:79676054
TEST=none
Change-Id: I4707e2845c38a4d86ab8bffad93f7024fa9e5eb5
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1263896
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
Reviewed-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
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IPC/HECI will shares same channels as LPC.
BRANCH=b:79676054
TEST=none
Change-Id: I2c423107df1fa7c7ab8084aa543519b0c9054e1d
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1263895
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
Reviewed-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
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Currently, the pd_task will send source capability messages every time
the task wakes while in PD_STATE_SRC_DISCOVERY. This can cause the task
to violate the required 100-200 ms gap between sending source
capabilities during source advertisement, and in a worst case it will
give up sending source cabilities well before it should.
With this change, the task should send a source capability message
almost exactly every 100ms while in PD_STATE_SRC_DISCOVERY.
BRANCH=None
BUG=b:117788783
TEST=plugged hoho into bobba360 and phaser repeatedly with no hard
resets during initial connection
Change-Id: Id968921e0b0ea874bf7361849c22354804b5b9ca
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1340546
Reviewed-by: Jett Rink <jettrink@chromium.org>
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