summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeFilesLines
* power/mt8183: Obey ap-off reset flag if PMIC is already upstabilize-11217.BNicolas Boichat2018-11-011-1/+7
| | | | | | | | | | | | | | | | | On startup, we need to start from POWER_S5 if the PMIC is already up. However, if the ap-off reset flag is set, we need to make sure that we transition to G3 (and not to S3->S0). BRANCH=none BUG=b:118090373 TEST=reboot ap-off in S0/G3 works fine (AP does not boot). TEST=AP initiated reboot works fine (AP boots up) TEST=EC initiated reboot without ap-off works fine (AP boots up) Change-Id: I515f8f947bfb6b1ef45f1c2ceb7b9d9e0a324c78 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1309435 Reviewed-by: Yilun Lin <yllin@chromium.org>
* Bobba: Modify base accel/gyro rotation for SKU with AR Cam.Tino Liu2018-11-011-0/+28
| | | | | | | | | | | | | | | | | Sparky360 with SKU ID 26 has AR Cam, and move base accel/gryo to AR Cam board. AR Cam board has about -16 bias with motherboard through Y axis. Modify base accel/gyro rotation reference for SKU with AR Cam. BUG=b:118646061 BRANCH=none TEST=compile pass, `ectool motionsense lid_angle` shows correct, factory testing ScreenRotation & TabletRotationBaseAccel test passed Change-Id: Ie2c2d2faa9cd562f5807eb31b1fc92f3fc792e74 Signed-off-by: Tino Liu <tino.liu@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1304156 Reviewed-by: Diana Z <dzigterman@chromium.org>
* iteflash: Be more consistent with blank lines and static functions.Matthew Blecker2018-11-011-40/+29
| | | | | | | | | | | | | This is no-op cleanup. BRANCH=none BUG=b:79684405 TEST=With Servo v2 "flash_ec --board=bip" continues to work. Change-Id: I0131bd3f766c574a43e692ffd9a9ef842e4be2df Signed-off-by: Matthew Blecker <matthewb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1311758 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* rammus: Correct accel sensor BMI160 base reference dependent on sensor location.michael_chen2018-10-311-2/+2
| | | | | | | | | | | | | | | | | | | | Base on BMI160 location, the x axis is positive correlation and the y, z axis negative correlation. Correct the MB base reference direction. BUG=b:118362153 BRANCH=ToT TEST=Manual 1. Using EC console command "accelinfo on" the check the Base Accel x, y, z value. 2. Run factory tool to verify. Change-Id: I5c7968e9294b2fca511808d30aad3a99d524643f Signed-off-by: michael_chen <michael5_chen@pegatroncorp.com> Reviewed-on: https://chromium-review.googlesource.com/1307273 Commit-Ready: michael chen <michael5_chen@pegatroncorp.com> Tested-by: michael chen <michael5_chen@pegatroncorp.com> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
* config: add flag for ITE EC programming over CCDVadim Bendebury2018-10-311-0/+2
| | | | | | | | | | | | | | This flag will allow to enable inclusion of the relevant source files in common directories. BRANCH=none BUG=b:75976718 TEST=none Change-Id: I037f811d0b8fd7327534f02f759eead3fd8f3de0 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1305115 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* meep: fix sensor data and accel orientationDevin Lu2018-10-311-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix the lid and base accel orientation for EVT and change range value to 2g. BUG=none BRANCH=none TEST=When device is laying on a table, lid angle at 180, both sensors report gravity along Z axis: ectool motionsense Motion sensing active Sensor 0: 507 606 16748 Sensor 1: 17 -334 16442 Sensor 2: 0 0 0 Sensor 3: 0 0 0 When on the base bottom edge, report gravity along Y axis: ectool motionsense Motion sensing active Sensor 0: 403 16491 655 Sensor 1: 19 16163 1540 Sensor 2: 0 0 0 Sensor 3: 0 0 0 When on its left side, report gravity along X axis: ectool motionsense Motion sensing active Sensor 0: 16172 -374 1738 Sensor 1: 16315 -184 1280 Sensor 2: 0 0 0 Sensor 3: 0 0 0 and check the screen rotation was normally. Change-Id: Ic594c12fa4b03b594151eed4ffb0f0e5b42cad3d Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/1307282 Reviewed-by: Justin TerAvest <teravest@chromium.org>
* meep: enable keyboard factory scanningDevin Lu2018-10-312-0/+25
| | | | | | | | | | | | | This patch add for factory keyboard connector test. BUG=none BRANCH=none TEST=Short keyboard pins and make sure "ectool kbfactorytest" works. Change-Id: Ic343b99343f5f6d7a8967bf1c4bec642638d8568 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/1309572 Reviewed-by: Justin TerAvest <teravest@chromium.org>
* Ampton: add initial motion sensor codeDiana Z2018-10-313-3/+183
| | | | | | | | | | | | | | | | Adds initial motion sensor code for ampton and apel, based on the code for similar boards. Sensors will only be present on ampton SKUs (currently numbered 1 and 2). BRANCH=None BUG=b:115501243 TEST=builds Change-Id: I61de2ec824df27b2944dd291c0e3bdbdae13a04b Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1310094 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* Nami: Add keymasks for page-up/down, home, end, deleteDaisuke Nojiri2018-10-311-21/+24
| | | | | | | | | | | | | | Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:117126568 BRANCH=none TEST=Verified all keys on keypad work as expected. Change-Id: If23b422c1260b8437c59fd13a9280e8d6e87f94b Reviewed-on: https://chromium-review.googlesource.com/1311374 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cheza: Remove the internal PU for UART pinsWai-Hong Tam2018-10-311-1/+1
| | | | | | | | | | | | | | | | | | It is not needed; otherwise, it pulls the UART_DB_TX_EC_RX to 1.8V and and may affect cr50 servo detection. BRANCH=none BUG=b:117296184 TEST=Measured the voltage level of UART_DBG_TX_EC_RX. When servo plugged and CCD unplugged, it shows 3.3V. When servo unplugged and CCD unplugged, it shows 0V (was 1.8V). When servo unplugged and CCD plugged, it shows 3.3V. EC console works over either servo and CCD. Change-Id: Ie81d1de0075ea1b2409131471fe8571b5bfdccd1 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1302839 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* cheza: Update battery infoWai-Hong Tam2018-10-311-3/+2
| | | | | | | | | | | | | The min voltage is 6V according to the spec. BRANCH=none BUG=b:74397611 TEST=Tested charge and discharge. Change-Id: Icf82e7299dbe3175c5b4dbe824108f11888c2ff5 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1299713 Reviewed-by: Philip Chen <philipchen@chromium.org>
* cheza: Add internal PU for GPIO USB_C1_OC_ODLWai-Hong Tam2018-10-311-1/+1
| | | | | | | | | | | | | This is an open-drain output from NX5P3290. Need an internal PU in EC. BRANCH=none BUG=b:118342484 TEST=Ran EC command "gpioget USB_C1_OC_ODL" and checked it high. Change-Id: I1e38b9c64a163740c65256fbf551ac28feaade49 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1298368 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Delan: LED Color Changekoko2018-10-313-14/+14
| | | | | | | | | | | | | | | Changing Delan led color from blue to white BUG=b:118418060 BRANCH=none TEST=none Change-Id: I41dbf9df8798c2fd69b328eed690fe43167654d0 Signed-off-by: koko <ko_ko@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1304157 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* cheza: Configure GPIO RCAM_VSYNC to operate at 1.8VWai-Hong Tam2018-10-311-1/+1
| | | | | | | | | | | | | | This GPIO is connected to 1.8V devices (AP GPIO and camera connector). BRANCH=none BUG=b:118342270 TEST=Checked the schematic. Can't verify on real hardware, camera stack not ready yet. Change-Id: Ic3a61e680d0982b956d986505c5f2d44fe270131 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1298367 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* cheza: Remove the unnecessary GPIO_SEL_1P8V flagsWai-Hong Tam2018-10-311-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | The GPIOs which are powered by VHIF/VSPI are already operating at 1.8V. Don't need to configure them. Powered by VHIF: GPIO54: POWER_GOOD GPIO53: SHI_CS_L GPIO57: AP_SUSPEND_L Powered by VSPI: GPIOA0: USB_C0_PD_INT_ODL GPIOA2: EC_INT_L BRANCH=none BUG=b:118336977 TEST=Verified AP power-on and power-off sequence, host command, port-0 plug and unplug for PD communication. Change-Id: I6369a6d8d343e4d8d5c33fef0f971e5cb09622ec Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1298366 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* cheza: Do S0->S5->S0 transition after warm_reset-toggling finishedWai-Hong Tam2018-10-311-10/+26
| | | | | | | | | | | | | | | | | | The warm_reset is used for programming the AP SPI flash. This signal is async that the SPMI transaction between PMIC and AP may get wedged. So after the warm_reset-toggling is finished, should cold- reset PMIC and AP to get a clean state. BRANCH=None BUG=b:112723105, b:112564635 TEST=Toggled the warm_reset on different cases, e.g. S5, S0, coreboot, userspace, etc., and checked the AP reboot as expected, expected S5. Change-Id: I8d5e8690f5a6387d43f79718a8e68b2c810f4d26 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1285289 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* util: add isupper() library functionDino Li2018-10-312-0/+6
| | | | | | | | | | | | | This function checks whether a character is an uppercase alphabet or not. BRANCH=none BUG=none TEST=The return value is non-zero if argument is an uppercase alphabet. Change-Id: I8c7be3f8852be103b8f853caa426de7843c4ee40 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/1307280 Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
* nds32: Add 64-bit divide library routines for N8 CPUDino Li2018-10-313-0/+388
| | | | | | | | | | | | | | | | | Taken from NDS32 CPU's library routines. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=b:115501243 TEST=Add a debug console command to see if 64-bit division works as expected. Change-Id: I3ba47a24a1bb60fd7fb57321b177e603a0e7712b Reviewed-on: https://chromium-review.googlesource.com/1296430 Commit-Ready: Dino Li <Dino.Li@ite.com.tw> Tested-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
* octopus: disable verbose EC logging of host commandsEnrico Granata2018-10-301-0/+8
| | | | | | | | | | | | | | | | | | Once the sensors are enabled, the default logging mode of the EC is extremely verbose. Tune this down by removing the logging statements at every host command. BRANCH=none TEST=observe fewer log messages coming in BUG=b:118443377, crbug:896347 Change-Id: Ib93f9280b8f70a8ecdc53621c4364173c77efed6 Signed-off-by: Enrico Granata <egranata@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1302293 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* gsctool: Add options to print out RLZ codesBob Moragues2018-10-301-4/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This RLZ code is used by cr50-verify-ro.sh. The RLZ code selects the verify_ro db to use. BUG=b:90495590 BRANCH=none TEST=gsctool -i -M; gsctool -i -M -t Unit Test Rewults: localhost ~ # gsctool -i -M open_device 18d1:5014 found interface 3 endpoint 4, chunk_len 64 READY ------- BID_TYPE=4e425153 BID_TYPE_INV=b1bdaeac BID_FLAGS=00007f7f BID_RLZ=NBQS <-- CORRECT DUT RLZ localhost ~ # gsctool -i -M -t BID_TYPE=58574a45 BID_TYPE_INV=a7a8b5ba BID_FLAGS=00007f7f BID_RLZ=XWJE <-- CORRECT Test Device RLZ localhost ~ # Change-Id: I12fbca6885e3a1453544a1d379ad12ef3f6fd290 Signed-off-by: Bob Moragues <moragues@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1297034 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Nick Sanders <nsanders@chromium.org>
* kukui/emmc: Share EXTI15 interrupt between SPI and eMMCNicolas Boichat2018-10-303-33/+53
| | | | | | | | | | | | | | | | | | | | | | | | We never need to have interrupts enabled on both SPI1_NSS and EMMC_CMD, so we can actually share the interrupt selection EXTI15 between the 2 pins. This frees up PA14 (and EXTI14) for future interrupt needs. To make sure that we can answer host commands as soon as the AP as booted, we quickly poll for the eMMC bootblock switch to turn away from EC, and switch interrupt from eMMC to SPI. Also, we clear exit_events in chip/stm32/gpio.c, so that we do not report a override warning if we disable then re-enable another interrupt on the same EXTI. BRANCH=none BUG=b:113370127 TEST=Boot kukui rev1, check that EC commands works after boot Change-Id: Ib1f0a56a9f37e1bda01dc4e6b55734196bb3ff50 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1195345 Reviewed-by: Yilun Lin <yllin@chromium.org>
* octopus: update active_mask for consistencyJett Rink2018-10-304-13/+13
| | | | | | | | | | | | | | | | | The base gyro and base accel are the same chip and they are on in S3 and S0 and off in S5. Update the active_make for all other octopus boards that haven't already updated it. BRANCH=none BUG=none TEST=build and sensors still work. Change-Id: I96004ba0b20dd9366848bb2fe610c250e07850aa Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1302833 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Octopus: Prevent possible i2c_unwedge watchdog reset in S5Diana Z2018-10-302-0/+10
| | | | | | | | | | | | | | | | | | | | When the system enters S5 and the motion_sensor_task was just about to gather data from its sensors, we can hit a scenario where the attempts to unwedge the I2C bus cause the EC to hit a watchdog reset. This change adds the configuration option to indicate that the sensors are unpowered in S5/G3, and therefore the low SCL line is expected. BRANCH=None BUG=b:116774375 TEST=Added sleep to motion_sensor_task to increase the probability of hitting this timing window, confirmed this change triggered the not powered check instead of attempting an unwedge Change-Id: I126a096afde24d0823e6d4fce7e0da3059b421f5 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1305121 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* Kalista: Update baseboard directoryDaisuke Nojiri2018-10-304-360/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates Kalista as follows: - Update BJ adapter list and current limit handling - Remove unused code (mostly for Proto Fizz) - Remove unused fan configurations - Change CBI field sizes (board version:1, OEM:1, SKU:4) - Update I2C port map: charger -> backlight - Simplify board_set_active_charge_port This patch updates GPIO list as follows: - Use GPIO34 for current limit control (and remove 33 and 34) - Remove ADP_IN_L (Power source is only BJ) - Remove AC_JACK_CHARGE (Power source is only BJ) Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:111571989 BRANCH=none TEST=build karma Change-Id: I2af208df28d6e7b3472eeb8929d055b93b661af8 Reviewed-on: https://chromium-review.googlesource.com/1298318 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
* npcx: gpio: fix bugs of low voltage level selectionCHLin2018-10-302-14/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL fixed the following bugs of low voltage support of GPIO: 1. fix the mismatch issue of low voltage support GPIOs when the mask passed to gpio_low_voltage_level_sel() has multiple bits set. (see more detail in the bug:118443060.) The idea is to create a new function gpio_low_vol_sel_by_mask() to iterate the match for each bit set in the mask. i.e. while (lv_mask) { bit = get_next_bit(&lv_mask); gpio_low_voltage_level_sel(p, bit, low_vol); }; The second parameter of gpio_match()/gpio_low_voltage_level_sel is also changed from "mask" to "bit" because of above modification. 2. It was observed that there are some errors of the low level mapping table because the older datasheet we used to develop the driver is not correct. After checking the latest datasheets of all EC sku, the low level table should have the following modification: - GPIO65 cannot support low level and should be removed. - GPIO86 can support low level in all EC skus. BRANCH=none BUG=b:118443060 TEST=Add GPIO_SEL_1P8V flag in the ALTERNATE macros which have multiple bits set in the mask field in npcx7_evb board. Flash the image and make sure the warning message doesn't print and the related low level bits are set. Change-Id: I7aa23eb42dda178db34fe44a663df29757910a55 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/1301674 Commit-Ready: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* dptf: Get rid of CONFIG_DPTF_DEVICE_ORIENTATIONFurquan Shaikh2018-10-3014-18/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_DPTF_DEVICE_ORIENTATION was added to indicate mode change to the host to allow it to read the tablet mode flag from shared EC memory and select the right DPTF table to load (if supported). However, this config seems unnecessary because of the following reasons: 1. Host sets SCI mask to indicate to the EC which events it wants to process. Thus, even if the EC sets mode change flag, it will not be notified to the host unless it supports mode change event. 2. Additionally, if host supports mode change event, but does not support multiple DPTF tables, then EC ACPI code takes care of ensuring that there is a thermal event handler present to reload tables. 3. CONFIG_DPTF_DEVICE_ORIENTATION was defined for almost all new x86 boards. BUG=b:117844490 BRANCH=None TEST=make -j buildall Change-Id: Ic4097ae047e2d559673a321da4df86514f902993 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1292359 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* usb_i2c: add error value for unsupported commandVadim Bendebury2018-10-301-0/+1
| | | | | | | | | | | | | | | | The recently added ability to allow device specific commands over i2c does not allow to return an error value indicating that a command is not supported. This patch adds a value for it. BRANCH=none BUG=b:75976718 TEST=verified when compiled with the rest of the patches enabling iteflash over Cr50. Change-Id: I9ce6c981c5325026f334d58c56a924e490ca55e4 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1305114 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* npcx: add console command to better investigate power consumption of GPIOsCHLin2018-10-301-0/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL adds the console command to disable the input buffer of non-I2C and non-ISR GPIOs which are configured as either input or open-drain. The GPIOs set as 1.8V are also ignored because they are already disabled in the gpio_pre_init. Usage: 1. type "gpiodisable next" to disable the input buffer of next GPIO wihch is either input or open drain in the gpio list. (if the next one is I2C or 1.8V or ((!input) && (!open-drain)), it will ignore it and check the following next one). Ex: > gpiodisable next current GPIO : 16 LID_ACCEL_INT_L --> Ignore 1v8 pin! current GPIO : 17 PLT_RST_L --> Disable WKINEN! > gpiodisable next current GPIO : 18 SYS_RESET_L --> Disable WKINEN! > gpiodisable next current GPIO : 19 ENTERING_RW --> Not Input or OpenDrain current GPIO : 20 PCH_WAKE_L --> Disable WKINEN! ......... ......... > gpiodisable next current GPIO : 34 I2C0_SCL --> Ignore I2C pin! current GPIO : 35 I2C0_SDA --> Ignore I2C pin! current GPIO : 36 I2C1_SCL --> Ignore I2C pin! current GPIO : 37 I2C1_SDA --> Ignore I2C pin! current GPIO : 38 I2C2_SCL --> Ignore I2C pin! current GPIO : 39 I2C2_SDA --> Ignore I2C pin! current GPIO : 40 I2C3_SCL --> Ignore I2C pin! current GPIO : 41 I2C3_SDA --> Ignore I2C pin! current GPIO : 42 I2C4_SCL --> Ignore I2C pin! current GPIO : 43 I2C4_SDA --> Ignore I2C pin! current GPIO : 44 I2C7_SCL --> Ignore I2C pin! current GPIO : 45 I2C7_SDA --> Ignore I2C pin! current GPIO : 46 EN_USB_A0_5V --> Not Input or OpenDrain current GPIO : 47 EN_USB_A1_5V --> Not Input or OpenDrain current GPIO : 48 USB_A0_CHARGE_EN_L --> Not Input or OpenDrain current GPIO : 49 USB_A1_CHARGE_EN_L --> Not Input or OpenDrain current GPIO : 50 USB_C0_BC12_VBUS_ON --> Not Input or OpenDrain current GPIO : 51 USB_C0_BC12_CHG_DET_L --> Disable WKINEN! 2. Enable/Disable a specific GPIO's input buffer by "gpiodisable ${GPIO_NUM_IN_LIST} on|off" (use "gpiodisable list" can check the GPIO_NUM_IN_LIST of a GPIO) Ex: > gpiodisable list 16: LID_ACCEL_INT_L 17: PLT_RST_L 18: SYS_RESET_L ...... ...... > gpiodisable 17 off --> disable input buffer of GPIO PLT_RST_L > gpiodisable 17 on --> enable input buffer of GPIO PLT_RST_L BRANCH=none BUG=b:117139495 TEST=No build errors for "make buildall". TEST=Manually run the console commands and check the result as expected. Change-Id: I7c750804cf45218a3ab1baacefcda64833861b1f Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/1275765 Commit-Ready: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* power/common: Wait some time before updating wake masksFurquan Shaikh2018-10-301-5/+35
| | | | | | | | | | | | | | | | | | | | | | On platforms like KBL, the device keeps waking up periodically for very short intervals to allow some SoC components to do book-keeping activities. If the user happens to trigger EC-related wake event during this short window, then the wakeup event could be missed because it looks like the host is in S0 to the EC. In order to avoid the race condition, update wake mask using a deferred call to allow the system state to stabilize. BUG=b:118490626 BRANCH=nocturne TEST=No more lid open failures observed on nocturne. Change-Id: I13f9f5760aaf7e54c676f43c48f9fc8de572fd01 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1303133 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* Liara: Update battery manufacture nameRuby Lee2018-10-301-3/+3
| | | | | | | | | | | | | | | | | | | The battery manufacture name contain improper character, update it with renew battery firmware. BUG=b:113823864,b:117629139 BRANCH=none TEST=Check found batt message via EC console in the beginning of EC reset Change-Id: I7bedfa6086222ccf95e9ce166dbd11a27023e3b7 Signed-off-by: Ruby Lee <ruby_lee@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1297869 Commit-Ready: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Tested-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-by: Raymond Chou <raymond_chou@compal.corp-partner.google.com> Reviewed-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com>
* usb_hid_keyboard: keycode column and row are switchedWei-Han Chen2018-10-301-1/+1
| | | | | | | | | | | | | | | columns and rows of keycodes array are switched in CL:1285291. BRANCH=none BUG=None TEST=test on whiskers Signed-off-by: Wei-Han Chen <stimim@chromium.org> Change-Id: I98b28a0765d011a9085202ab3250cd2d9aa85ccd Reviewed-on: https://chromium-review.googlesource.com/1304160 Commit-Ready: Wei-Han Chen <stimim@chromium.org> Tested-by: Wei-Han Chen <stimim@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Battery: Force data update for EC_CMD_BATTERY_GET_STATICDaisuke Nojiri2018-10-301-1/+2
| | | | | | | | | | | | | | | | | | | | Currently, EC_CMD_BATTERY_GET_STATIC reads static data which was updated previously. Since static data is updated only on special conditions, it causes the command to return stale data. This change makes the command force data update. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:117938291 BRANCH=none TEST=buildall Change-Id: I7acdfe5bac5ab87001ee57bd053c7cef411dfdd1 Reviewed-on: https://chromium-review.googlesource.com/1302834 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cheza: Monitor the WARM_RESET_L signal to hold APWai-Hong Tam2018-10-305-6/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change is a backup solution if JTAG_SRST gets fused out. The WARM_RESET_L signal is wired to JTAG_SRST, such that we can hold AP when servo/H1 programs the AP SPI flash. But when JTAG_SRST gets fused out (just in case it happens), still have a way to hold AP, i.e. overdriving the AP_RST_L and PS_HOLD signals. The WARM_RESET_L signal is pulled by a rail from PMIC, the same as POWER_GOOD. The drop of WARM_RESET_L may be caused by either servo/ cr50 holds the signal or its pull-up rail drops. We should handle both cases. Also add WARM_RESET_L as one of the power signals for debug purpose. BRANCH=none BUG=b:78194018, b:112723105, b:112564635 TEST=Ran "dut-control warm_reset:on" and "dut-control warm_reset:off". Scoped the signal of AP_RST_L and PS_HOLD to verify the correctness. Verified AP hold and back booting up. TEST=Changed to the gpio.inc to swap LID_OPEN and WARM_RESET_L and ran "dut-control lid_open:no" and "dut-control lid_open:yes" to emualte the case JTAG_SRST gets fused out. Scoped the signal correctness. Verified AP hold and back booting up. Ran flashrom to program AP SPI flash through servo. Change-Id: I71ebd920171da9994192f7742675feb7cb39ce2f Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1234743
* tcpm/mt6370: Support low power mode.Yilun Lin2018-10-291-0/+19
| | | | | | | | | | | | | | | TEST=make BOARD=kukui -j TEST=Test plug/unplug pd charger that can do pd negiotiate. TEST=Test plug/unplug peripheral that can sink power. BUG=b:113641776, b:80160923 BRANCH=None Change-Id: I4dd1ee5cfe2111af0abb47f62f34cf34e3fd81ad Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1297096 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* kukui: Enable CONFIG_CMD_AP_RESET_LOGNicolas Boichat2018-10-291-0/+1
| | | | | | | | | | | | | | | | Will be useful to understand cause of last reboot. BRANCH=none BUG=b:109900671 TEST=Trigger watchdog (test-wd), ectool uptimeinfo: EC reset flags at last EC boot: reset-pin | ap-watchdog TEST=Trigger normal reboot, ectool uptimeinfo: EC reset flags at last EC boot: reset-pin Change-Id: If739c8b0ff23be9ea21168c51599458abebf9dd7 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1295891 Reviewed-by: Jett Rink <jettrink@chromium.org>
* system: Remember if reset was due to AP watchdog triggeringNicolas Boichat2018-10-295-3/+46
| | | | | | | | | | | | | | | | | On MT8183, when EC detects a watchdog reset, EC needs to reboot itself in preparation for the next boot. This means that AP loses the reset cause (as AP system reset is toggled), and, therefore, we need to save the reset reason in the EC. BRANCH=none BUG=b:109900671 TEST=apshutdown, powerb, see that reset reason is: reset-pin TEST=Use test-wd from bug. Reset reason: reset-pin ap-watchdog Change-Id: I2e30306db5727a22de930f00dc30de40b9695bef Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1295890 Reviewed-by: Jett Rink <jettrink@chromium.org>
* usb-pd: send more request after waitJett Rink2018-10-282-37/+120
| | | | | | | | | | | | | | | | When we are not in an explicit contract, we still need to send more requests attempts when we receive a WAIT control command. Otherwise, the port partner can issue a hard reset. BRANCH=none BUG=b:117498337 TEST=hard reset boot loop goes away with this CL. Change-Id: Iabe8f086659dc0d7a405fa9f17495fb1c61494cc Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1289311 Commit-Ready: Edward Hill <ecgh@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* delan: Use CBI EEPROM for board version and SKU IDEdward Hill2018-10-283-7/+62
| | | | | | | | | | | | | | Use board version and SKU ID from CBI EEPROM on Delan if the SKU ID set via resistors + ADC is not valid. BUG=b:76018320 BRANCH=grunt TEST=Read CBI values from EEPROM Change-Id: Ie37336934bd6687e46ad6ae62bc1b2e12355c83c Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1301933 Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
* Kalista: Create baseboard directoryDaisuke Nojiri2018-10-2710-0/+1979
| | | | | | | | | | | | | | | | | | | This patch creates a baseboard directory for Kalista, derived from Fizz. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:116764443 BRANCH=none TEST=make BOARD=karma Change-Id: Ib8c9dfd56658fd8b6bd39a0a01e22a05dbed477b Reviewed-on: https://chromium-review.googlesource.com/1298319 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: David Huang <David.Huang@quantatw.com> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-by: Vincent Wang <vwang@chromium.org>
* Add nami_fp configurationNicolas Norvez2018-10-261-0/+1
| | | | | | | | | | | | | | Just an alias for now. BRANCH=nocturne BUG=b:117297043 TEST=make BOARD=nami_fp -j Change-Id: I92685ba23782e120f88a41bbf31adce082e95af5 Signed-off-by: Nicolas Norvez <norvez@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1300375 Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Shelley Chen <shchen@chromium.org>
* cr50: prepare for releasing 4.11 and 3.11Vadim Bendebury2018-10-272-2/+2
| | | | | | | | | | | BRANCH=cr50, cr50-mp BUG=none TEST=none Change-Id: I6f984f84bbefa64780c9f32631c5ab6933129875 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/1303474 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* npcx: gpio: support internal pull-down when enable low voltage modeCHLin2018-10-261-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | There is the limitation that internal pull-up must be disabled when a GPIO is configured in low voltage level. However, thers is no such limitation of internal pull-down. The current GPIO driver disable no matter pull-up or pull-down when low voltage mode is set. This CL fixes it by: 1. enable internal PD when low voltage mode is set. 2. print warning message in the UART console when both low voltage and internal PU flags are set for any GPIO defined in gpio.inc. BRANCH=none BUG=b:118339468 TEST=No build error for make buildall TEST=define a gpio with internal PD+low-voltage in npcx7_evb/gpio.inc, check the releated bits of PxPULL and PxPUD are set; TEST=define a gpio with internal PU+low-voltage, check the warning message is printed on the console. Change-Id: I8e15125d3a2ccc73f84b8a559d12644b1d1af5f9 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/1297872 Commit-Ready: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* atlas_ish: implement __shared_mem_bufCaveh Jalali2018-10-261-0/+11
| | | | | | | | | | | | | | | | | | | | when building the atlas_ish using emerge, additional components are built that we weren't building previously. in particular test/utils was falling over due to a missing symbol. BUG=b:118355015 BRANCH=none TEST=tested in combination of a bunch of other patches, emerge-${BOARD} chromeos-base/chromeos-ec succeeds at building atlas_ish Change-Id: Icf588afae8ed5410e21db733a9132bbc23ed2310 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1297042 Commit-Ready: caveh jalali <caveh@chromium.org> Tested-by: caveh jalali <caveh@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: caveh jalali <caveh@chromium.org>
* atlas_ish: initial board files for atlas_ishli feng2018-10-265-0/+162
| | | | | | | | | | | | | | BUG=b:117807679 BRANCH=none TEST=build with BOARD=atlas_ish is successful Change-Id: Iddb9a8a5ced24e9b99753a876ec52b0062b80344 Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1003393 Commit-Ready: Li1 Feng <li1.feng@intel.com> Tested-by: Li1 Feng <li1.feng@intel.com> Reviewed-by: Caveh Jalali <caveh@google.com> Reviewed-by: Li1 Feng <li1.feng@intel.com>
* ISH: add FPU context save/restoreKyoung Kim2018-10-251-1/+10
| | | | | | | | | | | | | | | | | | Add FPU context save for current task and restore for next scheduled task. BUG=none TEST=check if FPU-utilizing tasks can resume without FPU operation issues. Change-Id: Id3c5ff1c9a6b3702a27b8ffc5f6a825877671ce4 Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1154187 Commit-Ready: Kyoung Il Kim <kyoung.il.kim@intel.com> Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
* octopus: limit charging currentJett Rink2018-10-251-0/+7
| | | | | | | | | | | | | | | | Through empirical testing, fleex/bobba were pulling 3.130A instead of 3.0A from the 45W charger. Limiting the current to 95% of 3A ensures that the board does not draw more than 3A from the 45W charger. This will also help the 20V at 2.25A case as well. BRANCH=none BUG=b:117907836,b:118338454 TEST=With this setting, maximum draw is 2.95A on charger for 2A setting. Change-Id: I4b9aa721d0db57724860f8cf78b87ca165cb3fdd Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1294255 Reviewed-by: Justin TerAvest <teravest@chromium.org>
* Octopus: Vbus gone from USB-C port after cold reboot with USB-A driveDiana Z2018-10-251-8/+13
| | | | | | | | | | | | | | | | | | | | | When Vbus turns on while we're in the process of running nx20p348x_vbus_source_enable(), a sink can incorrectly be detected as a charger. This change moves the initialization of the flag indicating we're attempting to source Vbus, and will restore the previous flag state on failure. BRANCH=None BUG=b:117616479 TEST=on yorp, cold booted with USB key and saw it was not detected as a charger on both ports, cold booted with actual charger to verify it was correctly detected on both ports Change-Id: Ie8de18f4b4cd335118d5d44e1476b0ececbcc029 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1298400 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Bobba: support factory keyboard test.Ryan Zhang2018-10-252-0/+23
| | | | | | | | | | | | | | | | | | | | | | | connector-to-GPIO map: {-1, -1}, {0, 5}, {1, 1}, {1, 0}, {0, 6}, {0, 7}, {-1, -1}, {-1, -1}, {1, 4}, {1, 3}, {-1, -1}, {1, 6}, {1, 7}, {3, 1}, {2, 0}, {1, 5}, {2, 6}, {2, 7}, {2, 1}, {2, 4}, {2, 5}, {1, 2}, {2, 3},{2, 2}, {3, 0}, {-1, -1}, {0, 4}, {-1, -1}, {8, 2}, {-1, -1}, {-1, -1}, BUG=b:110011097 BRANCH=master TEST=`ectool kbfactorytest` PASS. Signed-off-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Change-Id: I5da949ae73617c50382f0491c030d693f43b2676 Reviewed-on: https://chromium-review.googlesource.com/1297871 Commit-Ready: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* gsctool: add machine output support (-M) to chip board ID (-i, -O)Wei-Cheng Xiao2018-10-254-16/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | Now gsctool can print out GSC board ID in a machine-friendly way. This allows other programs (e.g., debugd) to parse the output. This is the final CL that adds machine output support to gsctool during verify_ro migration. BRANCH=none BUG=None TEST=manually run gsctool -M -i and gsctool -O verify_ro.db -M on a soraka device connected with a naultilus and check the board ID part in the outputs. Sample output (the board ID part is identical in the outputs of both commands): BID_TYPE=5a534b4d BID_TYPE_INV=a5acb4b2 BID_FLAGS=00007f80 Signed-off-by: Wei-Cheng Xiao <garryxiao@chromium.org> Change-Id: Ia275806672c08841c5b5fcc7758d8e0c777b3fc9 Reviewed-on: https://chromium-review.googlesource.com/1286312 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Wei-Cheng Xiao <garryxiao@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org>
* gsctool: add machine output support (-M) to FW image info (-b)Wei-Cheng Xiao2018-10-251-91/+158
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now can print out FW versions and board ID in the image in a machine-friendly way. This allows other programs (e.g., debugd) to parse the output. Add equality check to the firmware versions and board IDs in slot A and B. Now gsctool prints out an error message to stdout if the contents do not match; otherwise, it prints out only one copy of the contents instead of two. Sample runs: $ gsctool -b cr50.bin.prod RO_A:0.0.10 RW_A:0.3.10[ABCD:00000000:00000000] $ gsctool -b cr50.bin.prod -M IMAGE_RO_FW_VER=0.0.10 IMAGE_RW_FW_VER=0.3.10 IMAGE_BID_STRING=ABCD IMAGE_BID_MASK=00000000 IMAGE_BID_FLAGS=00000000 BRANCH=none BUG=None TEST=manually run gsctool -M -b cr50.bin.prod and gsctool -b cr50.bin.prod on a soraka device connected with a naultilus. Outputs are as the examples above. Signed-off-by: Wei-Cheng Xiao <garryxiao@chromium.org> Change-Id: I1c4c5110fe236debb93b3db118abb4c922b98bdf Reviewed-on: https://chromium-review.googlesource.com/1278414 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Wei-Cheng Xiao <garryxiao@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org>
View Lorry Controller Status