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* util: improve uartupdatetool (UUT) mechanismCHLin2018-05-224-135/+261
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original UUT mechanism has the limitation that the image size cannot exceed the code RAM size. Hence, it only allows to flash the EC firmware by programming RO and RW images seperately. In this CL, we introduce the "--auto" flag in uartupdattool. It will divide the firmware into segments (4K bytes) and program the segments one by one. It also simplifies the function flash_npcx_uut() in flash_ec because some actions are moved into the uartupdatetool with auto flag enabled. BRANCH=none BUG=none TEST=No build errors for make buildall. TEST= ------------------------------------------------------------------------ 1. Connect the servo connector (J24) on npcx7 EVB to servo board v2 via flex cable. 2. Manually turn the switch SW1.6 to "ON" on npcx7 EVB. 3. Reset ec by issuing Power-Up or VCC1_RST reset. 4. Manually turn the switch SW1.6 to "OFF" on npcx7 EVB. 5. Move npcx7_evb from array BOARDS_NPCX_7M7X_JTAG to BOARDS_NPCX_UUT in flash_ec. 6. "./util/flash_ec --board=npcx7_evb" or "./util/flash_ec --board=npcx7_evb --ro" (Note: this line in flash_ec must be removed in step 6: https://chromium.googlesource.com/chromiumos/platform/ec/+/master/util/flash_ec#961) Change-Id: Ifdb6a40ef88c6a9fb435169e158fd615100237cf Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/1043825 Commit-Ready: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* it83xx: watchdog: print LP on watchdog warningDino Li2018-05-224-3/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's difficult to debug problems with single watchdog warning. This patch will print IPC and LP registers continually if watchdog warning is fired. BRANCH=None BUG=b:79733639 TEST=waitms 1000, EC print warning message but no reset. waitms 3000, EC print warning message and then reset. On bip, EC is powered by servo only. And we got the following watchdog warning message: And we refer to assembly code, the IPC indicates CPU is executing instructions in "gpio_get_level()" (IPC:00002408, IPC:00002404, IPC:000023fc, IPC:0000240e), and calling from "chipset_pre_init_callback()" (LP:0000101e). Pre-WDT warning! IPC:00002408 LP:0000101e Pre-WDT warning! IPC:00002408 LP:0000101e Pre-WDT warning! IPC:00002408 LP:0000101e Pre-WDT warning! IPC:00002408 LP:0000101e Pre-WDT warning! IPC:00002408 LP:0000101e Pre-WDT warning! IPC:00002408 LP:0000101e Pre-WDT warning! IPC:00002408 LP:0000101e Pre-WDT warning! IPC:00002408 LP:0000101e Pre-WDT warning! IPC:00002408 LP:0000101e Pre-WDT warning! IPC:00002408 LP:0000101e Pre-WDT warning! IPC:00002408 LP:0000101e Pre-WDT warning! IPC:00002408 LP:0000101e Pre-WDT warning! IPC:00002408 LP:0000101e Pre-WDT warning! IPC:00002404 LP:0000101e Pre-WDT warning! IPC:000023fc LP:0000101e Pre-WDT warning! IPC:0000240e LP:0000101e Pre-WDT warning! IPC:00002408 LP:0000101e Change-Id: I9e9429806db448624a10c348bee9c6e3d0a7765b Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/1060937 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Nami: support KB backlight for AkaliRyan Zhang2018-05-221-0/+1
| | | | | | | | | | | | BUG=b:79898204 BRANCH=master TEST=ec console.`kblight 0` and see KB backlight off ec console.`kblight 100` and see KB backlight on Change-Id: Ibd79426a71e334b707d81e9b53d7857c5401b49a Signed-off-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1063694 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* tcpm: it83xx: Output error message if enabling an unsupported configurationDino Li2018-05-221-10/+6
| | | | | | | | | | | | | | | | | | This patch will output an error message during compiling if we try to enable an unsupported config option for it83xx PD driver. This avoids the issue of an unknown EC reset caused by calling function at address 0x00000000. This change also remove empty definitions. BUG=b:79700229,b:79706847,b:79637786 BRANCH=none TEST=make buildall -j Change-Id: I08accb88ae7c6d574dfcd115a5122acd2dfe46b4 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/1059095 Reviewed-by: Jett Rink <jettrink@chromium.org>
* servo_updater: add reboot flagNick Sanders2018-05-211-0/+4
| | | | | | | | | | | | | | This allows a reboot request regardless of whether update is required. BRANCH=servo BUG=b:69016505 TEST=servo reboots Change-Id: I2e8651e6ffa95c622aa0a8122d705d9ac8fbdd82 Signed-off-by: Nick Sanders <nsanders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1066988 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* ite_flash: handle termination signal gracefullyJett Rink2018-05-211-54/+92
| | | | | | | | | | | | | | | | | | Since we wait indefinitely for the ITE chip to be ready when we are flashing it, we need to be able to handle the console terminal signal gracefully so the host USB ports do not get in a bad state. BRANCH=none BUG=none TEST=Can exit while loop gracefully Change-Id: Ica8e7c6c707cd58bdaa754be76fffef418d870e4 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1067788 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* cr50: prepare to release version 0.4.7Vadim Bendebury2018-05-211-1/+1
| | | | | | | | | | | BRANCH=none BUG=none TEST=none Change-Id: I3c5516f8c8b3119ae705308eba3068ba5bf4d7e7 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1067780 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* servo_updater: allow local buildsNick Sanders2018-05-211-1/+1
| | | | | | | | | | | | | Updater regex allows local build versions as well. BRANCH=None BUG=b:69016431 TEST=update servo v4 Change-Id: I203aefff998ef5c69434187830c27431dbcc7dee Signed-off-by: Nick Sanders <nsanders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1066989 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* atlas: keep discharged battery powered during prechargeCaveh Jalali2018-05-211-0/+2
| | | | | | | | | | | | | | | | | | | | | | when we wake up a discharged battery using the "precharge current", it briefly requests requests (0 vols, 0 amps) - presumably while its controller is trying to figure out what's going on... we respect this and stop charging, but that's probably a really bad idea since the battery has had very little chance to accept enough charge to self-power its controller. enabling "REQUESTS_NIL_WHEN_DEAD" gets around that. BUG=b:79354967 BRANCH=none TEST=instrumented code to verify we override the 0 amps request when battery is at 0% charge Change-Id: I1e15e5106ae5cdda94bd1bfd02132b300c9c4665 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1067010 Commit-Ready: Caveh Jalali <caveh@google.com> Tested-by: Caveh Jalali <caveh@google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* atlas: ignore unavailable battery temp readingsCaveh Jalali2018-05-211-1/+5
| | | | | | | | | | | | | | | | | | | | | the battery temperature field is only valid after we've actually managed to read the battery temperatore parameter. so, if the temp field is marked "BAD", don't even look at it. this addresses a case where we were removing charge current during the precharge phase - basically removing charge current from a battery that we're trying to power so we can talk to its I2C controller. BUG=b:79354967 BRANCH=none TEST=instrumented code to verify we don't request 0 amps in ST_PRECHARGE Change-Id: I3b40903506fa949c14ecaf577f134f31cfcf8fb7 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1066789 Commit-Ready: Caveh Jalali <caveh@google.com> Tested-by: Caveh Jalali <caveh@google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* it8320: print error message if gpio triggers are misconfiguredJett Rink2018-05-211-19/+38
| | | | | | | | | | | | | | If a GPIO interrupt is misconifgured print out a console message. BRANCH=none BUG=b:79942824 TEST=verified messages get printed if I try to configure both on GPH6 Change-Id: Ic7156bea7c4fb2ac0bf7d717d8b812a60d5ad16a Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1066223 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Dino Li <Dino.Li@ite.com.tw>
* bip: fix uart interrupt type to bothJett Rink2018-05-211-1/+1
| | | | | | | | | | | | | | | ITE only supports both edge triggers for GPB0 instead of just falling. BRANCH=none BUG=79942824 TEST=nothing is changing on how it configured. We are just changing the documentation in gpio.inc Change-Id: Ib7af54e360f4acaf410fb64b6747caf4d8729cec Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1066310 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* sweetberry: expose i2c over usbRuben Rodriguez Buchillon2018-05-215-14/+36
| | | | | | | | | | | | | | | | Expose the i2c interface through usb so that we can read power rails through servod leveraging the work being done there. BRANCH=none BUG=chromium:806148 TEST=manual testing - powerlog still works - i2c over usb using servod code works (other CLs needed) Change-Id: I48876bc4839509a397ce77376b337c37c556ae40 Signed-off-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1051136 Reviewed-by: Nick Sanders <nsanders@chromium.org>
* Nami: Add KX022 as a lid accelerometer for AkaliDaisuke Nojiri2018-05-212-3/+48
| | | | | | | | | | | | | | | | | This patch adds KX022 as a lid accelerometer for Akali. The readings are adjusted by rotating 180 degree on X-axis and 180 degree on Y-axis. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:77496502 BRANCH=none TEST=Verified on Akali Change-Id: I23e8351f457255bdd743b5157053efd8edd6ca4a Reviewed-on: https://chromium-review.googlesource.com/1038622 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@google.com>
* charger: Modify manual mode to save desired current/voltageScott Collyer2018-05-212-18/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously manual_mode used the current values of voltage/current to set the desired values for each charge_request() call. Since manual mode is entered/exited in the host command task, this can easily lead to a race condition where the charger gets disabled in the host command task, the reenabled by the charger task. This in turn makes the ectool chargecontrol idle command unreliable. This CL replaces manual mode with two variables, manual_voltage and manual_current. The default values are -1 which means that they are inactive. When the ectool command 'chargecontrol idle' is executed, it sets both variables to 0. This then removes the race condition possibility as each iteration of the charger loop will use manual_voltage and/or manual_current if not -1. BRANCH=coral BUG=b:68364154 TEST=Manual Executed 'ectool chargecontrol idle' and 'ectool chargecontrol normal' numerous times and verified that the charging was disabled/resumed each time as expected. Without this fix the problem could be reproduced always in less than 10 attempts, typcially less than 5. With this CL charging is disabled reliably each time and I'm not able to reproduce the problem. Change-Id: I1ed9cdb42249cdf72ab34dd95b8f42c09d9a490c Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/851419 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org> (cherry picked from commit b7254f38979f274acc66330905399ff5ddf4129b) Reviewed-on: https://chromium-review.googlesource.com/922069 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* scarlet: Enable AP throttling for battery under-voltagePhilip Chen2018-05-211-0/+3
| | | | | | | | | | | | | | BUG=b:73050145 BRANCH=scarlet TEST=manually test on scarlet together with CL:1064983 Change-Id: Ic5bcc0e4432b2f8ac03fcfa872388ff07d240a7b Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/1064985 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: David Schneider <dnschneid@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* charge_state_v2: Throttle AP in low battery voltagePhilip Chen2018-05-214-3/+56
| | | | | | | | | | | | | | | | | | | | | | | | When EC sees voltage drops below BAT_LOW_VOLTAGE_THRESH, we kick off a timer and ask AP to throttle. When the timer expires which means EC hasn't seen under-voltage for BAT_UVP_TIMEOUT_US, we ask AP to stop throttling. We reset the throttling status and do nothing when AP is off (S5). BUG=b:73050145, chromium:838754 BRANCH=scarlet TEST=manually test on scarlet, confirm EC sends EC_HOST_EVENT_THROTTLE_START and EC_HOST_EVENT_THROTTLE_STOP host events when entering/exiting UVP. Change-Id: Ia760989f760f95549f7a8a8acb1d01de23feab5a Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/1064983 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: David Schneider <dnschneid@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* Nami: Erase OCM flash for AkaliDaisuke Nojiri2018-05-211-3/+8
| | | | | | | | | | | | | | | | | This makes Akali EC check OCM flash and erase it if it's not empty at start-up. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:79985105 BRANCH=none TEST=Verified OCM flash is erased at start-up on Akali. Change-Id: If6c09be0a547313b10e4fd45ec4b3719f83abaa9 Reviewed-on: https://chromium-review.googlesource.com/1066932 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* anx7447: Timeout when waiting for flash operation completionDaisuke Nojiri2018-05-212-23/+54
| | | | | | | | | | | | | | | | | This makes anx7447 driver timeout if it waits for flash operation completion more than 100ms. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:79985105 BRANCH=none TEST=Run anx_ocm erase on Nami Change-Id: I1fa722aa532bd8d07dd191ad45e793f70a3b0742 Reviewed-on: https://chromium-review.googlesource.com/1066931 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* Nami: Enable CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEADraymondchou2018-05-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When any of battery cells are near the Cell Under Voltage, battery enters shutdown mode. However, battery cells can continue to discharge due to self discharge. Battery cell vendor defines the minimum acceptable cell voltage. If the cell voltage falls below that value, battery BMS does not close the C-FET and the battery is considered permanently dead. So, every time battery enters shutdown mode, the BMS executes SUV status check to see whether cells are in safe range to charge. Gauge IC turns on C-fet after a 5 sec delay. During this delay, the gauge requests 0mA charging current and 0V charging voltage. During SUV check, battery gauge monitors the external voltage by the charger through "battery present through" setting. If the external voltage is less than the threshold, the BMS goes to shutdown mode again and this repeats. This patch enables CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEAD so that the EC will supply voltage & current even if the battery requests 0V, 0A at 0% soc, which only happens when the BMS is exiting shutdown mode. Battery gauge IC: TI BQ40Z50 Battery gauge FW version: 1.06 for BYD/ 1.07 for LG and Simplo. BUG=b:73921750 BRANCH=none TEST=Check dead battery can be charged battery to normal mode. Change-Id: Ib7e12a0596d53377c58eb17c980cd7e01576de7c Signed-off-by: raymondchou <raymond_chou@compal.corp-partner.google.com> Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/910608 Commit-Ready: Raymond Chou <raymond_chou@compal.corp-partner.google.com>
* npcx: lpc: Remove FW_OBF bypass for npcx7 and later npcx ec series.Mulin Chao2018-05-181-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In CL 419909, we add a bypass for FW_OBF bug in npcx5 series. (In npcx5, setting FW_OBF won't de-assert IRQ1. The bypass emulates a host read through sib to clear OBF bits in HIKMST and STATUS registers and de-assert IRQ1.) This bug was already fixed in npcx7 series and later npcx. This CL restores original mechanism to clear keyboard buffer by setting FW_OBF bit if chip series is not npcx5. BRANCH=none BUG=chrome-os-partner:34346 TEST=No build errors for npcx series. Run the following script "while true; do ./keypress_emulate_enter_reboot.sh ; sleep 25; done" on grunt over two days and no symptom occurred. Here is the content of keypress_emulate_enter_reboot.sh "#!/bin/bash TIME="0.5" DEV=/dev/pts/26 echo "kbpress 11 4 1" > ${DEV} echo "kbpress 11 4 0" > ${DEV} echo "kbpress 0 2 1" > ${DEV} echo "kbpress 10 6 1" > ${DEV} echo "kbpress 2 3 1" > ${DEV} echo "kbpress 2 3 0" > ${DEV} echo "kbpress 10 6 0" > ${DEV} echo "kbpress 0 2 0" > ${DEV} sleep 2 # Emulate "Ctrl+Alt+F2" echo "kbpress 3 7 1" > ${DEV} echo "kbpress 3 7 0" > ${DEV} sleep ${TIME} echo "kbpress 9 7 1" > ${DEV} echo "kbpress 9 7 0" > ${DEV} sleep ${TIME} echo "kbpress 9 7 1" > ${DEV} echo "kbpress 9 7 0" > ${DEV} sleep ${TIME} echo "kbpress 3 2 1" > ${DEV} echo "kbpress 3 2 0" > ${DEV} sleep ${TIME} echo "kbpress 11 4 1" > ${DEV} echo "kbpress 11 4 0" > ${DEV} sleep 2 # Emulate "root" echo "kbpress 3 7 1" > ${DEV} echo "kbpress 3 7 0" > ${DEV} sleep ${TIME} echo "kbpress 2 7 1" > ${DEV} echo "kbpress 2 7 0" > ${DEV} sleep ${TIME} echo "kbpress 3 0 1" > ${DEV} echo "kbpress 3 0 0" > ${DEV} sleep ${TIME} echo "kbpress 9 7 1" > ${DEV} echo "kbpress 9 7 0" > ${DEV} sleep ${TIME} echo "kbpress 9 7 1" > ${DEV} echo "kbpress 9 7 0" > ${DEV} sleep ${TIME} echo "kbpress 3 2 1" > ${DEV} echo "kbpress 3 2 0" > ${DEV} sleep ${TIME} echo "kbpress 11 4 1" > ${DEV} echo "kbpress 11 4 0" > ${DEV} sleep 1 # Emulate "reboot"" Change-Id: I9ca11c92c5abb909e2d3f22018cf962e1292f406 Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/1059984 Reviewed-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Nami: Suppress logging for less informative host commandsDaisuke Nojiri2018-05-181-0/+3
| | | | | | | | | | | | | | | | | This patch suppresses logging for EC_CMD_CONSOLE_SNAPSHOT, EC_CMD_CONSOLE_READ, EC_CMD_PD_GET_LOG_ENTRY, EC_CMD_MOTION_SENSE_CMD. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=make BOARD=nami Change-Id: I25d343b4828c0336b1b221041561d2416326948b Reviewed-on: https://chromium-review.googlesource.com/1066692 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* cr50: include sleepmask in all imagesMary Ruthven2018-05-183-5/+7
| | | | | | | | | | | | | | | | | | sleepmask is really useful for debugging sleep issues. Add a read only version of sleepmask to non-DBG images. It will only be accessible once the console is unlocked. BUG=none BRANCH=cr50 TEST=make sure sleepmask can be modified in DBG images and can only be read in prod images. Change-Id: I31ef966f6302d4a7602a014cb08c9b972d13f41e Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1062804 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* power: prevent chipset startup if no battery or acJett Rink2018-05-181-13/+26
| | | | | | | | | | | | | | | | | | When the EC is powered solely by the servo, we do not want to try to start the AP. If we do, we will watchdog reset in a while loop waiting for the 3300 and 5000 rails to come up (which won't come up if powering only on the servo) BRANCH=none BUG=b:79606767 TEST=powering bip with servo only does not watchdog reset boot loop Change-Id: I132312f7f08201dc58d797900df16502240ee98c Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1062502 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com>
* octopus: enable trackpad (S3+) and backlight (S0)Jett Rink2018-05-186-31/+64
| | | | | | | | | | | | | | | | Enable trackpad when entering S3, and display backlight when entering S0 and disable them on the opposite transition. Moving common code to baseboard. BRANCH=none BUG=b:79900266 TEST=bip trackpad works in S3 as wake source. backlight turns off in S0ix and S3. Change-Id: I0937771093d87c020b3c0d94a482d108c5a5c180 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1064693 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* ec_chip_mchp: Remove debug trace statementsscott worley2018-05-181-8/+0
| | | | | | | | | | | | | | | Trace statements no longer needed. BRANCH=none BUG= TEST=Build boards based on chip mchp. Change-Id: I0f687fce46cd81d132d546e5ae011863e115e1e7 Signed-off-by: scott worley <scott.worley@microchip.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1053834 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Scott Worley <scott.worley@microchip.corp-partner.google.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* yorp: Add battery temperature sensorDivya Sasidharan2018-05-182-3/+23
| | | | | | | | | | | | | | | BUG=b:79940719 BRANCH=None TEST=On yorp: Test if ectool tempsinfo all lists battery sensor. Change-Id: Ib70872cc8f91d322120714a9147dbdd8e40432aa Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1060577 Commit-Ready: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* cr50: Add check for developer modeRandall Spangler2018-05-183-1/+34
| | | | | | | | | | | | | | | | | This will be used as part of the checks for when to allow CCD open. Add check for firmware space dev mode bit, based on the similar code which reads the FWMP. Print the state of both bits in 'ccd get'. BUG=b:79983505 BRANCH=cr50 TEST=With dev mode off, 'ccd get' does not report TPM: dev_mode. Turn on dev mode via the recovery screen, and it does. Change-Id: I6af78bb104004323cd377ed996e1db94bc36fc62 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1066391 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* flash: Fix offset bug in spi_flash_readscott worley2018-05-181-5/+5
| | | | | | | | | | | | | | | | | | | | | Observed VBOOT hash failure for EC_RW. Function spi_flash_read with size > SPI_FLASH_MAX_READ_LEN is incorrectly incrementing the offset. For example: 0, 0x100, 0x300, 0x600, all with read size = 256. BUG= BRANCH=any EC using SPI flash TEST=Trigger VBOOT hash re-calculation using EC console hash rw command. Second test program SPI flash with known test pattern longer than SPI_FLASH_MAX_READ_LEN and read using EC console flashread. Change-Id: I5fda47f132f64b12044b94663a19d889f1c2b32a Reviewed-on: https://chromium-review.googlesource.com/1036258 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Scott Worley <scott.worley@microchip.corp-partner.google.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* octopus: Display battery FET console message only when disconnectedScott Collyer2018-05-181-5/+7
| | | | | | | | | | | | | | | | | | | | | | | With CONFIG_BATTERY_REVIVE_DISCONNECT once the battery FULL flag gets set, charge_state_v2 will call battery_get_disconnect_state. That function had console print that's only meaningful when the battery is actually disconnected. To avoid flooding the EC console log under this expected condition, this CL moves the console log so that it only happens when the battery is present, but disconnected. BRANCH=none BUG=b:79133101 TEST=Verfied that with full battery the console log message is no longer showing. Also verifed that can recover from battery cutoff condition. Change-Id: Id2e161cbd52c0ef07f28b94608f9615071327c97 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1064975 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* chip/npcx: ensure proper type of cec_taskPatrick Georgi2018-05-181-1/+1
| | | | | | | | | | | gcc 8.1 in lto mode checks that the prototypes match. Change-Id: Id7eb5bd724e1084058a5c959e909a797659051b8 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/1062026 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com>
* util/ecst: refactor path manglingPatrick Georgi2018-05-182-49/+53
| | | | | | | | | | | | | | | | | ecst has two open-coded implementations of a function to inject a string into another string (that happens to be a path). Factor out and make sure that gcc 8.1's static analysis of string lengths is happy. BUG=b:65441143 BRANCH=none TEST=builds with gcc 8.1 Change-Id: I80581d26b6f75cac2c9530c18f94d12614aa1586 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/1061878 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com>
* Shuffle const aroundPatrick Georgi2018-05-189-9/+9
| | | | | | | | | | | | | | | | | | | | gcc 8.1 complains about duplicate const, and while some of these really are duplicate, others look like they were supposed to tighten the API contract so that variables are "const pointer to const data", but didn't have that effect. BUG=b:65441143 BRANCH=none TEST=building Chrome EC as part of upstream coreboot's build with a gcc 8.1 compiler now works (better. there are other issues left) Change-Id: I6016c5f282516471746f08d5714ea07ebdd10331 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/1039812 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Tell linker about the arch and CPU it's linking forPatrick Georgi2018-05-181-1/+2
| | | | | | | | | | | | | | | | | | | GCC 8.1's linker tries to rewrite the code to match the lowest common denominator, reintroducing references to __aeabi_idivmod and friends even on ARM revisions that don't need them. Tell it what it's linking for to keep it harmless. BUG=b:65441143 BRANCH=none TEST=make buildall works with gcc 8.1 Change-Id: I7296aa80f587aa4f004fb20958714766793ab2b5 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/1061693 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com>
* atlas: add pullups to TCPC interrupt pinsCaveh Jalali2018-05-181-2/+2
| | | | | | | | | | | | | | | | there are no pullup resistors on the TCPC ALERT# pins and none on the board, so we need to turn on internal pullups on the EC side. BUG=b:75070158 BRANCH=none TEST=board still boots Change-Id: I15a7940d8b647b83c6ae304171c4a7c46b920529 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1059870 Commit-Ready: caveh jalali <caveh@chromium.org> Tested-by: Caveh Jalali <caveh@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* charge_state_v2: Localize a static variablePhilip Chen2018-05-181-1/+2
| | | | | | | | | | | | | BUG=none BRANCH=scarlet TEST=build scarlet Change-Id: Idf70d5eb3905edf86ea14e1288ae1a42876bd35c Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/1064982 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* Cr50: Dcrypto: calculate appkey digests at runtime to save space.Allen Webb2018-05-171-59/+55
| | | | | | | | | | | | | | | | Before: *** 4560 bytes still available in flash **** After: *** 4696 bytes still available in flash **** BRANCH=none BUG=b:65253310 TEST=Update Cr50 with this image and verify the keys are the same. Change-Id: I1c722ced185c41f732ce0ed5236db01401f21dfc Signed-off-by: Allen Webb <allenwebb@google.com> Reviewed-on: https://chromium-review.googlesource.com/1031058 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* bq25703: correct define namesJett Rink2018-05-172-19/+19
| | | | | | | | | | | | | | | The register values used BQ25793 as the prefix and they should use BQ25703 instead BRANCH=none BUG=none TEST=none Change-Id: I1955ff075c4e95ed901a5f265340ee01d60e1739 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1060590 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* Nami: Allow ectool to control LEDsRaymond Chou2018-05-171-7/+9
| | | | | | | | | | | | | | | | | | | | | | This patch makes led_get_brightness_range return amber=100, white=100 regardless of OEM ID or led_id. This function is for ectool led command, which is used to test basic LED connectivity. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:78489297,b:77827579 BRANCH=none TEST=Run 1. ectool led battery white=100 2. ectool led battery amber=100 3. ectool led power white=100 4. ectool led power amber=100 Change-Id: I6c6b3a5dd26aaba3a3ff7dccd6e116794c6594c9 Reviewed-on: https://chromium-review.googlesource.com/1062077 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* it83xx: Only use supported VWs on GLKJustin TerAvest2018-05-171-0/+26
| | | | | | | | | | | | | | | | | | | | Gemini Lake-based chipsets support a subset of virtual wires that other Intel processors do. The current settings prevent the GLK APs from bootign in some situations; PLTRST# doesn't get reasserted when there is an error. See "eSPI Compatibility Specification (562633)" for details. BRANCH=None BUG=b:79778835 TEST=Successfully booted bip after a cold reset from servo Change-Id: I02b403ab6b06cbcae61ac46132018e95988a3d43 Signed-off-by: Justin TerAvest <teravest@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1064704 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com>
* yorp: Enable tablet modeDivya Sasidharan2018-05-173-0/+19
| | | | | | | | | | | | | | | | Enables tablet mode to change screen rotation with respect to portrait / landscape mode. BUG=b:78898771 BRANCH=None TEST=make buildall -j Change-Id: Ib959daee5b2dfa24b0a31e6bbf91f238d251abd0 Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1038605 Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com> Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* make local functions static inlinePatrick Georgi2018-05-173-4/+4
| | | | | | | | | | | | | | | | | | | They're only used within the same file and should always be inlined. It also helps gcc 8.1's lto linking which seems to not inline it (since inline is just a hint) but then drops the function (presumably because it's small, marked inline, and comes with no prototype). BUG=b:65441143 BRANCH=none TEST=builds with gcc 8.1 Change-Id: I881a5b9f13192dd11748d8a3060788f95a84dec0 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/1061075 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com>
* Use gcc's name for ARMv6-with-svc on cortex-m chipsPatrick Georgi2018-05-172-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | There were various longer discussions[0] over in gcc land and the consensus pretty much is that gcc's "armv6-m" shouldn't really exist, or rather map to its armv6s-m. Cortex-M0 is documented as having the svc instruction[1], and we make use of it, so let's go for armv6s-m as the safe option. We need that on some compilers (gcc 7, gcc 8.1.0) since they actually make that distinction. Newer ones won't, older ones apparently didn't. [0] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85606 https://sourceware.org/bugzilla/show_bug.cgi?id=23126 [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0497a/BABBHFJE.html BUG=b:65441143 BRANCH=none TEST=builds with gcc 8.1 Change-Id: Ib0d5c484c2fbd72f033d8523cd1e0c6c8ce0c7e6 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/1061073 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com>
* chip/mchp: Surround conditional code with bracesPatrick Georgi2018-05-171-1/+2
| | | | | | | | | | | | | | | | Lest it does something stupid. gcc 8.1 checks for such style/semantic discrepancies... yay, I guess? BUG=b:65441143 BRANCH=none TEST=builds with gcc 8.1 Change-Id: I26f1b4dc5cda5c248c14eab2d1c0e5b9c22f4c49 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/1061877 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com>
* Revert "cr50: add support for enabling terminations on ap suspend"Mary Ruthven2018-05-177-124/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit cfcac78e626ce08ccc1c45c91c61127b6088e80f. Reason for revert: Removing all s3 termination support. It's not necessary and it causes scarlet to boot into recovery. Original change's description: > cr50: add support for enabling terminations on ap suspend > > rk3399 systems need terminations on the SPI signals in S3 and all other > low power states. Add support for enabling the pulldowns and pullups on > the correct pins. > > With this change, if BOARD_NEEDS_S3_TERM is set in the board properties, > cr50 will enable a pulldown on the AP TX Cr50 RX signal and a pulldown > on all of the SPS signals. To keep the pulldowns from interfering with > the sps peripheral, s3_term will also disable the input for those > signals. > > BUG=b:62200096 > BRANCH=cr50 > TEST=Flash onto bob. Make sure cr50 enables and disables terminations > when the AP suspends/resumes. Flash onto reef. Make sure it doesn't do > anything. > > Change-Id: I4adaf6d66160bab1eb3cf3d343d4a79524ccf883 > Signed-off-by: Mary Ruthven <mruthven@google.com> > Reviewed-on: https://chromium-review.googlesource.com/991338 > Commit-Ready: Mary Ruthven <mruthven@chromium.org> > Tested-by: Mary Ruthven <mruthven@chromium.org> > Reviewed-by: Randall Spangler <rspangler@chromium.org> Bug: b:62200096 Change-Id: I00c5051a48d4578badf9ce6622dea1af9903f4fd Reviewed-on: https://chromium-review.googlesource.com/1062687 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* Revert "cr50: disable s3_terms during init"Mary Ruthven2018-05-171-28/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit c24d480d90699bf6aaf534d66dc48513d867bdd0. Reason for revert: Removing all s3 termination support. It's not necessary and it causes scarlet to boot into recovery. Original change's description: > cr50: disable s3_terms during init > > When cr50 resumes from deep sleep term_enabled is reset to 0, but not > all of the s3 termination settings are reset. Some of them are, because > some of the gpios are defined in gpio.inc and cr50 will handle setting > those up during init, but others like the sps pulldowns aren't. At this > point, the term_enabled setting does not actually match the state of > enabled terminations. > > After deep sleep reset if the AP is on, ccd update state will try to > disable the s3 terminations, but term_enabled is 0, so s3_term thinks > they're already disabled and wont do anything even though some of the > terminations are actually enabled. > > This change initializes all of the s3_term stuff to disable during hook > init. This way things are reset so they won't interfere with sps_init. > This will also make sure to align the system state with term_enabled, > before the ccd hook starts getting called. It is safer to start with > disabling the terminations, because it wont interfere with tpm > communication if the AP is on. If the AP is off, ccd_update_state will > re-enable the terminations around a second after init. > > BUG=b:62200096,b:79214702 > BRANCH=cr50 > TEST=firwmare_Cr50DeepSleepStress.reboot on bob > > Change-Id: I9a90c7f7703b1406b4c494db448a8ac84d040d1c > Signed-off-by: Mary Ruthven <mruthven@google.com> > Reviewed-on: https://chromium-review.googlesource.com/1043152 > Commit-Ready: Mary Ruthven <mruthven@chromium.org> > Tested-by: Mary Ruthven <mruthven@chromium.org> > Reviewed-by: Randall Spangler <rspangler@chromium.org> > Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Bug: b:62200096, b:79214702 Change-Id: If3467352030c65365c6851cd692aa5d0e9f47667 Reviewed-on: https://chromium-review.googlesource.com/1062686 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* Revert "cr50: add s3 term for rk3399 devices"Mary Ruthven2018-05-171-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit c40bb886e92c76547fdd889ff50ef159b5ea5d67. Reason for revert: This causes scarlet to boot into recovery Original change's description: > cr50: add s3 term for rk3399 devices > > BUG=b:62200096 > BRANCH=cr50 > TEST=run suspend/resume tests on bob > > Change-Id: Idb249125f5967f6f9c80afbf991998425f9f5005 > Signed-off-by: Mary Ruthven <mruthven@google.com> > Reviewed-on: https://chromium-review.googlesource.com/991339 > Commit-Ready: Mary Ruthven <mruthven@chromium.org> > Tested-by: Mary Ruthven <mruthven@chromium.org> > Reviewed-by: Randall Spangler <rspangler@chromium.org> Bug: b:62200096 Change-Id: I9e60fee9cdf381951f82ab8d58f4d202a52b43db Reviewed-on: https://chromium-review.googlesource.com/1062685 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* nocturne: Power base on startup if attached.Aseda Aboagye2018-05-171-2/+8
| | | | | | | | | | | | | | | | | This commit fixes a bug where the base would not be powered after the system was power cycled without disconnecting the base. BUG=none BRANCH=poppy TEST=Flash nocturne; boot to S0, attach base, shutdown to S5. Boot to S0, verify that base is powered. Change-Id: Ia3de500afdc29cb601c1b5571cd3355711a3b368 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1062993 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* nocturne: Add PMIC init.Aseda Aboagye2018-05-172-1/+13
| | | | | | | | | | | | | | | | | | | | | | The 5V power good needs to be masked in the ROP PMIC otherwise the PMIC resets the EC rails after about ~4s. Additionally, changed EC_PLATFORM_RST to an output. BUG=None BRANCH=poppy TEST=Check that 5V PG is masked in the PMIC. Change-Id: Id06c85d1cea9a35d9e7418de5c0e9d0abd620607 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1055908 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Benson Leung <bleung@chromium.org> (cherry picked from commit 9ebdc6c252d8d55c51ccc954e9957c908b4e1a60) Reviewed-on: https://chromium-review.googlesource.com/1058887 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* keyboard_scan: Add refresh and power button boot key optionsEdward Hill2018-05-164-8/+23
| | | | | | | | | | | | | | | | | | | | | | | Make Esc+Refresh+Power on Grunt enter Recovery Mode. If Power is released fast: [0.045303 KB init state: -- 02 08 -- -- -- -- -- -- -- -- -- --] Add CONFIG_KEYBOARD_IGNORE_REFRESH_BOOT_KEY to handle this case. If Power is held longer: [0.045448 KB init state: 08 0a 08 08 08 -- 08 -- 08 08 -- 08 08] Add CONFIG_KEYBOARD_PWRBTN_ASSERTS_KSI3 to handle this case. BUG=b:79758966 BRANCH=none TEST=Esc+Refresh+Power gives recovery screen on Grunt Change-Id: I43a7d485535ff7b0d9bfce59f28c0049ee989818 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1063032 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
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