| Commit message (Collapse) | Author | Age | Files | Lines |
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BRANCH=none
BUG=b:69981636
TEST=sysrq stuff on console, and try buttons
Change-Id: I198eae9444febcd2d341e23d0e8098d40fc10bed
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/802626
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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This change adds support for collecting voltage readings from the two
thermistors on the board.
The temperature/resistance values for the thermistors came from:
https://www.murata.com/en-eu/products/productdata/8796837609502/NTHCG142.txt?1437969863000
TEST=Build
BRANCH=None
BUG=b:69379715
Change-Id: Ibcb995c2cc17f72bfcd60a355f99607628f61dad
Signed-off-by: Justin TerAvest <teravest@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/801213
Reviewed-by: Shawn N <shawnn@chromium.org>
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CHARGE_MAX_SLEEP_USEC was originally set to 1 minute (i.e. equal to
POLL_PERIOD_VERY_LONG) in CL:191767. However, during re-factoring in
CL:193876 it got changed to 1 second as charge_state_v1 used this
value. Looking at the way CHARGE_MAX_SLEEP_USEC is used, value of 1
minute makes more sense because sleep_usec could be set to
POLL_PERIOD_VERY_LONG when device is off or suspended. With the
current logic in suspend/off state, sleep_usec is set to
POLL_PERIOD_VERY_LONG and immediately gets reset to
CHARGE_MAX_SLEEP_USEC in charger_task.
This change fixes the above behavior by defining CHARGE_MAX_SLEEP_USEC
as 1 minute. As a side-effect of this, we might not wake up early
enough in case of critical battery. Thus, check if we need to shutdown
on critical battery and adjust sleep time accordingly.
BUG=b:69695376
BRANCH=None
TEST=make -j buildall
Change-Id: Ieba7279dc4b02c3d64022c3c5ac09fb869a3632d
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/788181
Reviewed-by: Shawn N <shawnn@chromium.org>
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If during PMIC initialization, it is identified that there was a VR
fault, then dump fault registers 0x16 and 0x17 to EC console. This
information is very useful during debugging sudden power losses in
field and so it is printed out to EC console.
Additionally, add panic reason with these register values as panic
data so that OS can provide this information in cros ec
panicinfo. This helps in retaining the information even if EC console
logs overflow.
BUG=b:65732924,b:69334392
BRANCH=None
TEST=Verified that on the failing Lux system, PMIC VR fault is
reported:"PMIC VRFAULT: PWRSTAT1=0x00 PWRSTAT2=0x01".
Also, verified that pmic fault register info is reported correctly in
panicinfo:
cat /sys/kernel/debug/cros_ec/panicinfo > /tmp/panicinfo
hexdump -n 1 -s 0x14 -e '"0x""%02X""\n"' /tmp/panicinfo
0x00
hexdump -n 1 -s 0x15 -e '"0x""%02X""\n"' /tmp/panicinfo
0x01
Change-Id: Ic6096887cd66046d11a5eb1d942b635b3e48a236
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/674033
Reviewed-by: Shawn N <shawnn@chromium.org>
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Add USB PD tasks and start of board code.
Update GPIOs to match V1.2 schematics.
Grunt V1.2 USB HW:
C0: TCPC ANX3429, Switch SN5S330, BC1.2 BQ24392
C1: TCPC PS8751, Switch SN5S330, BC1.2 BQ24392
A0: SN1702001
A1: SN1702001
Charger: ISL9238
BUG=b:69378796
BRANCH=none
TEST=make BOARD=grunt
Change-Id: I66918abe3e9452c8d60e51245e730d1bcc168fd3
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/777407
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Bump the USB version (aka bcdUSB) for BOS descriptors to 2.1 (rather
than 2.01) to be compatible with Chrome implementation.
The CL 664813 was intending to do this, but I screw up and only changed
it for chip/g and let chip/stm32 unchanged :
https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/664813
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=twinkie
BUG=none
TEST=manual, plug an updated Twinkie and see the WebUSB pop-up on
Chrome.
Change-Id: Ia81fa91b6d7790af6f6683c0da7ca1d794b4e4df
Reviewed-on: https://chromium-review.googlesource.com/789934
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
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Add a hook for CHIPSET_RESET to allow the EC to indicate if there is
any new panic info present. This helps coreboot to log EC panic info
in eventlog.
Also, update the hook priority for CHIPSET_RESET and HOOK_INIT to
HOOK_PRIO_LAST to allow the EC to first log any software panic before
it is checked.
BUG=b:65732924,b:69334392
BRANCH=None
TEST=Verified following:
1. Force panic_set_reason in EC on CHIPSET_RESET
2. reboot on AP console
3. mosys eventlog list shows "EC Event | Panic Reset in previous boot"
Change-Id: I77b49cd0b3bf05b10efc708e3d81af9ed0e3aa49
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/797911
Reviewed-by: Shawn N <shawnn@chromium.org>
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This change adds a new software panic type PANIC_SW_PMIC_FAULT that
can be used to report any PMIC faults during previous boot.
BUG=b:65732924,b:69334392
BRANCH=None
TEST=make -j buildall
Change-Id: I218b5d01ee145bb02a773495046f4255f1ec8986
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/797910
Reviewed-by: Shawn N <shawnn@chromium.org>
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- We have more flash space to use with nds32 toolchain GCC6.3.0,
so we enable a few console commands that were disabled previously.
And we also enable LTO to reduce the size of FW image.
- Put "__wait_evt" function into ram_code section to
fill the gap of flash and improving performance of code-fetch.
BUG=none
BRANCH=none
TEST=boot to kernel on reef_it8320.
Change-Id: I3b745ff80a57ef1163794864c39c22f7e1f86634
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/788712
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Stalling reset during when CS is asserted is useful to start with, it
was added before out of abundance of caution, but come to think of it,
should the reset happen asynchronously driven be the EC, the AP would
be reset too. And when AP is reset on its own accord, it would not be
transmitting anything on the SPI interface.
On top of that it turns out that in some cases reset on ARM platforms
is accompanied by the CS line driven low, which causes infinite loop
if Cr50 is waiting for CS to deassert before proceeding.
BRANCH=cr50
BUG=b:67008109
TEST=verified that RMA reset operates properly on both ARM and x86
platforms.
Change-Id: I43efd0cefa5d6eb543dfd27e3c9fb3b4bf1a8ea6
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/791818
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
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Coral family has couple SKUs configured in clamshell form
factor, in order to avoid external magnetic field unexpectedly
switches clamshell device into tablet mode, this patch disables
tablet mode interrupt for SKUs in clamshell form factor.
BUG=b:67917181
TEST=emerge-coral chromeos-ec, image to clameshell device,
apply external magnetic field and examine no unexpected
switching to tablet mode through watching powerd logs;
alternately, watch the command 'ectool gpioget TABLET_MODE_L'
changes from 1 to 0 without interrupt, this requires some
hacking dump in board_set_tablet_mode() as reverse proof.
i.e.
tablet_mode_interrupt()
... (deferred hook)
enable_input_devices()
board_set_tablet_mode()
Change-Id: Iccf14cd5e2ea71ab3204aa386f476a9a0e1550c4
Signed-off-by: Harry Pan <harry.pan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/754148
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Coral family has couple SKUs configured in clamshell form
factor, in order to avoid external magnetic field unexpectedly
deasserts TABLET_MODE_L and switches device into tablet mode,
this patch ignores the TABLET_MODE_L pin status for those SKUs.
In other words, always set tablet_mode as 0 for clamshell SKUs.
BUG=b:67917181
TEST=emerge-coral chromeos-ec, image it to clamshell device,
apply external magnetic field and examine there is no unexpected
switching to tablet mode through watching powerd logs.
Change-Id: Ibbe08a00bb14144cad87fdd5a4a39cb3bfe2968e
Signed-off-by: Harry Pan <harry.pan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/748944
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Add initial files for nami from fizz, to be revised later.
BUG=b:69628538
TEST=None
BRANCH=None
CQ-DEPEND=CL:782239
Change-Id: I910a8fc9603471d5de0b34ca5888fff147f9cd6f
Signed-off-by: YH Lin <yueherngl@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/783557
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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BUG=b:69399214
BRANCH=none
TEST=build/flash on nautilus.
check motionsense with ectool
ectool motionsense lid_angle
ectool motionsense odr 2 12500
ectool motionsense
check tablet mode/clamshell mode.
Change-Id: I8da0fb70b6c1b319db9c33f7cd6e4d2486b23b9f
Signed-off-by: Jongpil Jung <jongpil19.jung@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/781484
Commit-Ready: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Tested-by: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Reviewed-by: Philip Chen <philipchen@chromium.org>
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Added while loop in system_reset as a respond to CL
https://chromium-review.googlesource.com/742916. Otherwise, ISH build is
broken.
BRANCH=none
BUG=none
TEST=make BOARD=soraka_ish
Change-Id: I1e2736219c6039e7398da02cd6d492e9474ad27c
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/795030
Commit-Ready: Li1 Feng <li1.feng@intel.com>
Tested-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
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Exitting the recovery insert screen requires pushing the volume up
and volume down keys simultaneously. Modifying the button command
to support multiple buttons.
BUG=b:69390675
BRANCH=None
TEST=button vup vdown 5000
button vdown vup 5000
button vup vdowne
button vdown vup
Make sure that the above command press and release both volume keys.
Make sure that there is a delay added into between presses/releases.
Change-Id: I65817ff6c9da8c422af3345b2d0878b52387b13e
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/783515
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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Coffeecake can charge 5V at 3A current. Host high pullup should be
Rp3000 instead of Rp1500. This change sets USB_C_CC1_DEVICE_ODL to
push-pull mode.
BRANCH=none
BUG=b:67910633
TEST=manual
connect Twinkie sink and measure the CC adc
Signed-off-by: Rong Chang <rongchang@chromium.org>
Change-Id: I471c2f2269ad412851096acb23daf1a5b7dab437
Reviewed-on: https://chromium-review.googlesource.com/758319
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
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We may as well enable this for the early builds of grunt. It changes the
initial power button state to IDLE instead of INIT_ON, adds power signal
logging, and allows port80 printing in interrupt context.
It doesn't look like we use eSPI Virtual-Wire for communication, so this
should be fine.
BUG=b:64935726
BRANCH=none
TEST=make BOARD=grunt && make buildall -j
Change-Id: Id0049dc6733a3ff8727ea9fc616ac8ce24364ae1
Signed-off-by: Justin TerAvest <teravest@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/794290
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Chris Ching <chingcodes@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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EN_USB_PD leaks ~1V to C0_VBUS. This change turns on PD_DISCHARGE when
C0_VBUS is low.
BRANCH=none
BUG=b:67910512
TEST=manual
load on coffeecake, boot into SRC mode, check C0_VBUS voltage.
Change-Id: Ia650ee83c8fef4228d3bb2f7ec5f9eab3e16bf4d
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/758318
Reviewed-by: Benson Leung <bleung@chromium.org>
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Allocated a new PID from the spreadsheet. Change to it so that we're
different from Hoho (and don't get pushed Hoho's firmware by CrOS).
Signed-off-by: Benson Leung <bleung@chromium.org>
BRANCH=none
BUG=b:67953564
TEST=build, flash, test that Chromebooks don't try to update Coffee Cake
with Hoho's firmware.
Change-Id: Ifa7e80b38016bccdf9c797008078ee951d5e05d9
Reviewed-on: https://chromium-review.googlesource.com/726466
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Setting to 3A at 9V would cause some overcurrent condition, flaky Vbus.
Signed-off-by: Benson Leung <bleung@chromium.org>
BRANCH=none
BUG=b:67911354,b:67911671
TEST=Attach hub to Soraka, Pyro, Caroline. Check no overcurrent, stable
supply.
Change-Id: Id06b63ac33224a3a3a538527e15614a0f3fa5d4a
Reviewed-on: https://chromium-review.googlesource.com/726465
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
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This will prevent not allowed voltages (9V) applied on Vbus on initial
attach, where the voltage needs to be vSafe5V.
Signed-off-by: Benson Leung <bleung@chromium.org>
BRANCH=none
BUG=b:67910051
TEST=Plug in Yeeco loader, then walleye, then Yeeco loader. Confirm
5V when loader is attached.
Change-Id: Ic9d40b093d96a4eb8a7ac4649701269f7f55bb33
Reviewed-on: https://chromium-review.googlesource.com/724270
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
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This bit needs to be set to allow Chromebooks to determine that the dock
is an externally powered DRP, so they'll try to charge from it instead of
sitting there with 5V 0A.
BRANCH=none
BUG=b:69056645
TEST=make buildall -j
Check that Chromebooks successfully charge from Coffee Cake.
Signed-off-by: Benson Leung <bleung@chromium.org>
Change-Id: I9b1f207d976ef55b4a3016ba35c99522d4d1fce6
Reviewed-on: https://chromium-review.googlesource.com/723979
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
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This change applies the diff between hoho and coffeecake. I2C master
configuration is added to control buck-boost converter.
BRANCH=none
BUG=none
TEST=make buildall -j
Signed-off-by: Rong Chang <rongchang@chromium.org>
Change-Id: Ia700404ccc4e8d2bd8368a823a0cae911257cf7d
Reviewed-on: https://chromium-review.googlesource.com/673965
Reviewed-by: Benson Leung <bleung@chromium.org>
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SY21612 is buck-boost converter with selectable source/sink mode.
BRANCH=none
BUG=none
TEST=none
Signed-off-by: Rong Chang <rongchang@chromium.org>
Change-Id: I71248eedd9be775790d71010f69dfae41cd64a27
Reviewed-on: https://chromium-review.googlesource.com/673964
Reviewed-by: Benson Leung <bleung@chromium.org>
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Clone HoHo board to CoffeeCake.
BRANCH=none
BUG=none
TEST=make BOARD=coffeecake -j
Signed-off-by: Rong Chang <rongchang@chromium.org>
Change-Id: I62b4bf92a2eaffbc145197c7f36cfb7a29722bf5
Reviewed-on: https://chromium-review.googlesource.com/673963
Reviewed-by: Benson Leung <bleung@chromium.org>
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This CL fixed the issue that ec cannot enter low power mode, which
increases more power consumption in s5, by not setting ESPIRSTWE bit.
For more detail, please see the npcx5's errata rev1_7, No.2.21.
BRANCH=none
BUG=b:69351155
TEST=No build errors for "make buildall".
TEST=build and flash soraka, run commands to read the power consumption:
dut-control pp3300_dsw_ec_cfg_reg:0x7327k
dut-control pp3300_dsw_ec_mw -t 20 | grep "@@"
the average power consumption measured reduces from 42.x to 10.x mw.
TEST=do cold reboot stress test for 4 hours and no symptom occurred.
Change-Id: Ic6fd7fe14ae8acaefd4e1a99ca1625254f67d708
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/778709
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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BUG=b:69694470
BRANCH=none
TEST=build/flash on nautilus rev1.
check if board id is rev1.
EC : version command.
OS : mosys platform version
Change-Id: I2dada47468a08e08efa401a6f519ad40ff2175a4
Signed-off-by: Jongpil Jung <jongpil19.jung@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/787110
Commit-Ready: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Tested-by: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Reviewed-by: Philip Chen <philipchen@chromium.org>
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Bruce SKU # is 8 and 11.
Bruce is convertible.
Bruce has keyboard backlight.
BUG=b:69134506
BRANCH=master
TEST=`ectool motionsense`
Signed-off-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com>
Change-Id: I6368919c3ae9f94b38e1bdae94334c05147dab37
Reviewed-on: https://chromium-review.googlesource.com/792578
Commit-Ready: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com>
Tested-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com>
Tested-by: Vincent Wang <vwang@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: YH Lin <yueherngl@chromium.org>
Reviewed-by: Vincent Wang <vwang@chromium.org>
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Let servo_updater look for configs and firmwares
in the default installed locations.
BUG=b:69016431
BRANCH=None
TEST=sudo servo_updater -b servo_v4
Change-Id: I069b96044ce17992e41a8fc66931477823eef986
Signed-off-by: Nick Sanders <nsanders@google.com>
Reviewed-on: https://chromium-review.googlesource.com/792603
Commit-Ready: Nick Sanders <nsanders@chromium.org>
Tested-by: Nick Sanders <nsanders@chromium.org>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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CONFIG_SB_FIRMWARE_UPDATE is dead on ToT. So, get rid it completely.
BUG=b:69695376
BRANCH=None
TEST=make -j buildall
Change-Id: Ic1eedff21d82f729a73ec9a7c1d554b6b571e827
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/792013
Reviewed-by: Shawn N <shawnn@chromium.org>
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If power-up is inhibited by charger because of battery SOC, then check
for the conditions again on BATTERY_SOC_CHANGE. This allows the EC to
boot the AP up on connecting AC power and SOC going above the minimum
required.
BUG=b:65864825
BRANCH=None
TEST=Verified following on coral and soraka:
1. Discharge battery to ~0%
2. Connect AC power ==> Power-up is inhibited
3. When battery SOC reaches 1%. AP is not taken out of reset:
"[12.974428 Battery 1% / 8h:4 to full]
[12.980439 power-up still inhibited]"
4. When battery SOC reaches 2%, AP is taken out of reset:
"[9.230148 Battery 2% / 4h:5 to full]
[9.236122 Battery SOC ok to boot AP!]"
Change-Id: Ifa89f8929987d86c9e02530b663d563dbe25ed85
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/753294
Reviewed-by: Shawn N <shawnn@chromium.org>
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Similar to CL:774298, intention of chipset_force_shutdown is to power
off the AP by simulating power button press until it results in power
button override and shuts down AP. However, if AP is already in hard
or soft off conditions (i.e. G3, S5G3, G3S5 or S5) then AP is already
off, and simulating power button press results in
charge_prevent_power_on from incorrectly assuming that the power
button is pressed by user. Thus, check if the system is in soft or
hard off before shutting it down.
BUG=b:65864825
BRANCH=None
TEST=make -j buildall
Change-Id: I4b6d798af4618cbd4179f8700ebb2aa78021207e
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/791933
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Intention of chipset_force_shutdown is to power off the AP by
simulating power button press until it results in power button
override and shuts down AP. However, if AP is already in hard or soft
off conditions (i.e. G3, S5G3, G3S5 or S5) then AP is already off, and
simulating power button press results in charge_prevent_power_on from
incorrectly assuming that the power button is pressed by user. Thus,
check if the system is in soft or hard off before shutting it down.
BUG=b:65864825
BRANCH=None
TEST=Verified that apshutdown still works fine from EC console on
soraka.
Change-Id: Id892e5b2c8c1e4ce0bad95a70ea6a3ed547a7047
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/774298
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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There are two different types of suspend states that are supported on
x86 platforms -- S3 and S0ix. When AP enters S3, the chipset state is
identified as CHIPSET_STATE_SUSPEND. On the other hand, when AP enters
S0ix, the chipset state is identified as CHIPSET_STATE_STANDBY. There
are several components within the EC e.g. charger state machine, usb
pd task, motion sense task that take actions based on the chipset
suspend state (and checked only for CHIPSET_STATE_SUSPEND until
now). In order to ensure that different EC components do not have to
worry about checking for all the different types of suspend states
that are supported, introduce a new combination
CHIPSET_STATE_ANY_SUSPEND which is a combination of
CHIPSET_STATE_SUSPEND(S3) and CHIPSET_STATE_STANDBY(S0ix).
BUG=b:69690699
BRANCH=None
TEST=make -j buildall. Ruben verified that with this change, EC power
consumption in S0ix drops from 7.85mW to 6.59mW on Soraka.
Change-Id: I599a0ea2fe2f39132764a6068fa77c3aea02affa
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/786919
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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This patch lowers the priorities of other chargers so that dedicated
chargers are given the highest priority.
Dedicated chargers are adapters shipped with the device and do nothing
but being the power source. Thus, when they're connected, it should be
always used even if other suppliers offer more power.
BUG=b:38321259
BRANCH=none
TEST=make runtests
Change-Id: Ida862eb31c7f9ede36cade99f53645196b6a3f70
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/762339
Reviewed-by: Shawn N <shawnn@chromium.org>
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The --rma_auth command line option is being extended to treat the
auth_code of value of 'disable' as a user request to cancel CCD RMA
mode on the device.
BRANCH=none
BUG=b:68213540
TEST=verified that passing '-f disable' to gsctool causes CCD state on
the Cr50 changed to 'Locked'
Change-Id: I8764e0207977a6290d3d10dc4678f98631be0360
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/784354
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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The new vendor command takes the CCD state machine through necessary
transitions leaving it in the CCD locked state.
It succeeds only if user password is not set and CCD capabilities are
right, which is guaranteed to be the case after an RMA unlock.
BRANCH=cr50
BUG=b:68213540
TEST=tested using the modified gsctool utility.
Change-Id: Ic2cce34e74b1ff476841cfa1a99f50d6a947c315
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/784352
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Now that we have support for 64-bit events, there is no need to
reserve a bit in lower 32 bits for extended events.
BUG=b:69329196
BRANCH=None
TEST=make -j buildall
Change-Id: Ide02c4384c2b3ab4a63b028f126c48b73d6cd269
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/791863
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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This CL fixes two issues:
1. Host events are 1-based. So, if event0 is being requested to be set
in host_event_set_bit, nothing needs to be done.
2. To check if event needs to be set in upper 32-bit, check if the
event # is >32 and not >=32. (This issue was identified by coverity ID
179990).
BUG=b:69329196
BRANCH=None
TEST=make -j buildall
Change-Id: I062b82bdd30da28f62556ab4907a0f3bbf6d8126
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/791862
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Usually, the max current and supply voltage of dedicated chargers
are not known to the EC.
This patch adds EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT, which
allows the host to change the max current and supply voltage of the
dedicated charge port.
BUG=b:64442692
BRANCH=none
TEST=make runtests && buildall. Boot Fizz and let coreboot set
the adapter current and voltage.
Change-Id: I29b3f5762f8b316ca363c23e230530cdf4ca207a
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/769152
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For now we guard charger-based VBUS voltage measurement
behind CONFIG_USB_PD_VBUS_DETECT_CHARGER.
But we should be able to measure VBUS voltage by charger
while detecting VBUS presence by other methods.
BUG=b:67991345
BRANCH=none
TEST=plug in guppy on Scarlet rev2, 'ectool usbpdpower' on console,
and see VBUS is measured as 4975mV
Change-Id: I94cada81159ea4b097001997e2444873ec2d8763
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/789910
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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1. The original driver of OPT3001
a. didn't support to process the command of offset.
b. implemented command of range to setter/getter of Range Number Field
of chip.
But reffering to cros_ec_light_prox.c from linux kernel side, these two
commands are actually leveraged for in_illuminance_calib[bias|scale]
and these calibration factors should be applied into raw lux value read
from the chip.
2. Move ALS in Poppy / Soraka boards from ALS_TASK to MOTIONSENSE_TASK.
3. Mofify parameters of ALS in Reef board in order to adapt changes
here.
BUG=b:69236269
BRANCH=none
TEST=Manually test on the DUT.
Change-Id: Ic3b593feb3e4bc6da0bada6b5d614975f0cf2280
Signed-off-by: Marco Chen <marcochen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/774341
Reviewed-by: Shawn N <shawnn@chromium.org>
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Originally, i2c passthru is limited to use I2C_XFER_SINGLE flag where
it can only read at most 255 bytes at a time. For application that
requires larger i2c bus reading, we change the flag setting and the
command protocol.
TEST=old ./touchpad_updater still works (previous protocol)
TEST=new ./touchpad_updater can get more than 500 bytes per transaction
TEST=Debug message only print when -d assigned.
./touchpad_updater -d
TEST=Manually change #define CONFIG_USB_I2C_MAX_READ_COUNT (1024 - 6)
to #define CONFIG_USB_I2C_MAX_READ_COUNT (1024 - 4) and trigger
POWER_OF_TWO assertion.
BRANCH=none
BUG=b:35587174, b:63993891
Change-Id: Id75b11ea49ba89bab8e18af24d47219030c778c5
Signed-off-by: Chun-Ta Lin <itspeter@google.com>
Reviewed-on: https://chromium-review.googlesource.com/542716
Commit-Ready: Chun-ta Lin <itspeter@chromium.org>
Tested-by: Chun-ta Lin <itspeter@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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GPIO60 (PMIC_INT) is currently only configured for INPUT. Tests showed
that INPUT | PULL_UP has lower power consumption so reconfiguring it
here.
BUG=b:64503543
BRANCH=none
TEST=manual
(on chroot)
$ make BOARD=soraka -j
$ ./util/flash_ec --board soraka
(on DUT)
$ powerd_dbus_suspend
(on chroot)
$ dut-control -p $PORT pp3300_dsw_ec_ma -t 10 | grep @@
> NAME COUNT AVERAGE STDDEV MAX MIN
> pp3300_dsw_ec_ma 5637 1.68 0.17 7.92 1.56
for comparison, without the change, the MIN is 2.00mA
Change-Id: I86407a1440765d040c39272480b185342597d52b
Signed-off-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/786720
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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This only adds the structs for V4 packets. Host command support for
them is coming in a subsequent CL. V3 packets will continue to be
supported for a while, until all sides support V4.
BUG=chromium:787159
BRANCH=none
TEST=make -j runtests
Change-Id: I7e188a063d8ed60c85f3b8359959c424e3ccd1d9
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/780452
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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V5A was enabled in deep sleep state to allow wake from base in deep S3
state. Now that poppy and variants don't plan to use deep S3, this
change is no longer required.
BUG=b:69053636
BRANCH=None
TEST=Verified following:
> ectool i2cxfer 3 0x30 1 0x41
Read bytes: 00
> ectool i2cxfer 3 0x30 1 0x2a
Read bytes: 00
Change-Id: Ice8cabf5ecac3851400af5fef43821f596bc5224
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/786789
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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nautilus doesn't have PS8751(A1,A2).
BUG=b:69389497
BRANCH=none
TEST=build/flash nautilus rev1, power on and boot ok.
check charging/discharging as AC connection.
Change-Id: I371fc90f6730715535036e7d748ce44fa586b737
Signed-off-by: Jongpil Jung <jongpil19.jung@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/778519
Commit-Ready: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Tested-by: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Reviewed-by: Philip Chen <philipchen@chromium.org>
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Nautilus does not use buttons to trigger recovery. Remove
CONFIG_BUTTON_RECOVERY.
BUG=None
BRANCH=None
TEST=make -j buildall
Change-Id: Ic9bdbd60bebb511963439844d09d5260617c77ec
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/784774
Reviewed-by: Philip Chen <philipchen@chromium.org>
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board_has_working_reset_flags was added to poppy/soraka to work around
a hardware issue in early revisions where reset flags would be lost on
PMIC reset. This issue should not occur for nautilus. Hence, get rid
of the function.
BUG=None
BRANCH=None
TEST=make -j buildall
Change-Id: Ib281c17e476bbf52dce055718c7faf61eb6ff507
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/784773
Reviewed-by: Philip Chen <philipchen@chromium.org>
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