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* markarth: Modify LED behavior to meet SPEC.firmware-skyrim-15390.B-mainLogan_Liao2023-05-151-3/+3
| | | | | | | | | | | | | | | | | | | Base on SPEC, modify LED behavior when suspend without charge. Suspend(discharge) : Amber on 1 second, off 3 second. BUG=b:281566886 b:281566507 TEST=test LED behavior meet SPEC. Change-Id: I7ea9612dce41ac0e51bc68481750f5278727ab3b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4520276 Reviewed-by: Chao Gui <chaogui@google.com> Reviewed-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Tested-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Reviewed-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Commit-Queue: Chao Gui <chaogui@google.com> (cherry picked from commit e2a231b82d1f137541e43b1ba761edd226235485) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4530320 Reviewed-by: Diana Z <dzigterman@chromium.org>
* winterhold: Enable CHARGER_MAINTAIN_VBAT Configjohnwc_yeh2023-05-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Prevents charger from requesting minimum voltage when AC is off and battery is not present. LOW_COVERAGE_REASON=no unit tests for skyrim yet, b/247151116 BUG=b:269679145 TEST=test on winterhold, AC only after cold reboot the last time of the charger 0x15(Max System Voltage) not fill in 0x15=0800(2.048V) Change-Id: I716f43adab716823c68f3a1f8a7accfa1ead05db Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4506107 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: JohnWC Yeh <johnwc_yeh@compal.corp-partner.google.com> Reviewed-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Commit-Queue: JohnWC Yeh <johnwc_yeh@compal.corp-partner.google.com> (cherry picked from commit cf0bb2883ee6c9419b5431e47e80ec9f104ceb42) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4525659 Commit-Queue: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
* markarth: Modify VBUS monitor from TCPC.Logan_Liao2023-05-111-0/+4
| | | | | | | | | | | | | | | | | | | | | | | Due to ISL9241 have 200~300mv tolerance, cause 5V test item fail(read 4.4V, measure 4.6V). This patch modify to TCPC monitor Vbus. BUG=b:278988137 BRANCH=skyrim TEST=test monitor VBUS from TCPC success. Change-Id: I53d1fe92595ff65b5a00434c0dc20e638d0ae85c Signed-off-by: Logan_Liao <Logan_Liao@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4486661 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Tested-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Commit-Queue: Logan Liao <logan_liao@compal.corp-partner.google.com> Reviewed-by: Logan Liao <logan_liao@compal.corp-partner.google.com> (cherry picked from commit ca51664045529ad6525c900e4f28ffcb3710e4db) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4520291 Commit-Queue: Chao Gui <chaogui@google.com> Tested-by: Chao Gui <chaogui@google.com> Reviewed-by: Chao Gui <chaogui@google.com>
* config: Add more condition for VBUS measure from charger.Logan_Liao2023-05-111-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | Because of build gradation, build Board layer first, build config.h later, cause that although define monitor TCPC VBUS, code still define CONFIG_PD_VBUS_MEASURE_CHARGER when using ISL9241 which support VBUS measure. BUG=b:278988137 TEST=test VBUS meanure from TCPC success. Zephyr compare builds successful: HEAD: 28be906e09bc69e1b6ea93b5b6aac7e51f91d0d1 HEAD~: 6378b2bd5a61cde2433e92a2ee17f0f7564596da Change-Id: I471e616d6b7ebcf49e3c69b1f037ca4ee5b37c4c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4486660 Reviewed-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Reviewed-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Tested-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Commit-Queue: Logan Liao <logan_liao@compal.corp-partner.google.com> (cherry picked from commit ecab2bd4a7bd388483a6eee18fbcf6dfcfd5f261) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4520290 Reviewed-by: Chao Gui <chaogui@google.com> Tested-by: Chao Gui <chaogui@google.com> Commit-Queue: Chao Gui <chaogui@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Skyrim: Keep retimer enabled in suspendDiana Z2023-05-112-4/+12
| | | | | | | | | | | | | | | | | | | | | | The A1 retimer needs to remain enabled in suspend in order to prevent issues with USB detection on resume. Enable and disable on the transition into/out of S5 instead. BUG=b:273849234,b:280957965 TEST=on frostflow, ensure USB file transfer is able to resume after suspend Change-Id: I0186d54a76c14f3d0141fbeec75ed5b13aa599d7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4455299 Tested-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Robert Zieba <robertzieba@google.com> (cherry picked from commit 1dbb4df1fb4a11c9c0b6c95c34a4b6dedbd4e32f) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4467074 Commit-Queue: Jonathon Murphy <jpmurphy@google.com> Reviewed-by: Chao Gui <chaogui@google.com> Tested-by: Chao Gui <chaogui@google.com> Reviewed-by: Jonathon Murphy <jpmurphy@google.com>
* Frostflow: Always initialize retimer when enabledDiana Z2023-05-111-3/+22
| | | | | | | | | | | | | | | | | | | | | | | The A1 retimer will be enabled anytime the board boots. Ensure that the tuning parameters are applied every time the retimer is enabled again since they clear when the retimer is disabled. BUG=b:273849234,b:280957965 TEST=on frostflow, run suspend stress test and verify retimer initialization always reports success talking to the chip, spot check tuning register contents Change-Id: I147e6e7ad09f3279a77fe3f0757cf6ed140b058c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4450966 Reviewed-by: Chao Gui <chaogui@google.com> Tested-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Robert Zieba <robertzieba@google.com> (cherry picked from commit 7834245c40904dafda75f5102b089aa201644171) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4467252 Tested-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> Reviewed-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> Commit-Queue: Chao Gui <chaogui@google.com>
* crystaldrift: modify battery configurationTang Qijun2023-05-101-5/+5
| | | | | | | | | | | | | | Under Battery mode Press power and refresh key, system reboot failure for battery_get_disconnect_state is BATTERY_DISCONNECTED BUG=b:274211459 TEST=Under Battery mode Press power and refresh key, reboot succeed Change-Id: I9020a15d20ceb22bffa2b9189ffc7d6b96759ae2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4515839 Tested-by: Tang Qijun <qijun.tang@ecs.corp-partner.google.com> Reviewed-by: Chao Gui <chaogui@google.com> Commit-Queue: Chao Gui <chaogui@google.com>
* util: Support inject_keys util with Frostflow kb matrixChao Gui2023-05-091-1/+109
| | | | | | | | | | | | | | | | | BUG=b:268158580 TEST=NONE Change-Id: I34183f23f0460440182ab61d0c0a518abd3ccf23 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4295371 Reviewed-by: Tim Van Patten <timvp@google.com> Reviewed-by: Jonathon Murphy <jpmurphy@google.com> Commit-Queue: Chao Gui <chaogui@google.com> Tested-by: Chao Gui <chaogui@google.com> (cherry picked from commit 9ead57f955c54f736aae38abe64413620ed711ef) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4513643 Tested-by: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com> Reviewed-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> Reviewed-by: Chao Gui <chaogui@google.com>
* crystaldrift: modify port0 ppc configTang Qijun2023-05-035-26/+40
| | | | | | | | | | | | | | | | | | | | design port0 ppc change from aoz1380 to sm5360 BRANCH=skyrim BUG=b:260771028 TEST=1. zmake build crystaldrift test port0 typeC function is ok 2. twister -T zephyr/test/skyrim Change-Id: I4c33c1004d18a07e84cb9390ccf1b686e71c9da7 Signed-off-by: Tang Qijun <qijun.tang@ecs.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4493843 Commit-Queue: Chao Gui <chaogui@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> (cherry picked from commit dcb771689a6fd8c78a3ea110ac492e957c4e1850) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4493445 Reviewed-by: Chao Gui <chaogui@google.com>
* crystaldrift: enable usb hub power controlTang Qijun2023-05-021-10/+9
| | | | | | | | | | | | | | | | usb typeA hub power is controlled by gpio45 BRANCH=skyrim BUG=b:260771028 TEST=test usb typeA function is ok Change-Id: I72ec9d7ff735573b4068d3cca6f1269908c7aebd Signed-off-by: Tang Qijun <qijun.tang@ecs.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4493444 Commit-Queue: Chao Gui <chaogui@google.com> Tested-by: Chao Gui <chaogui@google.com> Reviewed-by: Chao Gui <chaogui@google.com>
* winterhold: modify motionsense cbi info for .c global paramsmatt_wang2023-04-291-21/+16
| | | | | | | | | | | | | | | | | | | | | | | | This CL optimized reading method to disables runtime polling and uses a global variable to store board ID value for switching two accelerators. To prevent the EC busy to send the I2C protocol. LOW_COVERAGE_REASON=no unit tests for skyrim yet, b/247151116 BUG=b:279728061 BRANCH=skyrim TEST=1. It pass to switch the accelerator driver by fw_config. 2. To run the verify CBI EEPROM WP status process over 14600 times got pass result. Change-Id: Ieaf304ff23a39c165d1a3eada39228061380a613 Signed-off-by: matt_wang <matt_wang@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4483314 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Robert Zieba <robertzieba@google.com> Commit-Queue: Diana Z <dzigterman@chromium.org> (cherry picked from commit 0a47a7b0d25eb496ab5525dfb8e577057de086f0) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4493863 Commit-Queue: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
* frostflow: Modify CONFIG_USB_PD_STARTUP_DELAY_MSLeila Lin2023-04-271-1/+1
| | | | | | | | | | | | | | | | Modify the delay time to meet battery wake up time after cutoff. BRANCH=skyrim BUG=b:274648350 TEST=on frostflow, dut can power on after cutoff Change-Id: I778594af6c4a418fc02e009c372b692e748132a0 Signed-off-by: Leila Lin <leilacy_lin@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4483319 Commit-Queue: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> Tested-by: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com>
* crystaldrift: enable usb hub power controlTang Qijun2023-04-263-0/+28
| | | | | | | | | | | | | | | usb typeA hub power is controlled by gpio45 BRANCH=skyrim BUG=b:260771028 TEST=test usb typeA function is ok Change-Id: I55ecb26a0b5e56407618df305a588055d48ba55e Signed-off-by: Tang Qijun <qijun.tang@ecs.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4478813 Reviewed-by: Chao Gui <chaogui@google.com> Commit-Queue: Chao Gui <chaogui@google.com>
* zephyr: led: Change the node depends on display SOCwen zhang2023-04-261-1/+2
| | | | | | | | | | | | | | | | | | | | | | This change makes the zephyr shim led driver use the display SoC for the LED node that depends on battery level, so that the charge LED and the display SoC work synchronously. BUG=b:278512388 BRANCH=none TEST=./twister -T zephyr/test/drivers/ -s drivers.led_driver Change-Id: I82a9e6a18486fb806f49855fbb5773bd7176929a Signed-off-by: wen zhang <zhangwen6@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4430138 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Siyu Qin <qinsiyu@huaqin.corp-partner.google.com> (cherry picked from commit d2ef1409f02da2114d5cd28ec505a3bb897ed655) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4478775 Reviewed-by: Diana Z <dzigterman@chromium.org> Tested-by: JohnWC Yeh <johnwc_yeh@compal.corp-partner.google.com> Commit-Queue: Chao Gui <chaogui@google.com> Reviewed-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com>
* lis2dw: enable the low noise configurationJosh Tsai2023-04-262-0/+8
| | | | | | | | | | | | | | | | | | | | Enable the low noise configuration at Control register 6 bit3. BRANCH=None BUG=b:262680246 TEST=use i2c read_byte command to check the low noise bit is set Change-Id: I19e519d9de69eaaac276027b1ab5bb9f80757eb1 Signed-off-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4359354 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Kornel Dulęba <korneld@google.com> Reviewed-by: Kornel Dulęba <korneld@google.com> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> (cherry picked from commit 9da35bc68bdd8af9e4e9e9c4a6b2f19eef6dac78) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4465589 Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
* accel_list2dw12: Set high perf mode for ODR >= 50zKornel Dulęba2023-04-262-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | Until recently we're used it only as lid accel, where no significant precision is required. However in Winterhold we want to use it for body detection. In order to reduce the noise and make it usable for that purpose we need to set it into "high performance" power mode. ODR is used to recognize the sensor purpose. For lid accel it's set to 12.5Hz, assume that if it's at least 50Hz the high performance is wanted. BUG=b:262680246 BRANCH=none TEST=Set ODR to 50Hz, verify high performance mode is on Change-Id: I8c4decc93d2f2cfcc074cf2399f5cb582eb72696 Signed-off-by: Kornel Dulęba <korneld@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4379149 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> (cherry picked from commit 8b50c762dc2df4d14e7aff4838e2490419be7913) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4465588 Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Commit-Queue: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
* Whiterun: Increase lis12dw2 sensor ODRKornel Dulęba2023-04-261-2/+3
| | | | | | | | | | | | | | | | | | | | It's used for body detection feature. The suggested frequency for that is 50Hz. Adjust the sensor to match that. BUG=b:262680246 BRANCH=none TEST="accelrate 0" prints 50Hz Change-Id: Iec93d4508251bcd63eafbe5c7e4bdee5531c6217 Signed-off-by: Kornel Dulęba <korneld@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4379150 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> (cherry picked from commit f7455239cf4f703eb95be3fed72c691d01eb0539) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4464580 Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Commit-Queue: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
* TCPMv2: Disable PE during ErrorRecoveryDiana Z2023-04-251-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | If ErrorRecovery was requested from the TC layer, ensure that the TC layer also disables the PE layer. Otherwise, the PE states may continue to progress while we're holding Open on the CC lines. Consolidate calls to disable PD messages into the tc_detached() function, which already handles the general necessities of getting the port cleaned up. BRANCH=None BUG=b:276837557 TEST=on skyrim, run some dead battery boots and observe we don't have any instances of sending a Request while in ErrorRecovery Change-Id: I8bd23ff8824b32e3895fe6e71f314aa6f0bc4127 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4416460 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> (cherry picked from commit c3d56ca0232e245c1bbfd8405aef84fbf128ddca) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4472057 Commit-Queue: Chao Gui <chaogui@google.com> Reviewed-by: Chao Gui <chaogui@google.com> Tested-by: Chao Gui <chaogui@google.com>
* Charge_state_v2: Always evaluate battery disconnectDiana Z2023-04-251-8/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Always evaluate the battery disconnect state when we know the battery is physically present. Otherwise, we may miss the battery coming out of disconnect if AC is removed around the same time the battery becomes responsive. This causes us to remain in safe state with an active charge port offering 0mV/0mA. Note this change adjusts the criteria for battery disconnect, counting errors in assessing the battery disconnect state as disconnects. This should account for the fact that the check now runs before we've verified battery communication is okay. BRANCH=skyrim BUG=b:276837557 TEST=on frostflow, ensure units don't show charging when AC is removed after coming out of ship mode Change-Id: Ie52c993005cf389dc2912c6ab9492483b60239a9 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4470067 Tested-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 58d8fc6c170c69beb3d081d9e1f5bafb3dffe83d) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4472392 Tested-by: Chao Gui <chaogui@google.com> Reviewed-by: Chao Gui <chaogui@google.com> Commit-Queue: Chao Gui <chaogui@google.com>
* Revert "Frostflow: Implement LED behavior for RSOC"JohnWC Yeh2023-04-251-24/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 3a71dfa983df103a7435c0f1ff0108beb1d99e77. Reason for revert: Already change the node depends on display SOC Original change's description: > Frostflow: Implement LED behavior for RSOC > > The EC modifies the raw battery level to a 'Display' > level that is then sent to the AP. > Battery Display 0-94%:Amber > Battery Low Display 0-10% > The Display values map to raw values as: > Display Raw > 10 13 > 11 14 > 94 91 > 95 92 > > BUG=b:258153920 > BRANCH=none > TEST=zmake build frostflow > > Change-Id: Iec114b47109f57f15db09dcc80cdb077c4ab884b > Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4105800 > Reviewed-by: Diana Z <dzigterman@chromium.org> > Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> > Reviewed-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> Bug: b:258153920 Change-Id: I918f72998686d9699a757b129bb095a5e1dfb96c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4461254 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> Tested-by: JohnWC Yeh <johnwc_yeh@compal.corp-partner.google.com> Commit-Queue: JohnWC Yeh <johnwc_yeh@compal.corp-partner.google.com> (cherry picked from commit 7659d9fe9486d0ef938d7fe4ba4e10dcce5aa4f5) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4473611 Reviewed-by: Chao Gui <chaogui@google.com> Commit-Queue: Chao Gui <chaogui@google.com>
* Skyrim: Set up BMA422 interruptsDiana Z2023-04-2410-21/+43
| | | | | | | | | | | | | | | | | | | | | The BMA422 sensor provides interrupts. Enable these for all skyrim variants using this chip for more accurate readings when the ODR is changing frequently. BRANCH=skyrim BUG=b:278156424 TEST=on frostflow, ensure factory tablet test passes Change-Id: Iafabd8ccf04cd4df970d6f0c1f77195ba340f76a Signed-off-by: Diana Z <dzigterman@chromium.org> Signed-off-by: Peter Marheine <pmarheine@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4460851 Reviewed-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> Reviewed-by: Chao Gui <chaogui@google.com> Commit-Queue: Chao Gui <chaogui@google.com> (cherry picked from commit ce23f23d1a43782c6dacbfc443ab3b3d2ef4f738) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4461063 Tested-by: Chao Gui <chaogui@google.com>
* frostflow: Add CONFIG_USB_PD_STARTUP_DELAY_MSLeila Lin2023-04-231-0/+2
| | | | | | | | | | | | | | | | | | Add a delay time to wait for battery wake up, which can avoid the situation of not being able to power on after cutoff. BRANCH=skyrim BUG=b:274648350 TEST=on frostflow, dut can power on after cutoff Change-Id: I450889fc2c1bcebb526c833d5b0c066e153ef798 Signed-off-by: Leila Lin <leilacy_lin@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4462977 Reviewed-by: Chao Gui <chaogui@google.com> Tested-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> Reviewed-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> Commit-Queue: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com> Tested-by: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com>
* winterhold: Implement custom fan duty adjustment logicKornel Dulęba2023-04-223-0/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | It's strongly based on the existing logic from zephyr/shim/src/fan.c. The main difference is that the fan duty is changed less aggressively, in order to avoid fan oscillation. This is done by implementing a "grace period" functionality. After the duty is change the controller will wait for a few ticks, depending on how big the change was. This is a quick fix, at some point it should be replaced by a PID type of algorithm. BUG=b:276577324 BRANCH=none TEST=Verify that the fan doesn't ramp up and down all the time under various scenarios, e.g. watching multiple videos on youtube. Co-developed-by: Radosław Biernacki <biernacki@google.com> Change-Id: I893a7802df8f5271fe1a253272fdcc3149bdf178 Signed-off-by: Kornel Dulęba <korneld@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4423153 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Radoslaw Biernacki <biernacki@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> (cherry picked from commit 17b095b064576c66e8556e6bb194ab8e8d23f412) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4459716 Commit-Queue: Chao Gui <chaogui@google.com>
* whiterun: Adjust CPU fan thermal parametersKornel Dulęba2023-04-211-3/+3
| | | | | | | | | | | | | | | | | | | | | | | The difference between temp_fan_off and temp_fan_max was set to 6°C. Consequently, a one-degree difference in CPU temperature would cause a significant change in fan RPM. This results in noticeable noise variations when the CPU is subjected to a specific load. To alleviate this issue, decrease the temp_fan_off by 4°C, which, in turn, reduces the steepness of the temperature-to-RPM relationship. BUG=b:276577324 BRANCH=none TEST=Run webGL aquarium with various number of fish Change-Id: I72ec924e61a68e61a9c7f9721b7df15d18aaa2ee Signed-off-by: Kornel Dulęba <korneld@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4427797 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Tim Van Patten <timvp@google.com> Reviewed-by: Radoslaw Biernacki <biernacki@google.com> (cherry picked from commit 0852c76440bade57d203bc0f985de56a548c530c) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4456123 Commit-Queue: Chao Gui <chaogui@google.com>
* zephyr: Add support for board override of fan duty adjustment logicKornel Dulęba2023-04-213-52/+83
| | | | | | | | | | | | | | | | | | | | | | | | The generic logic has proven to not work well on whiterun. In order to mitigate that, while not affecting everyone else, a custom fan duty adjustment logic needs to be implemented. The behavior is controlled with CONFIG_CUSTOM_FAN_DUTY_CONTROL, which will be enabled on whiterun in a another patch. Some structs has been moved to the fan header, so that they can be accessed from the custom logic. BUG=b:276577324 BRANCH=none TEST=make try_build_boards Change-Id: Iff31b6526be83b8b0165c4490bafe26f131e6c84 Signed-off-by: Kornel Dulęba <korneld@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4423152 Reviewed-by: Keith Short <keithshort@chromium.org> (cherry picked from commit 9c8a27f107801953e4a3c9612aa74b45940ad148) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4459714 Commit-Queue: Chao Gui <chaogui@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Tim Van Patten <timvp@google.com>
* markarth: Update battery shipping mode parameterLogan_Liao2023-04-112-3/+3
| | | | | | | | | | | | | | | | | | | | | | | According to the power team document, modify battery(ap19b8m & ap20cbl) shipping mode parameter. modify shipping command to 0x3A from 0x00. modify shipping data to 0xC574 from 0x00. BUG=b:277303266 BRANCH=none TEST=test ectool batterycutoff success, wake success with AC. Change-Id: I74cdcb00ee7abe68f1318483be8f2daf0ddca0a4 Signed-off-by: Logan_Liao <Logan_Liao@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4405801 Reviewed-by: Chao Gui <chaogui@google.com> Reviewed-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Tested-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Commit-Queue: Logan Liao <logan_liao@compal.corp-partner.google.com> (cherry picked from commit 44842a951ca2757856dfae258fd9bde77ae4fd89) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4411599 Commit-Queue: Chao Gui <chaogui@google.com>
* common/battery: Add workaround for erroneous battery temperaturesRobert Zieba2023-03-301-1/+5
| | | | | | | | | | | | | | | | | | | Certain batteries appear to transiently return temperatures of 591.1K and 2151K. These values are clearly incorrect. Add a temporary workaround while the root cause is investigated. BRANCH=skyrim BUG=b:274812415 TEST=Ran suspend_stress_test with no battery temperature wakeups. Change-Id: I0c774a58770fa25907caf50aaf8d672a787addd3 Signed-off-by: Robert Zieba <robertzieba@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4382556 Tested-by: Isaac Lee <isaaclee@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Commit-Queue: Isaac Lee <isaaclee@google.com>
* crystaldrift: modify battery configurationTang Qijun2023-03-284-1/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Battery device name change from NB0280-549358 to MFP-549358 BRANCH=skyrim BUG=b:274211459 TEST=1).ec:~$ battery Status: 0x00e3 FULL DCHG INIT Param flags: 00000002 Temp: 0x0b8b = 295.5 K (22.4 C) V: 0x337d = 13181 mV V-desired: 0x0000 = 0 mV I: 0x0000 = 0 mA I-desired: 0x0000 = 0 mA Charging: Not Allowed Charge: 100 % Display: 100.0 % Manuf: GFL Device: MFP-549358 Chem: LION Serial: 0x03a6 V-design: 0x2d1e = 11550 mV Mode: 0x6001 Abs charge: 108 % Remaining: 4988 mAh Cap-full: 4988 mAh Design: 4656 mAh Charge Cycle: 2 Time-full: 0h:0 Empty: 0h:0 Full Factor: 0.97 Shutdown SoC: 4 % C-FET: -1 2)Battery cutoff is working as expected Change-Id: I70e57193640cb3d00c4a86ba7adff18256b4ce89 Signed-off-by: Tang Qijun <qijun.tang@ecs.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4376402 Reviewed-by: Chao Gui <chaogui@google.com> Commit-Queue: Chao Gui <chaogui@google.com>
* crystaldrift: moidfy fan configTang Qijun2023-03-281-0/+18
| | | | | | | | | | | | | | According to the thermal team's request to modify the fan config. BUG=b:275268397 BRANCH=skyrim TEST=thermal team member test pass Change-Id: If4f72788cc846c739560249c6946e8b358e36caa Signed-off-by: Tang Qijun <qijun.tang@ecs.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4376481 Reviewed-by: Chao Gui <chaogui@google.com> Commit-Queue: Chao Gui <chaogui@google.com>
* frostflow: Set charger min poweron powerLeila Lin2023-03-281-1/+1
| | | | | | | | | | | | | | | | | | Set charger min poweron power to 45000 mw. BUG=b:274648350 BRANCH=skyrim TEST=verify system can power on after battery cutoff Change-Id: I3338273c763cd868b11c17a8c035db862ae8a18d Signed-off-by: Leila Lin <leilacy_lin@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4374678 Reviewed-by: Chao Gui <chaogui@google.com> Tested-by: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com> Commit-Queue: Chao Gui <chaogui@google.com> Reviewed-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> (cherry picked from commit 6f3113bd06d0fea0732df0ed89d43aedafed71ab) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4376359
* markarth: moidfy fan tablematt_wang2023-03-284-7/+172
| | | | | | | | | | | | | | | | | | According to the thermal team's request to modify the fan table. BUG=b:273636132 BRANCH=none TEST=thermal team member test pass LOW_COVERAGE_REASON=markarth not implement fan test yet. b/275133976 Change-Id: I6742b5008b536a760b3f0ddcc3f3d883ba5c7080 Signed-off-by: matt_wang <matt_wang@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4344829 Reviewed-by: Chao Gui <chaogui@google.com> Commit-Queue: Chao Gui <chaogui@google.com> Reviewed-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> (cherry picked from commit 272b7f98b0538d5a0013617a568cd345a5fc1ced) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4374559
* crystaldrift: Adjust tuning for C1Tang Qijun2023-03-271-8/+43
| | | | | | | | | | | | | | | | | C1 requires a different setting for the equalization and flat gain register. BUG=b:265193557 BRANCH=skyrim TEST=SI team test DisplayPort pass Change-Id: I9f15a4f0db323ecf23cde86c59f0877b23eec3fc Signed-off-by: Tang Qijun <qijun.tang@ecs.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4371822 Commit-Queue: Chao Gui <chaogui@google.com> Code-Coverage: Chao Gui <chaogui@google.com> Tested-by: Chao Gui <chaogui@google.com> Reviewed-by: Chao Gui <chaogui@google.com>
* crystaldrift: Modify the charger configurationTang Qijun2023-03-271-0/+3
| | | | | | | | | | | | | | | | | | Enable CHARGER_ISL9238 config for setting charger prochot init BRANCH=skyrim BUG=b:274875755 TEST=$ After charger prochot inited , on the DUT run https://webglsamples.org/aquarium/aquarium.html, fps is normal. Change-Id: I612e9db38b0e0fbe30ba8bde45650808d6d026a4 Signed-off-by: Tang Qijun <qijun.tang@ecs.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4371819 Code-Coverage: Chao Gui <chaogui@google.com> Reviewed-by: Chao Gui <chaogui@google.com> Tested-by: Chao Gui <chaogui@google.com> Commit-Queue: Chao Gui <chaogui@google.com>
* markarth: Modify fw config structureLeila Lin2023-03-248-193/+71
| | | | | | | | | | | | | | | | | | Add keyboard backlight fw config in cbi and add the override ec feature function. Also remove the unused fw config and function. BUG=b:270880660, b:273834148 BRANCH=none TEST=zmake build markarth Change-Id: I4488d473ee2b073a3df96f72926110395c0fc9b4 Signed-off-by: Leila Lin <leilacy_lin@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4362352 Tested-by: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com> Reviewed-by: Chao Gui <chaogui@google.com> Commit-Queue: Chao Gui <chaogui@google.com> (cherry picked from commit 6f1231f6b42bbc723747e733a825672e6c661d72) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4369169
* Whiterun: modify motionsense rotate mappingjohnwc_yeh2023-03-232-1/+6
| | | | | | | | | | | | | | | | | | | | | modify base rot ref rotate mapping for BMI323 LOW_COVERAGE_REASON=no unit tests for skyrim yet, b/247151116 BUG=b:274051075 BRANCH=none TEST=Rotate DUT, the XYZ data is correct. Run CTS: AccelerometerMeasurementTestActivity pass. Change-Id: Ib273388141e873691b37d0c03cf60296ad5920da Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4357160 Reviewed-by: Isaac Lee <isaaclee@google.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> (cherry picked from commit 81e984c8f8f3e2303bac7a690f4d2f49ed2ba7ba) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4363223 Reviewed-by: Chao Gui <chaogui@google.com> Commit-Queue: Chao Gui <chaogui@google.com> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
* Host sleep: Consider a reboot after suspend to be a resumeDiana Z2023-03-232-0/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | When we try to wake the host during a failed resume, the host may reboot rather than actually following the resume path. In this case, we will receive events of "0" indicating we're on a fresh boot and the chipset RESUME hooks never run. Instead, we should treat this new boot as a resume in order to ensure the previous SUSPEND hooks get a RESUME call to go with them. BRANCH=None BUG=b:273327518 TEST=on whiterun, run suspend with bad AP FW version and ensure the backlight turns on after we wake the host Change-Id: I9c8e7ad70dbca5245844a31772e99097256e592f Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4344029 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com> (cherry picked from commit a63d9b0134000bff51dd3eaeca6898f1f671d768) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4363221 Reviewed-by: Chao Gui <chaogui@google.com> Tested-by: Chao Gui <chaogui@google.com> Code-Coverage: Chao Gui <chaogui@google.com> Commit-Queue: Chao Gui <chaogui@google.com>
* third_party: Add option to build and link googletestTom Hughes2023-03-213-0/+46
| | | | | | | | | | | | | | | When CONFIG_GOOGLETEST is enabled, the googletest library will be built and linked into the test images. BRANCH=none BUG=b:254530679 TEST=make BOARD=bloonchipper test-fpsensor_hw -j Cq-Depend: chrome-internal:5548068 Change-Id: I969599ed441415fd809b08396aefcfa92275fbcd Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4348152 Reviewed-by: Andrea Grandi <agrandi@google.com>
* zephyr: ppc: cleanup yaml includesKeith Short2023-03-215-6/+4
| | | | | | | | | | | | | | Not all PPC chips are based on I2C, so move the i2c-device.yaml include into each PPC chip that requires it.` BUG=b:274126703 BRANCH=none TEST=zmake compare-builds -a Change-Id: Ic02446bec3dec3938348d589f7e8a249c75666c7 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4354877 Reviewed-by: Aaron Massey <aaronmassey@google.com>
* cq: Also build host utils in buildallJeremy Bettis2023-03-211-0/+1
| | | | | | | | | | | | | | | | | | There was a recent breakage that escaped the CQ. crrev/c/4338476. Build the host utils also when doing a buildall_only. (Also things that depend on it like make buildall). BRANCH=None BUG=None TEST=Ran make, and also dry in cq Change-Id: I31305111259f7cf5041af5318e3321282c0ab397 Signed-off-by: Jeremy Bettis <jbettis@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4350989 Tested-by: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
* Skyrim: enable cbi wpmick_hsiao2023-03-201-0/+1
| | | | | | | | | | | | | | | Change CONFIG_PLATFORM_EC_EEPROM_CBI_WP=y BUG=b:273863891 BRANCH=none TEST=ec firmware local build pass the firmware_ECCbiEeprom test Change-Id: I26577df99f16e499c12a2a00018473de665928e8 Signed-off-by: mick_hsiao <mick_hsiao@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4352188 Commit-Queue: Chao Gui <chaogui@google.com> Reviewed-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* gitlab: gather coverage data for nereidPeter Marheine2023-03-201-0/+5
| | | | | | | | | | | | | | Nereid uses a different set of drivers from Nivviks, so it's useful to get coverage for both of these Nissa reference boards. BUG=b:256047664 TEST=gitlab-runner exec docker nereid_coverage BRANCH=none Change-Id: I6d2e156956ba7daabec3e23169e038d3457c0235 Signed-off-by: Peter Marheine <pmarheine@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4349463 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* ec: Add missing #includesJeremy Bettis2023-03-204-0/+7
| | | | | | | | | | | | | | | | | | | There were several headers broken by sorting includes, because they didn't include what they use. Add missing #includes to fix build. BRANCH=None BUG=None TEST=cq Change-Id: I1b7c6d8fc62ace8cb2cbb12df83c0edf81c7dfde Signed-off-by: Jeremy Bettis <jbettis@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4350990 Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Tested-by: Jeremy Bettis <jbettis@chromium.org> Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
* npcx9: Move RW region so we can write protect RO regionCaveh Jalali2023-03-201-4/+9
| | | | | | | | | | | | | | | | | | | | The npcx9 internal flash write protect scheme is very limited. The smallest protectable region is half of the entire flash device, so allocate RO and RW regions to match the hardware. Note: The EC image in the BIOS must match this new region allocation. The only way to do this is to manually update the BIOS and EC. When the BIOS triggers a software sync with mismatched region configurations, the system will endlessly try to software sync. BRANCH=none BUG=b:260815079 TEST=FAFT firmware_ECCbiEeprom passes Change-Id: Id5b9b2bc8d7858f3cb90ef39300ef1f654a080e6 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4334209 Reviewed-by: Keith Short <keithshort@chromium.org>
* frostflow: modify the fan tablematt_wang2023-03-201-4/+4
| | | | | | | | | | | | | | | | | follow the Thermal member's request to modify the fan table BUG=b:257149501 BRANCH=none TEST=Thermal team test PASS Change-Id: I813bcabfc66fee97e98581804cfd9cdf54ec74eb Signed-off-by: matt_wang <matt_wang@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4349522 Tested-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: SamSP Liu <samsp_liu2@compal.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Chao Gui <chaogui@google.com>
* rex: Fix EC_WP_L GPIO polarityCaveh Jalali2023-03-201-0/+3
| | | | | | | | | | | | | | | | The auto-generated generated.dtsi got the EC_WP_L pin polarity wrong. Add an override to fix the polarity. BRANCH=none BUG=b:260815079 TEST=FAFT firmware_ECCbiEeprom passes (with next patch) Change-Id: I866669d534495d815db70bea95728d8358f9f555 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4334208 Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com> Reviewed-by: Madhu 🌱 <mparuchuri@google.com> Commit-Queue: Fabio Baltieri <fabiobaltieri@google.com>
* mt8186: fix sysjump and hibernate actionsEric Yilun Lin2023-03-201-9/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. fix sysjump will boot the system with AP IDLE 1. fix boot with AP OFF 2. fix boot from hibernate The recent change which make the system staying at S5 for 10 seconds when AP power off. When sysjump requested, the RW part will automatically boot the system from S5 due to the initial in_exiting_off flag defaults to true. Since the exiting_off status is controlled by the power_chipset_init, we don't need the flag defaults to true on boot. Also, change the initial power state S5 to G3. They are the same in rail-wise on mt8186, but not in mt8188. Assign it as G3 to match mt8188 initial GPIO and rail states. When the AC on under hiberante, or the EC boots with AP OFF flag, this ensures the system stay at G3. BUG=b:274051287 b:274063396 b:274368558 TEST=pass firmware_ECPowerButton TEST=pass firmware_ECWakeFromULP TEST=dut-control cold_reset:on sleep:1 cold_reset:off, boot to S0 TEST=dut-control power_state:rec; dut-control power_key:tab. stay at S5->G3 TEST=hibernate, and AC on. The EC stays at G3. BRANCH=none Change-Id: I253f4956665a6a0edc2fe59c5a8a90a7c07a6180 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4349381 Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* Geralt: Enable CONFIG_IT83XX_TUNE_CC_PHYmike2023-03-204-1/+14
| | | | | | | | | | | | | | | Enable cc tune function to pass cc eye test BUG=b:270906647 BRANCH=none TEST=test geralt proto board C0 & C1 port cc eye test pass. Change-Id: Ie35517ba3e1fac95cd193eed64241972824c64da Signed-off-by: mike <mike5@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4339656 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Ganxiang Wang <wangganxiang@huaqin.corp-partner.google.com>
* corsola: set GPIO_LID_OPEN as GPIO_INPUT_PULL_UPSiyu Qin2023-03-203-2/+3
| | | | | | | | | | | | | | | | | | | | The lid sensor is on daughter board, if daughter board is disconnected, the EC will detect the floating pin as low, then the lid state is locked as lid close. The DUT cannot power on by power button. So set the pin as GPIO_INPUT_PULL_UP. BUG=b:273422759 BRANCH=corsola TEST=1. disconnect daughter board, 'lidstate' shows 'lid open', and the DUT can power on by power button. 2. connect daughter board, DUT can power on by lid open. 3. ./twister -T zephyr/test/krabby/ Change-Id: I2766d4a3a245efc28621d8a0292390c64721aae4 Signed-off-by: Siyu Qin <qinsiyu@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4344441 Reviewed-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* nissa: add wrapper function for new_variant.pyShou-Chieh Hsu2023-03-201-0/+20
| | | | | | | | | | | | | | BUG=b:271513530 BRANCH=None TEST=run new_variant.py Change-Id: I3103d5475968f576246c83e642ff649e1032f9c3 Signed-off-by: Shou-Chieh Hsu <shouchieh@googlecom> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4349680 Commit-Queue: Shou-Chieh Hsu <shouchieh@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Tested-by: Shou-Chieh Hsu <shouchieh@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* common: Move pse driver into driver placeDavid Huang2023-03-207-0/+289
| | | | | | | | | | | | | | Since there are more projects using this driver. Move it into driver place. BUG=b:273191751 BRANCH=None TEST=make buildall -j Change-Id: I50e2cb480a551ce19722edc2b6f70824f4b9147e Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4335461 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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