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* panqueque: Fix typo in product description stringfirmware-quiche-13883.B-mainScott Collyer2022-06-241-1/+1
| | | | | | | | | | | | | | | | The product name should have been UD-MSTHDC, but it was mistakenly entered as UC-MSTHDC. This CL fixes that error. BUG=b:221112537 BRANCH=quiche TEST=make BOARD=panqueque Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I26f8b99922a883509f7f6e41223698627a77c0bd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3721862 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org>
* panqueque: Modify PSTATE to lock RO firmwareScott Collyer2022-03-171-2/+2
| | | | | | | | | | | | | | | | This CL modifies the two config options required to lock the RO firmware partition. BUG=b:221112537 BRANCH=quiche TEST=make BOARD=panqueque Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I0ca6907bcb61cc056bc8ebd2dc2448e6faf937b5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3530952 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* panqueque: Update the VID/PID and string valuesScott Collyer2022-03-082-4/+4
| | | | | | | | | | | | | | | | | | | This CL updates the VID/PID values from baklava to the required panqueque values. BUG=b:221112537 BRANCH=quiche TEST=make BOARD=panqueque Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: Ie4d28f3a18507f2f06c8b503d9fbdf176c17087a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3484889 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org> (cherry picked from commit a10e861aeff6194bf64109ac15fdc55b2342cbf1) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3509022 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* panqueque: Initial copy from baklavaScott Collyer2022-03-086-0/+621
| | | | | | | | | | | | | | | | | | | | This CL is the starting point for panqueque which is based off baklava. BUG=b:221112537 BRANCH=quiche TEST=make BOARD=panqueque Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I6301c6d1e06dde9e9a3b0c9bb05575467c15102e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3484888 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org> (cherry picked from commit ea7547745892f2f4f772e3c2595e63e41ec870bf) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3508583 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* gingerbread: set USB 3.1 gen 2 ports to 1.5A current limitScott Collyer2021-12-091-1/+7
| | | | | | | | | | | | | | | | | | | This CL fixes adds to a previous CL when change the current limit via the gpio.inc initialization value. This adds the same change in board.c for devices which have RO locked and the 990mA default set. BUG=b:206059703 BRANCH=quiche TEST=verify levels are set high in RW Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: If2612de3b9360e256215bd70693e53addcc902f2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3321396 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org> (cherry picked from commit 284c82af0cd7da8625a05be068c59be387025498) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3321108
* gingerbread: modify vid/pid per customer requestScott Collyer2021-12-012-3/+5
| | | | | | | | | | | | | | | | The existing VID/PID was google based, but the ODM needs the VID/PID to match their first product. BUG=b:201318511 BRANCH=quiche TEST=verifed VID/PID match the desired values Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I0b593d3c61ca64f840e843f22341f3cd1c60584b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3309368 Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Merge remote-tracking branch 'cros/main' into firmware-gwc-fsiScott Collyer2021-11-231007-16530/+28518
|\ | | | | | | Change-Id: Id9b5b5cb1db7428cd9f12452d73842d8c1f2705a
| * honeybuns: Add board level USB_PD_CONNECT hooksScott Collyer2021-11-234-13/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL moves the board specific parts of USB_PD_CONNECT hook to board.c file as there are different GPIOs that must be changed between quiche/gingerbread. For Gingerbread, the USB Hubs are held in reset until there is a usbc attach event. quiche/baklava don't require USB hub resets to be controlled, but do have a separate GPIO indicator the MST hub. BUG=b:206059703 BRANCH=quiche TEST=verified GPIO signal levels for signals affected by this CL on quiche and gingerbread. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I88ef6ddfe5026fc75384507920368681d28a21f9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3291133 Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
| * gingerbread: Set default USB-A 3.1 Gen 2 port current limit to 1.5AScott Collyer2021-11-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USB3.1 gen2 ports support either 900 or 1500 mA current limits. The current limt is controlled by 2 GPIO signals. This CL sets the default values of those GPIO signals to enable the 1500 mA current limit to avoid cases where the 900mA current limit is getting exceeded. BUG=b:206059703 BRANCH=quiche TEST=verify levels with gpioget 1* USB3_P3_CDP_EN 1* USB3_P4_CDP_EN Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I07d847ea746ce7ad5ceb102f2fddb0e4c3db8434 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3291132 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
| * servo_v4p1: Add DP Rx EQ .board_set method for TUSB1064Scott Collyer2021-11-231-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL adds a .board_set method for the TUSB1064 usb_mux config to control the display port rx EQ gain. Previously, this gain was being applied in the driver init() function. The driver has been modified to remove this default gain setting. So now the gain must be selected by the boards that use the TUSB1064. BUG=b:206059703 BRANCH=none TEST=make -j BOARD=servo_v4p1 Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I5e2ce514d11b65b23afb7e59805c4184cffa8e24 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3291131 Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
| * gingerbread: Add DP Rx EQ .board_set method for TUSB1064Scott Collyer2021-11-231-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL adds a .board_set method for the TUSB1064 usb_mux config to control the display port rx EQ gain. Previously, this gain was being applied in the driver init() function. The driver has been modified to remove this default gain setting. So now the gain must be selected by the boards that use the TUSB1064. BUG=b:206059703 BRANCH=none TEST=verified that DP Rx EQ gain is set when the usbc host port is attached. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I4b8e3463aaa216aa1d71aa6a87b9819e6d78121a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3291130 Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
| * usb_mux: tusb1064: Add method to set DP Rx EQ gainScott Collyer2021-11-232-21/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL adds a method to set DP Rx EQ gain. The previous version of the driver was enabling a 10 dB gain by default in the init function. This CL removes setting both gain and EQ_OVERRIDE by default. A separate CL in the stack moves the 10dB gain setting to the board.c file for the only other board that currently is using the TUSB1064. BUG=b:206059703 BRANCH=quiche TEST=Verified on gingerbread that both EQ_OVERRIDE is set and the gain is set in both registers as expected. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: Id2dc6127d27304d8149f7c51a8d527e046595baf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3291129 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
| * zephyr: brya: Enable PSL hibernate configurationRajesh Kumar2021-11-232-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables support for PSL wakeup pin configuration from hibernate mode. BUG=b:206676513 BRANCH=none TEST=zmake configure -B ~/tmp/brya/ brya -b TEST=Tested on brya, moving out of hibernate mode by performing: 1. lid open 2. connecting charger to usb port Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com> Change-Id: Ie880b099f8b68521443037d24b23483f0a2075b2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3287464 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Divya S Sasidharan <divya.s.sasidharan@intel.com> Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com> Commit-Queue: Keith Short <keithshort@chromium.org> Tested-by: Keith Short <keithshort@chromium.org>
| * COIL: Update SPI references to controller/peripheralKeith Short2021-11-2329-36/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update SPI references to controller/peripheral for inclusivity. BUG=b:163885307 BRANCH=none TEST=compare_build.sh Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I19b02fb949aad9ade569c4658a904e9ce59e27c3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3066272 Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Tested-by: Tom Hughes <tomhughes@chromium.org>
| * zephyr: brya: Enable configuration for throttle apRajesh Kumar2021-11-233-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable required configs for throttle ap. BUG=b:200975143 BRANCH=none TEST=zmake configure -B ~/tmp/brya brya -b TEST=EC boot up logs and 'apthrottle' command Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com> Change-Id: Iac3f4fbb6a479fdcf7b0cff58b12e1111b59e872 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3278635 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Divya S Sasidharan <divya.s.sasidharan@intel.com> Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com> Commit-Queue: Keith Short <keithshort@chromium.org>
| * driver: bmi3xx: Fix offset values read/write issueLatchia2021-11-232-50/+175
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bmi323 accelerometer offset values read out doesnot match with the values which we set This issue is solved by, 1.Power mode should be in suspend mode before writing to DMA 2.Resetting the offset using bits of 0x3F in DMA followed by 0x301 CMD 3.Wait time of 120ms after every DMA offset related transaction NOTE: Offset reset will happen everytime when we write but FOC should not reset the existing offset BRANCH=none BUG=b:204795428 TEST=1. make BOARD=guybrush -j 2. Flash EC binary on the gurbrush proto 2 device 3. In kernel run: ectool motionsense cd /sys/bus/iio/devices/iio:device2 && cat location cat in_accel_x_calibbias # Displays sensor offset for x axes in terms of milli-g echo 10 > in_accel_x_calibbias # Sets 10 mg as x axes offset cat in_accel_x_calibbias # Should show value as 10 Signed-off-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com> Change-Id: If6478624519aaa6bbe6ae13e9af67e7677365a1f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3283203 Tested-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com> Auto-Submit: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com> Reviewed-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com>
| * zephyr: lis2dw12: Add register to emulatorTristan Honscheid2021-11-231-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the emulator to handle the CTRL1 and add an assert message when attempting to access unsupported registers BRANCH=None BUG=b:200046770 TEST=zmake -D configure --test test-drivers Signed-off-by: Tristan Honscheid <honscheid@google.com> Change-Id: I446e8170a94ce99ea42c4947827470e472887ab2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3296682 Reviewed-by: Keith Short <keithshort@chromium.org>
| * zephyr: it8xxx2: increase shell stack sizeTim Lin2021-11-233-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enter the kernel threads command from the console to know that the shell stack size is close to the limit. If the memory dump command is executed, a kernel panic will occur. BUG=none BRANCH=none TEST=zmake testall console cmd: kernel threads: shell_uart usage:72% : md .b 0xf0xxxx 256: test OK! Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com> Change-Id: Iece3a1a109144813febbf7cf19f4155226be79b0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3295835 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
| * core/cortex-m/task.c: Handle generalized EXC_RETURNJes B. Klinke2021-11-234-4/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previous version of the Cortex-M architecture enumerated a few possible values of the lr register, upon entering an exception handler. The value would indicate aspects of the processor state before being interrupted, and correspondingly how the core should restore state when that value was loaded into the pc register upon completion of the exception handler. The values listed for M0 were: 0xFFFFFFF1: Return to Handler mode. 0xFFFFFFF9: Return to Thread mode. 0xFFFFFFFD: Return to Thread mode. All other values: Reserved. (There are differences between the two "Thread mode" value, which are not important for this discussion.) However, while developing code for STM32L5xx, which is Cortex-M33, I encountered other values besides the above, and it turns out bit 3 indicates whether to return to thread mode or handler mode. See section 2.4.7.2 in this document for details: https://www.st.com/resource/en/programming_manual/pm0264-stm32-cortexm33-mcus-programming-manual-stmicroelectronics.pdf With the above knowledge, I have updated the condition in task.c to handle previously reserved values. BRANCH=none BUG=b:192262089 TEST=Stress test on STM32L552 Nucleo board Change-Id: If9b1995dad39cc87490bd825ee7e35a096712923 Signed-off-by: Jes B. Klinke <jbk@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3297049 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
| * brask: Change GPIO nameDavid Huang2021-11-232-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Change USB_C1_RT_RST_ODL to USB_C1_RT_RST_L BUG=b:206986093 b:194068869 BRANCH=main TEST=make buildall -j success. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: I2165e152f73ee9c0b711b1e53baa7335065fd683 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3295834 Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: caveh jalali <caveh@chromium.org>
| * Cherry: add MKBP_EVENT_WAKEUP_MASKTing Shen2021-11-231-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Config MKBP_EVENT_WAKEUP_MASK properly so EC won't wake AP up in S3. BUG=b:205032443 TEST=suspend_stress_test for 1000 cycles, no premature wakeup by ec BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I36f424366633d749c942601eeaf0df091f3fd291 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3295842 Reviewed-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Rong Chang <rongchang@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
| * primus: modify fan rpm rangeElsie Shih2021-11-231-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | BUG=b:206863093 BRANCH=none TEST=make -j BOARD=primus TEST=verified by thermal team Signed-off-by: Elsie Shih <elsie_shih@wistron.corp-partner.google.com> Change-Id: I1f5dfda45e9155c1d99e9df7c3d72ec50d7541fe Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3292661 Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
| * tomato: enable preserved log for debuggingTing Shen2021-11-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable preserved log for ec reboot bugs like b/207326541. BUG=none TEST=make BRANCH=main Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I8c81605d199c23ede155e7b13fe1e9cb59fca480 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3293756 Tested-by: Ting Shen <phoenixshen@chromium.org> Auto-Submit: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com>
| * nipperkin: support thermal sensor pct2075Zick Wei2021-11-232-14/+20
| | | | | | | | | | | | | | | | | | | | | | | | BUG=b:206704936 BRANCH=main TEST=verify thermal sensor work as intended on nipperkin. Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: I48f40aaa74a408e0110a9ed83f23e23fcbbb4c7b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3290825 Reviewed-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Devin Lu <Devin.Lu@quantatw.com>
| * guybrush: move CONFIG TMP112 to variantZick Wei2021-11-234-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch move CONFIG_TEMP_SENSOR_TMP112 from baseboard to variant. BUG=none BRANCH=main TEST=make BOARD=nipperkin, make BOARD=guybrush, make BOARD=dewatt Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: Ib126d447be4be34e723085f9b9c049cc9da3807f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3291216 Reviewed-by: Rob Barnes <robbarnes@google.com>
| * driver/temp_sensor: support thermal sensor pct2075Zick Wei2021-11-236-0/+165
| | | | | | | | | | | | | | | | | | | | | | BUG=b:206704936 BRANCH=main TEST=verify thermal sensor work as intended on nipperkin Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: Id76d6c09c48a9927e85a0b81b629e9a5639041bd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3290824 Reviewed-by: Rob Barnes <robbarnes@google.com>
| * driver/temp_sensor: add tmp112 into config.hZick Wei2021-11-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_TEMP_SENSOR_TMP112 is missing in config.h, this patch add CONFIG_TEMP_SENSOR_TMP112 into config.h BUG=none BRANCH=main TEST=none Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: I3892c3f478f9f98e6ec023355445ca4e286261fa Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3290991 Reviewed-by: Rob Barnes <robbarnes@google.com>
| * Redrix: Apply CONFIG_CHIPSET_RESUME_INIT_HOOKDevin Lu2021-11-231-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables CONFIG_CHIPSET_RESUME_INIT_HOOK for Redrix. Added this CONFIG the peripheral charger can run the correctly hook to set device event at S0ix BUG=b:205675485 BRANCH=None TEST=On Redrix. See the console with "deviceevent" with S0ix. Enabled Events: 0x00000008 Current Events: 0x00000008 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: Ie0f23ff200368722494335b3dcd66d9dec0bcf9e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3290826 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
| * intel_x86: Apply chipset resume init and suspend complete hooksDevin Lu2021-11-231-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CL:2321875 introduced a hook for chipset resume init and suspend complete. The application was applied for SPI driver for sc7180. This patch applies to intel_x86 as well. The benefit that we can initial the devices (such as PCHG) prior the chipset resume and shutdown the devices after the chipset suspend is completed. BUG=b:205675485 BRANCH=None TEST=make buildall -j Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I7ded958e1d2722b2e48c21466ff6fd2f82ecc5e7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3276030 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
| * bq25710: Allow PKPWR_TOVLD_DEG to be configuredCaveh Jalali2021-11-235-0/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for customizing the input current overload time when in peak power mode. This means ILIM2 can momentarily be exceeded to support system power spikes. BRANCH=none BUG=b:190737958 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I8acb53372eaf63c23f5380cdbb3a4b5b1f9d5ab6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3296744 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
| * zephyr test: SYV682x: Remove sleep TODOsAbe Levkoy2021-11-231-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Time in the test environment is simulated, so sleeps will not need to be replaced with a different mechanism. BUG=b:201420132 TEST=zmake configure --test zephyr/test/drivers BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I011b9764186a130a820cbbfc15e35e4bd463c0e0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3288915 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
| * zephyr: it8xxx2: dts: Add the status setting of UARTTim Lin2021-11-223-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because the ITE serial driver is added and the default is enabled, the status of ite_uart1_wrapper node should be added and set to "okay". BUG=None BRANCH=none TEST=zmake testall Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com> Change-Id: Ieb06a20b248ddcd84817b0133f3cf29aa22b6d79 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3277688 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Tested-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
| * zephyr: console: Use shell backend config struct for main branchJack Rosenthal2021-11-221-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Zephyr main branch introduced a new config struct we need to use for setting up the shell (PR #38384). Detect the change and use the new API when on the main branch. BUG=b:205884929 BRANCH=none TEST=compiles further on main branch (still a few more unrelated issues to resolve) Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Ia4723d42b6220cd934970bf0c1dff5b93ccc6cf7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3296531 Reviewed-by: Keith Short <keithshort@chromium.org>
| * zephyr: zmake: Drop support for per-project zephyr versioningJack Rosenthal2021-11-229-106/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This drops all support for projects to specify which zephyr version they use. Zmake no longer cares what Zephyr version you give it: it will simply use whatever's passed for --zephyr-base and be happy with it. This intentionally hard-codes the checkout path to the v2.7 branch as the Zephyr version used to de-couple from the cutover to the main branch. The follow up CL actually switches to the main branch. (This is, more or less, just self-contained preparatory work in zmake for the transition to main.) BUG=b:205884929 BRANCH=none TEST=unit tests pass TEST=https://gitlab.com/zephyr-ec/ec/-/pipelines/412252730 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I9f8e28cec6466c666862c8f46f1608625a3ec53f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3296530 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
| * zephyr: emul: sn5s330 emul depends on ASSERTAaron Massey2021-11-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Since sn5s30 depends on CONFIG_ASSERT, make it explicit in kconfig. BRANCH=none BUG=b:203364783 TEST=zmake configure --test test-drivers Signed-off-by: Aaron Massey <aaronmassey@google.com> Change-Id: Ifba9c2268ceb1c81481db8f46c4b3536f9b79747 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3292160 Reviewed-by: Yuval Peress <peress@google.com>
| * zephyr: emul: move ln9310 reg bytes checkingAaron Massey2021-11-221-47/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ln9310 emulator is consistent in its use of the bytes parameter in reg read write operations. Move bytes parameter verification to top of read/write register operations. BRANCH=none BUG=None TEST=zmake configure --test test-drivers Signed-off-by: Aaron Massey <aaronmassey@google.com> Change-Id: Ia1732aef8a9e076193bea2ee3ef12bbfb87fcc05 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3285636 Reviewed-by: Wai-Hong Tam <waihong@google.com>
| * zephyr: emul: ln9310 i2c errors to assertsAaron Massey2021-11-222-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | Returning -EINVAL on i2c is inaccurate, do assertion fail instead. BRANCH=none BUG=b:205579152 TEST=zmake configure --test test-drivers Signed-off-by: Aaron Massey <aaronmassey@google.com> Change-Id: If795fdb2d2c75ef3823f3d6ab45514c7dfbee260 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3271778 Reviewed-by: Yuval Peress <peress@google.com>
| * zephyr: test: sn5s330 dead battery boot initAaron Massey2021-11-222-1/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | Verify sn5s330 PP2 are force enabled. BRANCH=none BUG=b:203364783 TEST=zmake configure --test zephyr/test/drivers Signed-off-by: Aaron Massey <aaronmassey@google.com> Change-Id: I118b05140228b89d27790863a3c8ddc62793fedc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3271367 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
| * zephyr test: Use interrupt GPIO for SYV682xAbe Levkoy2021-11-227-87/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set and clear the ALERT_L signal in the SYV682x emulator based on the state of underlying conditions. Test the driver by just setting the underlying conditions instead of calling the ISR from within the test. Define the interrupt signal in the device tree and enable interrupts from it in the test. BUG=b:190519131 TEST=zmake configure --test zephyr/test/drivers BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Idc8b957fe53ce78bd8236e4af6b005636498ada2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3288914 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
| * zephyr: espi: move common function to src/espi.cDino Li2021-11-226-110/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These six functions can be common. Because they use the event data struct of common espi driver header file to parse host's request. BRANCH=none BUG=none TEST=zmake testall On adlrvp, verify that the I/O port (60h/64h, 62h/66h) communication looks good. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I4ccb264343a6cc3a0145ec1db60a7eec0bd79350 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3282974 Reviewed-by: Yuval Peress <peress@google.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Tested-by: Jack Rosenthal <jrosenth@chromium.org>
| * bq25710: Allow PP_IDCHG2 to be configuredCaveh Jalali2021-11-194-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for enabling PROCHOT assertion when the 2nd battery discharge current limit (IDCHG_TH2) is reached. BRANCH=none BUG=b:190737958 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I4e035c6437a728556804adbb142b59e62168cb4e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3292921 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Boris Mittelberg <bmbm@google.com>
| * bq25710: Add PP_IDCHG2 definitionCaveh Jalali2021-11-191-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the register field definition for PP_IDCHG2. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: Ic3e61d7e1e32f8b9fbb28bb4185a9cc9eb080b81 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3292442 Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Boris Mittelberg <bmbm@google.com>
| * config: rename CONFIG_HOSTCMD_SHI to CONFIG_HOST_INTERFACE_SHIKeith Short2021-11-1915-21/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename CONFIG_HOSTCMD_SHI to CONFIG_HOST_INTERFACE_SHI. This makes the host interface selection configs distinct from configs used to enable/disable specific host commands. BUG=b:195416058 BRANCH=main TEST=compare_build.sh Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I35959149554f58c8911459dcd025720b6d66eb32 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095843 Tested-by: Michał Barnaś <mb@semihalf.com> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
| * config: rename CONFIG_HOSTCMD_ESPI to CONFIG_HOST_INTERFACE_ESPIKeith Short2021-11-1979-127/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename CONFIG_HOSTCMD_ESPI to CONFIG_HOST_INTERFACE_ESPI. This makes the host interface selection configs distinct from configs used to enable/disable specific host commands. BUG=b:195416058 BRANCH=main TEST=compare_build.sh Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I7f52614ca9a0dd54cc7e96e51bba40453564198e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095842 Tested-by: Michał Barnaś <mb@semihalf.com>
| * config: rename CONFIG_HOSTCMD_LPC to CONFIG_HOST_INTERFACE_LPCKeith Short2021-11-1919-25/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename CONFIG_HOSTCMD_LPC to CONFIG_HOST_INTERFACE_LPC. This makes the host interface selection configs distinct from configs used to enable/disable specific host commands. BUG=b:195416058 BRANCH=main TEST=compare_build.sh Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I6d8722cd314aa7801ea11c1ead5ef6bdd113fd58 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095841 Tested-by: Michał Barnaś <mb@semihalf.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
| * config: rename CONFIG_HOSTCMD_HECI to CONFIG_HOST_INTERFACE_HECIKeith Short2021-11-198-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename CONFIG_HOSTCMD_HECI to CONFIG_HOST_INTERFACE_HECI. This makes the host interface selection configs distinct from configs used to enable/disable specific host commands. BUG=b:195416058 BRANCH=main TEST=compare_build.sh Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I2a9e490c2fd6f54f7ab9be809ed2711aa3244409 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095840 Tested-by: Michał Barnaś <mb@semihalf.com> Reviewed-by: Aaron Massey <aaronmassey@google.com>
| * taeko: Calibrate the orientation matrixreno.wang2021-11-191-15/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | BUG=b:201504044 BRANCH=None TEST=make -j BOARD=taeko, check x, y, z axis of sensor 1 and 2 via ectool motionsense. Signed-off-by: reno.wang <reno.wang@lcfc.corp-partner.google.com> Change-Id: I04f411f188a276adfe1c44b9f7eb644bc94df4aa Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3247510 Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: YH Lin <yueherngl@chromium.org>
| * Brya: Add USB mux taskDiana Z2021-11-199-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the USB mux task for brya boards, since their virtual mux sets may take some non-trivial amount of time. BRANCH=None BUG=b:186777984 TEST=on brya, run validation (tracked in b/202883250) Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I150b1dc1072c65e93fb407abbf336d9df95b7a88 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095439 Reviewed-by: caveh jalali <caveh@chromium.org>
| * Felwinter : Add IOEX to control NCT38XX RT_RST_ODL.Logan_Liao2021-11-192-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This Patch add IOEX(C1) to enable DB retimer. BUG=b:205662704 BRANCH=none TEST=test SKU1 DB USB3.2 detect success. Change-Id: Ia6b37847c7e84508422b16d35a00194aac32108d Signed-off-by: Logan_Liao <logan_Liao@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3271802 Reviewed-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com> Tested-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Commit-Queue: Logan Liao <logan_liao@compal.corp-partner.google.com>
| * gitlab: Generate coverage report for hayatoJeremy Bettis2021-11-191-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Generate a coverage report for hayato also. BRANCH=None BUG=None TEST=None Change-Id: Ic789460166282f3ad631aa0091e81eddc84a08db Signed-off-by: Jeremy Bettis <jbettis@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3289292 Tested-by: Jeremy Bettis <jbettis@chromium.org> Auto-Submit: Jeremy Bettis <jbettis@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
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