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* npcx/timer: Unroll udelayfirmware-nami-10775.108.BDaisuke Nojiri2021-11-116-13/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch flattens udelay by unrolling __hw_clock_source_read. This increases the chance that we record LR of the instruction near which an infinite loop happened. > battery 1 1000000 ... WATCHDOG PC=1008a76c / LR=1008c81f / pSP=200c44f8 (task 10) ### Time: 0x0000000000f22630 us, 15.869488 s Deadline: 0x0000000000f43946 -> 0.135958 s from now Active timers: Tsk 14 0x0000000000f43946 -> 0.135958 Task Ready Name Events Time (s) StkUsed 0 R << idle >> 00000001 4.840735 80/672 1 R HOOKS 80000000 0.788073 648/800 2 USB_CHG_P0 00000000 0.001591 312/672 3 USB_CHG_P1 00000000 0.004209 320/672 4 R CHARGER 40000000 0.103775 400/800 5 R MOTIONSENSE 80000004 0.098946 560/928 6 CHIPSET 00000000 0.000588 296/800 7 KEYPROTO 00000000 0.000019 128/672 8 PDCMD 00000000 0.001017 328/672 9 HOSTCMD 00000000 0.043613 336/800 10 R CONSOLE 00000000 2.342869 384/800 --- UART initialized after reboot --- [Reset cause: watchdog] [Image: RO, nami_v1.1.8956-b85666cd37 2021-11-10 15:07:11 some@host] [0.003867 init buttons] [0.004086 Inits done] Restarting system with PMIC. ... WATCHDOG PC=1008a76c / LR=1008c81f / task=10 r0 : r1 : r2 : r3 : r4 :dead6664 r5 :1008a76c r6 :00000000 r7 :00000000 r8 :00000000 r9 :00000000 r10:00000000 r11:00000000 r12: sp :00000000 lr : pc : mmfs = 0, shcsr = 0, hfsr = 10000028, dfsr = 0, ipsr = 1008c81f BUG=b:200593658, b:205841546 BRANCH= TEST=Run hacked battery command to trigger WDT on Sona. Verify the LR points to command_battery instead of udelay. See above. Change-Id: Ibd6cbcf18ab6d58c06ddfd19021058268289bf00 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3235653 Reviewed-by: caveh jalali <caveh@chromium.org>
* common: Define markers for weak symbolsDaisuke Nojiri2021-11-101-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces macros to mark weak symbols. These macros are used to annotate weak definitions, declarations, and overriding definitions. __override_proto: declarations __override: definitions which take precedence __overridable: default (weak) definitions Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium.org/964060 BRANCH=none TEST=buildall Change-Id: I44cec41e0523e285db19a890d084b52337f64a9c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1633911 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Tested-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3272354 Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* Panic: Save LR and code location in HFSRDaisuke Nojiri2021-11-104-9/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since Nami's PMIC reset clears panic data, we currently report only a few fault registers (HFSR, MMSR, etc.), IPSR, r4, and r5. These are included in a feedback report but not very useful. To debug a crash happening remotely, this patch makes the assert handler, the watchdog handler, and the panic handler store PC, LR, and some additional info. | regs[1] | regs[3] | regs[4] | HFSR | (IPSR) | (r4) | (r5) | [29:2] -------+---------+----------+----------+-------------------- Assert | n/a | __func__ | __FILE__ | [29:26] Flags (=3) | | | | [25:10] Line# | | | | [ 9: 2] Task# -------+---------+----------+----------+-------------------- WDT | LR | Reason | PC | [29:26] Flags (=4) | | | | [ 9: 2] Task# -------+---------+----------+----------+-------------------- Panic | IPSR | LR | PC | n/a -------+---------+----------+----------+-------------------- Note that this patch is created under several constraints imposed by the released RO. Some of the constraints are as follows: - It's the RO not RW who saves the panic data into BBRAM. This is for avoiding executing extra code in a restricted environment (= panic). - If RO sees a watchdog reset without reason == PANIC_SW_WATCHDOG, it stores PANIC_SW_WATCHDOG in r4 and clears r5 and IPSR. - BBRAM is already used up to the max (64 bytes). Obviously, a patch for ToT would be very different (and much cleaner) since it's free from these constraints. Most importantly, there is no PMIC reset which erases panic data. > crash assert ASSERTION FAILURE '0' in command_crash() at common/panic_output.c:165 Rebooting... --- UART initialized after reboot --- [Reset cause: soft] [Image: RO, nami_v1.1.8956+f067821734 2021-11-09 12:31:41 some@host] [0.003853 init buttons] [0.004072 Inits done] Restarting system with PMIC. > panicinfo ASSERTION FAILURE in command_crash() at common/panic_output.c:165 r0 : r1 : r2 : r3 : r4 :100a9f82 r5 :100a89e0 r6 :00000000 r7 :00000000 r8 :00000000 r9 :00000000 r10:00000000 r11:00000000 r12: sp :00000000 lr : pc : mmfs = 0, shcsr = 0, hfsr = c029428, dfsr = 0, ipsr = 100995ad > crash divzero === PROCESS EXCEPTION: 06 ====== xPSR: 41000000 === r0 :00000000 r1 :100a8f09 r2 :400c4000 r3 :00000000 r4 :1009956f r5 :1009956e r6 :200c07c4 r7 :100a4fe3 r8 :100a4fde r9 :100a3a54 r10:00000000 r11:200c07d2 r12:00000000 sp :200c4508 lr :1009956f pc :1009956e Undefined instructions mmfs = 10000, shcsr = 70008, hfsr = 0, dfsr = 0, ipsr = 00000006 =========== Process Stack Contents =========== 200c4528: 00000002 200c4548 200c07c4 200c0400 200c4538: 00000002 1008d2c7 00000000 200c07c4 200c4548: 200c07c4 200c07ca 00000000 00000000 200c4558: 00000000 00000000 00000000 00000000 Rebooting... > crashinfo === PROCESS EXCEPTION: 06 ====== xPSR: ffffffff === r0 : r1 : r2 : r3 : r4 :1009956f r5 :1009956e r6 :00000000 r7 :00000000 r8 :00000000 r9 :00000000 r10:00000000 r11:00000000 r12: sp :00000000 lr : pc : Undefined instructions mmfs = 10000, shcsr = 0, hfsr = 0, dfsr = 0, ipsr = 00000006 > crash watchdog >### WATCHDOG PC=100995ae / LR=100995ad / pSP=200c4508 (task 10) ### Time: 0x0000000009dd5f1d us, 165.502749 s Deadline: 0x0000000009de2ab3 -> 0.052118 s from now Active timers: Tsk 14 0x0000000009de2ab3 -> 0.052118 Task Ready Name Events Time (s) StkUsed 0 R << idle >> 00000001 134.736448 80/672 1 R HOOKS 80000000 0.935280 648/800 2 USB_CHG_P0 00000000 0.001806 312/672 3 USB_CHG_P1 00000000 0.004606 320/672 4 R CHARGER 80000000 1.657817 424/800 5 R MOTIONSENSE 80000004 1.789985 560/928 6 CHIPSET 00000000 0.000396 296/800 7 KEYPROTO 00000000 0.002983 312/672 8 PDCMD 00000000 0.000065 112/672 9 R HOSTCMD 00000001 0.517519 568/800 10 R CONSOLE 00000000 2.074095 332/800 ... > panicinfo > ### WATCHDOG PC=100995ae / LR=100995ad / task=10 r0 : r1 : r2 : r3 : r4 :dead6664 r5 :100995ae r6 :00000000 r7 :00000000 r8 :00000000 r9 :00000000 r10:00000000 r11:00000000 r12: sp :00000000 lr : pc : mmfs = 0, shcsr = 0, hfsr = 10000028, dfsr = 0, ipsr = 100995ad BUG=b:200593658 BRANCH=Nami TEST=Sona. Run crash assert. Verify function name, file name, line number, task id are stored in r4, r5, ipsr by panicinfo after PMIC reset. Change-Id: I55b142ac4de14c05a8184a66ed127c9cbcd29745 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3271351 Reviewed-by: caveh jalali <caveh@chromium.org>
* watchdog: Save LR in panic data when watchdog triggersDaisuke Nojiri2021-10-121-0/+11
| | | | | | | | | | | | | | | | | | | We currently save a panic reason (e.g. PANIC_SW_WATCHDOG), PC, task index but not LR. LR often points to the actual code causing the crash because PC points to a generic API (e.g. udelay). This patch makes the watchdog handler store LR to cm.hfsr. It is for HardFault status register but it is probably the least informative register used by chip_panic_data_backup/restore of the existing RO. BUG=b:200593658 BRANCH=Nami TEST=Sona. Run crash watchdog. Verify panic_data_print prints LR. Change-Id: Icf9fffe1a8eed0d3b7e8d36f9c6234fe56133ea4 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3218118 Reviewed-by: caveh jalali <caveh@chromium.org>
* Clear OWNERS for factory/firmware branchBrian Norris2021-09-102-10/+1
| | | | | | | | | | | | BUG=none TEST=none Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3155207 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Owners-Override: Jora Jacobi <jora@google.com> Tested-by: Jack Rosenthal <jrosenth@chromium.org>
* nami: Lower sensor max ODRGwendal Grignou2020-09-261-0/+3
| | | | | | | | | | | | | | | | BUG=b:160199469 BRANCH=nami TEST=Using R85-13310.46.0 Check ectool motionsense info 1 or 2 returns 100Hz speed. Check cheets_CTS_P.x86.CtsSensorTestCases passes on first try. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: Icd5d3e88cafde244d185e068e7734657641f53ec Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2353384 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Cheng-Hao Yang <chenghaoyang@chromium.org> (cherry picked from commit 1ad978cb2c16159216e0c8bbea3f61215d6f75df) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432415
* Pantheon: Make precharge current conform to the specdnojiri2020-03-311-1/+1
| | | | | | | | | | | | | | | | | | Sunwoda battery datasheet pre-charge current has been reduced in datasheet from 363mA to 200mA and EC code needs to be reduced. Signed-off-by: dnojiri <dnojiri@chromium.org> BUG=b/151445389 BRANCH=Nami TEST=build Change-Id: I6f046ca0168840083866289dbe01e82e6fc96e6a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2103572 Reviewed-by: Craig Hesling <hesling@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* stm32: Fix manual interrupt clearing functionCraig Hesling2020-03-161-1/+3
| | | | | | | | | | | | | | | | | | | | | This fixes a bug in gpio_clear_pending_interrupt, where all pending interrupts are unintentionally cleared. This is not in the code path for normal gpio interrupt handlers, since the normal interrupt clearing occurs in gpio_interrupt (right below this function). BRANCH=none BUG=chromium:1059520 TEST=none Signed-off-by: Craig Hesling <hesling@chromium.org> Change-Id: I4d6fe7947f4d76cf3b57dfbf3bb926e41851c80c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2101208 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> (cherry picked from commit c2c2c083fef813e3e3c70f8c13a1418717ba682d) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2106678
* nami: Enable extpwrlimit option in ectoolShelley Chen2020-02-271-1/+1
| | | | | | | | | | | | | BUG=b:149997506 BRANCH=nami TEST=ectool extpwrlimit 3000 5000 Signed-off-by: Shelley Chen <shchen@google.com> Change-Id: I34da082b8475ae4b200586d604ad653186fc5299 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2079364 Reviewed-by: Shelley Chen <shchen@chromium.org> Commit-Queue: Shelley Chen <shchen@chromium.org> Tested-by: Shelley Chen <shchen@chromium.org>
* Nami: Allow power role swap to sink in S0ixDiana Z2019-11-011-4/+9
| | | | | | | | | | | | | | | | | | | | | | | Currently, if a hub is plugged in during S0 and a system is suspended to S0ix, we will reject any requests from that hub to power role swap if it becomes powered (note this is not a concern for S5, when we will disconnect a sinking partner, so on becoming powered the hub would start a new connection). This change allows role swaps if we are currently sourcing a partner who could be providing us power instead. BUG=b:143572158 BRANCH=nami TEST=plugged in unpowered 3-in-1 dongle to casta in S0, closed the lid to trigger S0ix, plugged in power to the dongle and saw power role swap was accepted Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I76eea8d74df1b827ae39d54392627e90db0d6a95 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1894766 (cherry picked from commit 8006bf797e1b85d34dc4ceffc0f5db9f6f03fce5) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1894768
* servo_v4: add per port dualrole settingNick Sanders2019-11-0140-201/+1136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support to configure dualrole setting per port, so that servo v4 can adjust charge and dut port separately. servo will detect charge capability on CHG port and choose source or sink as appropriate. Fix null dereference bug in genvif duel to dynamic src_pdo. "cc" command allows src, snk, srcdts, snkdts configurations. BRANCH=None BUG=b:72557427,b:143572158 TEST=charge through and also passive hub. Note Dru doesn't accept DTS hub. TEST=make buildall -j Change-Id: I650fac21275e79b9268046e9556a6b53070c4fbf Signed-off-by: Nick Sanders <nsanders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1096654 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1893978 Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 123a2fd4e49342d8925117b8339af6c3fc3768a3) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1894539 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* EC: Do not drop SCI events responsible for wake.Ravi Chandra Sadineni2019-09-192-7/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | EC currently clears all events(main copy of hostevents) on every resume. This seems to be added to clear events that are only part of wake mask and not part of SCI mask as they can stick and cause premature wake on next suspend. This patch stops clearing events that are part of SCI mask from the main copy as ACPI subsystem will query and clear them on resume anyway. This helps kernel to identify the reason for wake if it caused by events that are part of SCI mask. Previously coreboot used to depend on main copy to log wake reason. i.e on every resume coreboot used to query and log and clear the wake reason by reading all events from the main copy. Since this also comes in way of kernel in identifying the wake reason, this change also sets up events_copy_b for coreboot by clearing it on every suspend entery. More details can be found at http://go/hostevent-refactor. BUG=b:141248527 BRANCH=None TEST=Tested suspend/resume with wakeup count on hatch and grunt. Change-Id: I0fac250d4dac49af960b29e8b0e28841af2ef509 Signed-off-by: Ravi Chandra Sadineni <ravisadineni@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1717498 Reviewed-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit 74f268374972bdc8bd6c2a5c412d31edafa812b1) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1809817 (cherry picked from commit a9ea6907339ff2a99970f8de4d1655bc17107435) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1814417
* usb_pd_protocol: Add a 3ms delay between polling ALERT#.Aseda Aboagye2019-09-181-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | In order to prevent tasks from being starved and eventually a watchdog reset, add a short 3ms sleep to give other tasks a chance to run. BUG=b:115452695,b:140596045 BRANCH=firmware-nocturne-10984.B TEST=Flash nocturne; plug in hoho on port 0 and blackcat on port 1, verify that EC does not watchdog reset. Change-Id: Ia81770e1cf4191205153aa3919290f6a5440ddf2 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1247638 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit 720f1078aca231939147e9ed7c8b4ef3bfe84e89) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1811465 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 40c69e55dc29c70ed2e36959833b83f01a67483b) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1811711
* nami: add implicitly defined to support kblightLeo-Tsai2019-08-271-0/+4
| | | | | | | | | | | | | | | | | | | Sona support Keyboard backlight, So add implicitly defined to config.h BUG=b:139723503 TEST=Verify Sona can use keyboard backlight hotkey to change the brightness Change-Id: Iffd093e5ef0ea900961a0d1cb6a8992a2f0faf14 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1771097 Tested-by: LeoCX Tsai <leocx_tsai@compal.corp-partner.google.com> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 86a0c5470620179f56d83a21e56c8c4db60bfdcc) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1773313 Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* tablet-mode: Disable tablet mode in recovery bootDaisuke Nojiri2019-08-093-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | In recovery boot, keyboard could be unintentionally disabled due to unstable accels, which are not calibrated. This patch disables tablet mode in recovery boot. We get the same effect if motion sensors or a motion sense task are disabled in RO. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium:984086,b/137251616 BRANCH=none TEST=buildall Change-Id: Idcf53ad119edbd8ff9362523ec7a72f438ae4401 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1696914 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1726333 Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit bff87743ed058db1971aeb16c6fb2387feb531f5) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1747048
* Nami: Clear EC_FEATURE_PWM_KEYB for the sku not supporting keyboardSue Chen2019-07-182-0/+14
| | | | | | | | | | | | | | | | | | | | | backlight in Bard. If sku_id is without SKU_ID_MASK_KBLIGHT, it should clear EC_FEATURE_PWM_KEYB in feature flags0 to let the OS know that the device does not support keyboard backlight. BUG=b:137097125 BRANCH=nami TEST=Make sure that keyboard backlight brightness scale won't show up when sku id is without SKU_ID_MASK_KBLIGHT. Change-Id: Ibe482a12c5113c430b585f8ad95366f222f8f939 Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1709043 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* Nami: Don't register keyboard backlight driver if not usedDaisuke Nojiri2019-06-272-6/+8
| | | | | | | | | | | | | | | | | | | BIT(0) of SKU_ID indicates a keyboard backlight controller presence. If it's not present, we shouldn't register a driver. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/ BUG=b/78360907,b/78141647,b/76182445,b/79898204 BRANCH=Nami TEST=buildall Change-Id: I0288c271a844990bdf015a8aa7dc695dbe936d87 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1680667 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* Nami: Set LED pattern only when pattern is differentDaisuke Nojiri2019-06-271-19/+40
| | | | | | | | | | | | | | | | | | | This patch makes EC check the currently active LED pattern before setting a new pattern. This will prevent a power LED from blinking every time the soc changes. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/135897885 BRANCH=Nami TEST=Verify LED behavior on Sona Change-Id: I5175dcd12c17c405bdb41f8fd6d370cf0ab272e8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1680660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* Nami: Don't enter DP Alt Mode when AP is off.Daisuke Nojiri2019-06-241-0/+16
| | | | | | | | | | | | | | | | | | | Copied from CL:1652609. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/130617222 BRANCH=nami TEST=build Change-Id: I592c52311a8de3ef0947cbcad295fa1d6aab1a11 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1669872 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 7b81c0ac3b0c046b271f64cd276c2562406ebaeb) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1674047
* nami: Disable tight timestampsEnrico Granata2019-06-101-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Nami boards do not have a dedicated GPIO for MKBP events between EC and AP. On boards without this hardware support, the tight timestamps feature cannot be reliably supported due to issues with the performance of the ACPI SCI chain, compared to a dedicated interrupt. Disabling tight_timestamps restores legacy behavior that is known to fare better with sensors events over SCI. BUG=b:123700100,b:133433007 BRANCH=nami TEST=tight_timestamps is 0 testSensorTimeStamps passes 8/10 tries Change-Id: I4b5816eb09e635a3d167a4b8accefab1552a40c4 Signed-off-by: Enrico Granata <egranata@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1629315 Reviewed-by: Kazuhiro Inaba <kinaba@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1648956 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* motion: Split configuration for sensor FIFO and tight timestampsEnrico Granata2019-06-103-1/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_ACCEL_FIFO was being used both to control the size of the sensor FIFO, and the notion of tight timestamps. The latter is related to the format the EC uses to send sensor event timestamps and not to the size of the FIFO. Split this latter portion into its own configuration flag, CONFIG_SENSOR_TIGHT_TIMESTAMPS. This defaults to enabled, and should be turned on for all new boards. It will be selectively disabled on a few boards where the AP-side filtering this enables does not perform optimally due to jitter issues. BUG=b:123700100 BRANCH=rammus TEST=observe tight_timestamps on the sensor_ring device in kernel be enabled/disabled depending on whether CONFIG_SENSOR_TIGHT_TIMESTAMPS is #undef'ed or not Change-Id: I806ba6bb45a0007512afec9151c57c60d30fd604 Signed-off-by: Enrico Granata <egranata@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1524666 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1629314 Reviewed-by: Kazuhiro Inaba <kinaba@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1648955
* common: Make IS_ENABLED fail on unknown valuesDaisuke Nojiri2019-05-241-16/+36
| | | | | | | | | | | | | | | | Partial cherry-pick of CL:1592728. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=make BOARD=nami Change-Id: I8c057989bbaf006f06c803ca107d904fdeb22cca Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1626188 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* ec/common: Introduce IS_ENABLED to check config optionsRaul E Rangel2019-05-241-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is copied from coreboot with added support for empty defines. We should favor using this macro instead of using #ifdef. The macro will evaluate to 0 if the option is not defined. This allows all the code to be compiled and then the optimizer will remove the sections of code that won't ever run. This way we don't end up with #ifdef sections with invalid syntax because no one ever tests that specific permutation. e.g., if (IS_ENABLED(CONFIG_USBC_SS_MUX)) { ... } There are currently spots where #ifdefs are nested 3 levels deep. This makes it very hard to follow the code. BUG=none TEST=Added some code that uses the macro and verified it executes when the config value is defined, and doesn't when it's not. Change-Id: I796b899f7cbbd3067ea3a4d52527d980c68935c9 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1553573 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1627227 Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* Misc: Add BIT() macroDaisuke Nojiri2019-05-241-0/+6
| | | | | | | | | | | | | | | | Partial cherry-pick of CL:1518658. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=make BOARD=nami Change-Id: I7fe77b0cf5a6b69aa0f7cfa280e212fe18b8eb89 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1628466 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* pi3usb9281: Mask OVP, OCP, and recovery interruptsDaisuke Nojiri2019-05-231-3/+3
| | | | | | | | | | | | | | | | | | | Currently, we're handling only attach and detach interrupt and OVP recovery interrupt causes us to miss detach & attach events. This patch masks all unused interrupts. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/125176293 BRANCH=none TEST=See b/125176293 Change-Id: I8387b96abdc073e608b6373b670cbb684b342736 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1626315 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* PI3USB9281: Serialize mux setting and BC12 detectionDaisuke Nojiri2019-05-232-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | Currently a PD task and a USB charger task can talk to PI3USB9281 to update mux setting and to get BC12 information interleavingly. We suspect this causes unreliable BC12 detection including detach detection. This patch makes the usb_charger_set_switches API schedule a mux update instead of changing the mux setting by itself wakes up a USB charger task. A USB charger task solely handles BC12 detection and mux setting. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/125176293 BRANCH=nami TEST=Verify BC1.2 and PD charger can be detected correctly and power_supply_info prints 'Discharging' when they're disconnected on Syndra. Change-Id: Iadaf9087be74a4ba0412dd08b95a40eac4e69ce1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1626314 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* Nami: Increase thermal thresholds to avoid auto-shutdownDaisuke Nojiri2019-05-231-2/+2
| | | | | | | | | | | | | | | | | | | This patch increases thermal shutdown thresholds for Pantheon. The test shows with higher thresholds, Pantheon can last 40 hours in operational temperature (40c). Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/133224156 BRANCH=nami TEST=See the bug. Change-Id: Ifa8bbbede014449208511b41f9bbea9cbdea9396 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1625770 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* Nami: Set TCPC_AUX_SWITCH to 0xC on Port 1 on CCD enableDaisuke Nojiri2019-05-203-1/+27
| | | | | | | | | | | | | | | | | | | | When the screen brightness is changed, DP sends signal on AUX channel. This causes CCD mode to be disconnected. This patch sets the MUX to aux+ <-> sbu2, aux- <-> sbu1 to fix it. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/113266817 BRANCH=none TEST=Verify on Syndra UART over CCD doesn't get disconnected when the screen brightness is changed. Change-Id: I3dba1bdfd44a921077a2f60dec17119bb0077238 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1618598 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* USB-PD: Fix null-pointer dereference for svdm_rsp.amodeDaisuke Nojiri2019-05-151-2/+4
| | | | | | | | | | | | | | | | | | | | | | | This patch fixes null-pointer dereference for svdm_rsp.amode. Some boards set svdm_rsp.amode to NULL. This patch will make TCPM on those boards return NACK instead of crash. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/131128234 BRANCH=none TEST=buildall Change-Id: Ifdeacbe4e164c5f1f7679ed4bb19a91053936ac6 Reviewed-on: https://chromium-review.googlesource.com/1599729 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit 2bef7af80941cc793c0bf864d149233a470dc179) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1612607 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
* common/usb_pd_protocol: Fix TryWait.SNK to Unattached.SNK timeout valueRuibin Chang2019-05-031-2/+2
| | | | | | | | | | | | | | | | | | | | | | | When state transits from TryWait.SNK to Unattached.SNK, the timeout value is 10~20ms (tPDDebounce). This define in USB Type-C 1.3 spec Figure 4-16. BRANCH=None BUG=None TEST=GRL USBPD test Change-Id: If736daf1ef9e74f07a571a2f1adb12a928415c2b Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/1333217 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> (cherry picked from commit c1b19edff6875060b8679c7579f76fd4b2cd2421) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1590552 Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 9e1f0ffe6b7e8b063e9f85d588c95642077db779) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1594773
* npcx: disable the selection of JTAG0 signals due to strapCHLin2019-05-0310-196/+271
| | | | | | | | | | | | | | | | | | | | | | | | | | It was observed that pressing recovery key combination + the other keys, some keys on the keyboard become invalid after system reboots. (see b:129908668 for more detail.) It is because the hardware strap pin for JTAG0 signals is unintentionally triggered. This CL reverts the selection of JTAG signals and set them back to keyboard scan function at system initialization. The revert applies to all real platforms except npcx_evbs. BRANCH=none BUG=b:129908668 TEST=pass "make buildall" TEST=Press the specific key combination, after the system reboots, the keyboard function works normally. On npcx EVBs, the JTAG0 is still functional. Change-Id: I7ede1ea4609466fea50a97b1f60308e4cdfd4544 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1585467 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 0c96a88928610b357e8bbf6c4d9c71a7cc1d869f) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1594772
* usb-c: use higher priority task for interruptsJett Rink2019-04-1515-93/+122
| | | | | | | | | | | | | | | | | | | | | | This should be the last step to make all boards on ToT follow go/usb-pd-slow-response-time. Theses boards all have the higher priority tasks, but they aren't being used since the tcpc interrupt wasn't scheduling calls on it. BRANCH=none BUG=b:112088135 BUG=b/127896055 TEST=builds Change-Id: I2c39e661e804f88edd5b34636b93e6e63a5af57f Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1283452 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1566039 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* usb-c: add high priority tasks for interruptsJett Rink2019-04-1516-14/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To all boards that have space, add the PD tasks that handle interrupts in parallel. This is the last change for go/usb-pd-slow-response-time. BRANCH=none BUG=b:112088135 BUG=b/127896055 TEST=buildall. This works on grunt and octopus. This CL is more of a clean up for ToT to ensure that newly copied boards use the correct paradigm. Below is the space taken up by this change: build/atlas/RW/space_free_flash shrank by 212 bytes: (64796 to 64584) build/atlas/RW/space_free_ram shrank by 1408 bytes: (33568 to 32160) build/cheza/RW/space_free_flash shrank by 200 bytes: (205716 to 205516) build/cheza/RW/space_free_ram shrank by 1408 bytes: (38208 to 36800) build/coral/RW/space_free_flash shrank by 212 bytes: (87980 to 87768) build/coral/RW/space_free_ram shrank by 1400 bytes: (2564 to 1164) build/dragonegg/RW/space_free_flash shrank by 276 bytes: (142136 to 141860) build/dragonegg/RW/space_free_ram shrank by 1640 bytes: (24704 to 23064) build/elm/RW/space_free_flash shrank by 204 bytes: (24644 to 24440) build/elm/RW/space_free_ram shrank by 528 bytes: (8972 to 8444) build/eve/RW/space_free_flash shrank by 216 bytes: (83748 to 83532) build/eve/RW/space_free_ram shrank by 1408 bytes: (1824 to 416) build/fizz/RW/space_free_flash shrank by 184 bytes: (17576 to 17392) build/fizz/RW/space_free_ram shrank by 736 bytes: (11648 to 10912) build/glkrvp/RW/space_free_flash shrank by 248 bytes: (92432 to 92184) build/glkrvp/RW/space_free_ram shrank by 1408 bytes: (45088 to 43680) build/kukui/RW/space_free_flash shrank by 160 bytes: (32364 to 32204) build/kukui/RW/space_free_ram shrank by 520 bytes: (11260 to 10740) build/meowth/RW/space_free_flash shrank by 240 bytes: (72232 to 71992) build/meowth/RW/space_free_ram shrank by 1408 bytes: (34496 to 33088) build/nami/RW/space_free_flash shrank by 360 bytes: (82016 to 81656) build/nami/RW/space_free_ram shrank by 1408 bytes: (2656 to 1248) build/nocturne/RW/space_free_flash shrank by 216 bytes: (62756 to 62540) build/nocturne/RW/space_free_ram shrank by 1408 bytes: (34368 to 32960) build/rainier/RW/space_free_flash shrank by 180 bytes: (45468 to 45288) build/rainier/RW/space_free_ram shrank by 528 bytes: (13516 to 12988) build/rammus/RW/space_free_flash shrank by 200 bytes: (91284 to 91084) build/rammus/RW/space_free_ram shrank by 1408 bytes: (1920 to 512) build/reef_mchp/RW/space_free_flash shrank by 212 bytes: (51048 to 50836) build/reef_mchp/RW/space_free_ram shrank by 2120 bytes: (27420 to 25300) build/reef/RW/space_free_flash shrank by 224 bytes: (84564 to 84340) build/reef/RW/space_free_ram shrank by 1408 bytes: (2208 to 800) build/rowan/RW/space_free_flash shrank by 204 bytes: (29668 to 29464) build/rowan/RW/space_free_ram shrank by 528 bytes: (9300 to 8772) build/scarlet/RW/space_free_flash shrank by 156 bytes: (29464 to 29308) build/scarlet/RW/space_free_ram shrank by 520 bytes: (11100 to 10580) build/zoombini/RW/space_free_flash shrank by 276 bytes: (66816 to 66540) build/zoombini/RW/space_free_ram shrank by 2112 bytes: (37376 to 35264) Compared 208 of 208 files. 38 files changed. Total size change: -27484 bytes. Average size change: -723 bytes. Change-Id: Ifbea67ee4d460fb197a1601d0951169f2f2b5b3b Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1220667 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1566038 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* tcpm: add higher priority tasks to handle TCPC intJett Rink2019-04-152-0/+61
| | | | | | | | | | | | | | | | | | | | See go/usb-pd-slow-response-time for more information BRANCH=none BUG=b:112088135 BUG=b/127896055 TEST=CL stack on fleex and bobba consistently meet PD timing spec Also tested that PD firmare upgrade still works (uses PD suspend) on phaser. Change-Id: If789e79dcb9b69bc7ab5cb729189ca7b651b3a46 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1185728 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1566037 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* tcpm: add TCPC RX circular buffer in ECJett Rink2019-04-1520-108/+252
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The alert line for TCPC will stay asserted as long as there are RX messages for the TCPM (i.e. EC) to pull from the TCPC. We should clear all of the RX messages we know about during a single alert handling session. This CL can stand on its own, but it is a part of a CL stack that will tighten the critical section of time between received messages from the TCPC and sending follow up message out through the TCPC. See go/usb-pd-slow-response-time for more details. BRANCH=none BUG=b:112088135,b:112344286,b:111909282,b:112848644,b:113124761 BUG=b:113057273,b:112825261 BUG=b/127896055 TEST=Reduces reset issue in most cases for phaser, bobba. Does not seem to adversely affect state machine negotiation. Full CL stack consistently sends a REQUEST at 18ms after a SRC_CAP GoodCRC, which is well below the 24 ms threshold we need to be under for USB PD spec compliance. Also testing pd_suspend scenario manually and EC was responsive after port 1 suspend because of "bad behavior" Change-Id: I1654b46400e9881f2927a5f6d6ace589edd182de Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1185727 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1566036 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* tcpc/mt6370: add MediaTek MT6370 TCPC driver.Yilun Lin2019-04-154-0/+312
| | | | | | | | | | | | | | | | | | | BUG=b:80160923 b:111908397 BRANCH=None TEST=make flash_ec BOARD=kukui TEST=plug-in PD charger, check negotiate success, TCPC is sinking 5v/12v. TEST=plug-in peripheral; pd dualrole on; check TCPC is sourcing. Change-Id: I3587a7df40ae3a6254435d3cd133e1ee3000e36b Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1158264 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1566035 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* cleanup: remove tcpc* extern function declarationsJett Rink2019-04-152-16/+20
| | | | | | | | | | | | | | | | | | We do not want to use extern when possible, so move the function declaration section in the tcpm stub c files to an appropriate header file. BRANCH=none BUG=none TEST=zinger compiler (along with everything else) Change-Id: If867661840d138e0c912669e401469a152fa3d9b Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194083 Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1566034 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* anx74xx: consolidating anx74xx alert handlerJett Rink2019-04-151-90/+42
| | | | | | | | | | | | | | | | | | | | | There is a unneeded level on indirection for the anx74xx alert handler that we can remove. This also make is more clear what is happening in the child CLs. See go/usb-pd-slow-response-time for more information. BRANCH=none BUG=none TEST=no change on grunt device Change-Id: I61f7caf09fc5cb5fa889fb727ee39bea681a97e9 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1185726 Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1566033 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* Nami: Set AP boot threshold to 27W for PantheonDaisuke Nojiri2019-04-042-1/+10
| | | | | | | | | | | | | | | | | Pantheon will be using firmware-nami-10775.108.B. So, we need to put the threshold back to 27W because BC 1.2 control isn't supported in HW. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/122896801 BRANCH=nami2 TEST=Verify Ekko boots immediately on a drained battery. Change-Id: I6f171ab4466bcf22f230ce8f17898cd1164904f9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1553566 Reviewed-by: YH Lin <yueherngl@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* chgstv2: Allow board to customize AP boot thresholdDaisuke Nojiri2019-04-042-2/+22
| | | | | | | | | | | | | | | | | | | | Currently, AP boot threshold is statically set by CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON. This patch adds a callback board_set_min_power_mw_for_power_on, which allows boards to set a custom AP boot threshold. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/122896801 BRANCH=nami TEST=Boot Ekko. Change-Id: I9d226bab9a4b6a0f4bffaf8f75d40ad040e10a62 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1549491 Reviewed-by: YH Lin <yueherngl@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* Nami: Enable BC12 when FAFT sets recovery via consoleDaisuke Nojiri2019-04-022-5/+10
| | | | | | | | | | | | | | | | | | | | | This is a workaround. It should be refined before cherry-picking to ToT. FAFT emulates recovery boot by 'dut-control power_state:rec', which sets EC_HOST_EVENT_KEYBOARD_RECOVERY via EC console. This patch adds a check in the command so that BC 1.2 can be enabled in the emulated recovery mode as well. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/122896801 BRANCH=nami TEST=Verify BC1.2 is enabled when 'dut-control power_state:rec' is run. Change-Id: I120438eea353f66c7a62175d95fcd63bf53e6f45 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1549602 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* Nami: Allow Ekko, Bard, Pyke to defer enabling BC 1.2Daisuke Nojiri2019-04-023-2/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, Nami variants prevents AP from booting when the battery is discharged and the power supply is not more than 15W. A user has to wait for a battery to be charged, which takes several minutes. This patch reduces the AP boot threshold to 15W. This is possible because BC 1.2 controllers can be now enabled or disabled by the EC. When a battery is discharged, the following sequence is expected: 1. When EC starts up, BC1.2 controllers are disabled. 2. EC boots AP when 15W AC power is available. 3. BIOS verifies EC-RW and EC jumps to RW. 4. EC-RW negotiates higher power from USBC-C charger. 5. BIOS asks EC whether OS power is ready in a loop. 6. EC checks AC power. If it's enough, it enables BC1.2. If not, returns NACK to BIOS. (Go to step 5) 7. BIOS verifies and boots kernel Note 1: EC enables BC 1.2 unconditionally in recovery mode. Note 2: Once BC1.2 is enabled, it won't be disabled until EC resets. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/122896801,b/111990386,b/112172032 BRANCH=nami TEST=Boot Ekko on discharged battery with USB-C charger. TEST=Verify USB flash drive works in recovery mode. TEST=Verify USB keyboard works. TEST=Verify keyboard backlight works. Change-Id: Ie69e3dc6cb0a02c26f7d8c07baf5ad631ac282eb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1548509 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* kblight: Remove dependency on PWMDaisuke Nojiri2019-04-025-5/+11
| | | | | | | | | | | | | | | | | | Keyboard backlight can be controlled either by PWM or an external controller. This patch decouples keyboard backlight common code and PWM based backlight controll. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=nami TEST=Verify keyboard backlight can be adjusted on Ekko. Change-Id: I332b01a2a2b15bd37ce385b6c30591c90f078dfc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1549476 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* Nami: Remove tablet mode switchDaisuke Nojiri2019-04-023-3/+1
| | | | | | | | | | | | | | | | | | Nami does not use a tablet mode switch. It uses lid angles to detect tablet mode on & off. This patch removes tablet mode switch. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=nami TEST=Verify tablet mode is entered and exited by flipping the lid back and forth. Change-Id: Ie672483735b9a243cd8716bed6b347bb35340269 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1548508 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* chgstv2: Add callback for board to check power for booting OSDaisuke Nojiri2019-04-022-7/+21
| | | | | | | | | | | | | | | | | This patch adds a callback function which allows a board to decide whether power is ready for the OS to boot. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/122896801 BRANCH=nami TEST=buildall Change-Id: I32af4c2f88c9d3215edb9c622f1409dce6262b80 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1548507 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* chgstv2: Refactor OS boot power checkDaisuke Nojiri2019-04-021-15/+27
| | | | | | | | | | | | | | | | | This patch refactors the code which checks whether the power is enough to boot the OS or not. There is no functional change. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/122896801 BRANCH=nami TEST=buildall Change-Id: I48177ac311f362c9912119ccc3b07b460dc4478e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1548506 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* Reland "Nami: Make Vayne cutoff battery on critical charge"Daisuke Nojiri2019-03-301-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a reland of 568654cd247a5a5bc6c0e0136e385052da1a7d59 Original change's description: > Nami: Make Vayne cutoff battery on critical charge > > Currently, Vayne and all other Nami's hibernate when battery is at > critical level for 30 seconds. > > This patch makes Vayne cutoff the battery at critical charge. > > Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> > > BUG=b/123727148 > BRANCH=nami > TEST=Verify Vayne shuts down on critical battery then battery is > cutoff in 30 seconds. Verify AC plugin boot DUT on both ports. > > Change-Id: I1da572669c7fbe00753668810692d73ffe9f4bf8 > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1504076 > Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> > Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> > Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Bug: b/123727148 Change-Id: I6468f53ddb9a019656b58febe38596401deea544 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1546193 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* Revert "Nami: Make Vayne cutoff battery on critical charge"Daisuke Nojiri2019-03-291-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 568654cd247a5a5bc6c0e0136e385052da1a7d59. Reason for revert: Not yet approved. Original change's description: > Nami: Make Vayne cutoff battery on critical charge > > Currently, Vayne and all other Nami's hibernate when battery is at > critical level for 30 seconds. > > This patch makes Vayne cutoff the battery at critical charge. > > Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> > > BUG=b/123727148 > BRANCH=nami > TEST=Verify Vayne shuts down on critical battery then battery is > cutoff in 30 seconds. Verify AC plugin boot DUT on both ports. > > Change-Id: I1da572669c7fbe00753668810692d73ffe9f4bf8 > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1504076 > Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> > Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> > Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Bug: b/123727148 Change-Id: Ibfc38dc42090412890d6053ef171ae411860e15d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1546192 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* Reland "npcx: pwm: Use DCRn greater than CTRn to present its duty cycle is ↵Mulin Chao2019-03-114-26/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | zero." This is a reland of 93d7bcea8121869520b0d02bf94f95eb261bee05 with a fix for fan_is_stalled. Original change's description: > npcx: pwm: Use DCRn greater than CTRn to present its duty cycle is zero. > > In npcx pwm driver, it turns off pwm module directly when its duty cycle > is set to zero. But we saw pwm signal isn't turned off by the following > sequence: > 1. pwm_set_raw_duty(ch, 0); > 2. pwm_enable(ch, 1); > > Please notice setting zero in DCRn doesn't mean duty cycle is zero. > (NPCX duty cycle: ( (DCRn+1) / (CTRn+1) ) x 100). Hence in step 2, we > can observe a very low duty cycle once the driver enables pwm module. > > According to figure. 24 in npcx5's datasheet, setting DCRn greater than > CTRn means that the result of 16-bits comparator is always false. It > equals the duty cycle is zero. This CL adopts this method to present it > and removes the dependency between pwm_enable()/ pwm_get_enabled() and > pwm_set_raw_duty()/pwm_get_duty(). > > In order to make sure DCRn can be greater than CTRn, we also defined > the PWN maximum duty cycle is (0xFFFF -1) since both DCR and CTR are > 16-bits registers. > > BRANCH=none > BUG=b:123552920 > TEST=No build errors for npcx5/7 series. > > Test pwm console command on npcx5/7 evbs by the following sequence. > 1. pwm_set_raw_duty(ch, 0); > 2. pwm_enable(ch, 1); > And no symptoms are observed. PWM_CONFIG_ACTIVE_LOW flag is tested also > and no symptom occurred. > > Test fan control by faninfo & fanset console commands. Connect Sunon > 4-pins PWM fan and evb by following steps: > 1. Connect PWM0 to PWM pin of fan. > 2. Connect TA1_TACH1 and 3.3 PU on Tacho pin of fan. > 3. Connect 5V and GND pins of fan to power supply. > No symptoms are observed. > > Change-Id: I92517ff0bf3e027ae191be00112cd71ec4b55a2b > Signed-off-by: Mulin Chao <mlchao@nuvoton.com> > Reviewed-on: https://chromium-review.googlesource.com/1475096 > Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> > Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Bug: b:123552920 Change-Id: I4ea76c51811507ee4a35e5c0edfb70e9fb6c4c8b Reviewed-on: https://chromium-review.googlesource.com/1506115 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit e5d249549b0cfc761fd81d8eb596bc05da629e1f) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1514978 Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
* Revert "npcx: pwm: Use DCRn greater than CTRn to present its duty cycle is ↵Daisuke Nojiri2019-03-063-12/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | zero." This reverts commit 3d27e8948e3cc1de0a4317deee69bcbd92159267. Reason for revert: fan_is_stalled is broken. Original change's description: > npcx: pwm: Use DCRn greater than CTRn to present its duty cycle is zero. > > In npcx pwm driver, it turns off pwm module directly when its duty cycle > is set to zero. But we saw pwm signal isn't turned off by the following > sequence: > 1. pwm_set_raw_duty(ch, 0); > 2. pwm_enable(ch, 1); > > Please notice setting zero in DCRn doesn't mean duty cycle is zero. > (NPCX duty cycle: ( (DCRn+1) / (CTRn+1) ) x 100). Hence in step 2, we > can observe a very low duty cycle once the driver enables pwm module. > > According to figure. 24 in npcx5's datasheet, setting DCRn greater than > CTRn means that the result of 16-bits comparator is always false. It > equals the duty cycle is zero. This CL adopts this method to present it > and removes the dependency between pwm_enable()/ pwm_get_enabled() and > pwm_set_raw_duty()/pwm_get_duty(). > > In order to make sure DCRn can be greater than CTRn, we also defined > the PWN maximum duty cycle is (0xFFFF -1) since both DCR and CTR are > 16-bits registers. > > BRANCH=none > BUG=b:123552920 > TEST=No build errors for npcx5/7 series. > > Test pwm console command on npcx5/7 evbs by the following sequence. > 1. pwm_set_raw_duty(ch, 0); > 2. pwm_enable(ch, 1); > And no symptoms are observed. PWM_CONFIG_ACTIVE_LOW flag is tested also > and no symptom occurred. > > Test fan control by faninfo & fanset console commands. Connect Sunon > 4-pins PWM fan and evb by following steps: > 1. Connect PWM0 to PWM pin of fan. > 2. Connect TA1_TACH1 and 3.3 PU on Tacho pin of fan. > 3. Connect 5V and GND pins of fan to power supply. > No symptoms are observed. > > Change-Id: I92517ff0bf3e027ae191be00112cd71ec4b55a2b > Signed-off-by: Mulin Chao <mlchao@nuvoton.com> > Reviewed-on: https://chromium-review.googlesource.com/1475096 > Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> > Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> > (cherry picked from commit 93d7bcea8121869520b0d02bf94f95eb261bee05) > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1490675 > Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> > Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Bug: b:123552920 Change-Id: Ie6e5c9328f133dd5138ee07c87751c37e9080d67 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1505015 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
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