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* driver/tcpm/ps8xxx: Consistent DCI disable methodDevin Lu2020-09-111-46/+19
| | | | | | | | | | | | | | | | This patch make consistent with DCI disable method for PS8705/PS8805/PS8815, they are in the similar chip group. BUG=b:161202452 BRANCH=none TEST=make buildall -j. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: Ia919dab9fb6afd72e3b693d94fe8abee628e2f40 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2313056 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2393397 Commit-Queue: Edward Hill <ecgh@chromium.org>
* driver/tcpm: add support for PS8755Devin Lu2020-09-114-9/+21
| | | | | | | | | | | | | | | | | | | The patch adds support for the Parade Tech PS8755 TCPC/SuperSpeed mux. It is similar chip group as PS8705/PS8805/PS8815. BUG=b:159042756, b:159082424 BRANCH=none TEST=make buildall -j. make BOARD=jinlon with this new CONFIG. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I38fa02704cc352da0e27eae8cd8bbce89a807975 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2279339 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2393396 Commit-Queue: Edward Hill <ecgh@chromium.org>
* ps8805: Follow the sequence to enable the DCI register accessWai-Hong Tam2020-09-111-4/+23
| | | | | | | | | | | | | | | | | Follow the sequence in the programming guide to enable the DCI register access, even they are always enabled in the firmware. BRANCH=None BUG=b:161202452, b:147772854 TEST=Tested Trogdor negotiate >5V charging and source power to USB devices. Change-Id: Ia121855cf097fe4b517ceefa461568fbec67b63d Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2304264 Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2393395 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Commit-Queue: Edward Hill <ecgh@chromium.org>
* ps8xxx: add helper function to access alternate I2C pagesCaveh Jalali2020-09-112-5/+5
| | | | | | | | | | | | | | | | | | this provides a helper function for computing the I2C page address of alternate I2C pages available on the ps8xxx family of chips. BRANCH=none BUG=b:158857815,b:159289062 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I121ec9f2beaadf3e4e3c429d177fe38eb2976be8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2271700 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2392239 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Commit-Queue: Edward Hill <ecgh@chromium.org>
* PS8805: Do not enable and disable DCI registersWai-Hong Tam2020-09-111-17/+3
| | | | | | | | | | | | | | | | | | | | | PS8805 is not like PS8751, which needs to rewrite the TCPC reg A0 bit 0 to enable the DCI registers. The DCI registers are always accessible. Also there is a bug on firmware, like 0x8, 0xC, 0xD, that rewriting the reg A0 bit 0 to 1 will make the TCPC I2C not accessible. BRANCH=None BUG=b:147772854 TEST=Verified on Trogdor, fw 0xC, 0xD, and 0xF, the TCPC I2C is accessible. Change-Id: Ie554d2b4022397801423fb3670305bf536b2cc20 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2015641 Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2392238 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Commit-Queue: Edward Hill <ecgh@chromium.org>
* driver/tcpm: Add support for PS8705Aseda Aboagye2020-09-114-2/+48
| | | | | | | | | | | | | | | | | | | | | The commit adds support for the Parade Tech PS8705 TCPC/SuperSpeed mux. It is similar to other Parade TCPCs in its family. BUG=b:158760026 BRANCH=None TEST=`make -j buildall` Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I23288757f2baf56742958357b5ee6bac5cffa02f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2243314 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2392237 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* ps8xxx: add support for the ps8815Caveh Jalali2020-09-114-7/+25
| | | | | | | | | | | | | | | | | | | | | | this adds support for the ps8815 variant of the parade TCPC. this chip is very similar to its predecessors like the ps8751 and ps8805 and can be supported by the same driver. at this point, the TCPM can talk to the chip but we don't properly detect chargers - the CC line states seem wrong and CC status changes do not trigger an ALERT in the ps8815. BRANCH=none BUG=b:144397088,b:147459088 TEST=EC detects the chip on boot. Change-Id: If86abd1fa21cf8f33f28c4ce89050b29e9408532 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1969524 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2392236 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Commit-Queue: Edward Hill <ecgh@chromium.org>
* ps8xxx: disable DCI modeCaveh Jalali2020-09-114-22/+110
| | | | | | | | | | | | | | | | | | | | | | | DCI mode is auto-enabled by default. we don't actually support DCI (intel specific SoC debug path), so we can explicitly disable DCI mode. doing so, saves about 40mW on the 3.3v rail when USB2 devices or USB-C to USB-A dongles are left plugged in. this is particulary relevant in sleep mode as this accounts for a significant portion of the system power consumption. BUG=b:119875949 BRANCH=none TEST=verified power consumption drops using sweetberry, USB devices still functional across suspend/resume. Change-Id: Id13630425c78965d2ac4f2e97715374ae0640d23 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1732231 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Caveh Jalali <caveh@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2392235 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Commit-Queue: Edward Hill <ecgh@chromium.org>
* syv682x: disable VBUS discharge in sink modeCaveh Jalali2020-07-161-17/+26
| | | | | | | | | | | | | | | | | | | | | | | | The syv682x needs to have FDSG (force discharge mode) disabled in order to allow charging. BRANCH=none BUG=b:148487130,b:148467221 TEST=verified PD charging works with USB3 daughterboard (crrev.com/c/2013656 needed to enable USB3 board). Change-Id: Ifff20576accf88822228b7bd7b9eeb6b6cff6a6b Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2037097 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Tested-by: Keith Short <keithshort@chromium.org> Tested-by: Eric Herrmann <eherrmann@chromium.org> (cherry picked from commit dd5b97c3e86d71919ec1287e19e740e86081fdde) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2291468 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* syv682x: fix status register readCaveh Jalali2020-07-161-1/+4
| | | | | | | | | | | | | | | | | | | | | We were reading CONTROL_1_REG instead of STATUS_REG to check the VSAFE_0V status. This corrects the register being accessed. BRANCH=none BUG=none TEST=volteer boots without a battery Change-Id: I06d0fbc0b9313b809ed43be13138241beca395a5 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1999619 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org> (cherry picked from commit d9d96d1b01cb66fbfdc50fe705eaa2cc2579b442) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2291467 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* usb_pd_policy: Make a lot of objects commonAseda Aboagye2020-06-2560-9327/+744
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a board specific usb_pd_policy.c file that contains a lot of code for handling DisplayPort Alternate mode, Google Firmware Update Alternate mode, as well as some PD policy functions such as deciding to Accept or Reject a data role swap or a power role swap. Several boards simply copy/paste this code from project to project as a lot of this functionality is not actually board specific. This commit tries to refactor this by pulling the functions that are not mainly board specific into common code. The functions are made overridable such that boards that truly do require a different implementation may do so. Additionally, this consolidation changes the policy behaviour for some boards, but they should be for the better. Some examples include that data swaps are always allowed if we are a UFP (no system image requirement), power swaps are allowed to become a sink if we are no longer dual role (e.g. - in suspend), and DisplayPort Alternate Mode is not entered if the AP is off. In order to facilitate this refactor, a couple CONFIG_* options were introduced: - CONFIG_USB_PD_DP_HPD_GPIO /* HPD is sent to the GPU from the EC via a GPIO */ - CONFIG_USB_PD_CUSTOM_VDO /* * Define this if a board needs custom SNK and/or SRC PDOs. * * The default SRC PDO is a fixed 5V/1.5A with PDO_FIXED_FLAGS indicating * Dual-Role power, USB Communication Capable, and Dual-Role data. * * The default SNK PDOs are: * - Fixed 5V/500mA with the same PDO_FIXED_FLAGS * - Variable (non-battery) min 4.75V, max PD_MAX_VOLTAGE_MV, * operational current PD_MAX_CURRENT_MA, * - Battery min 4.75V, max PD_MAX_VOLTAGE_MV, operational power * PD_OPERATING_POWER_MW */ BUG=chromium:1021724,b:141458448 BRANCH=firmware-grunt-11031.B TEST=With other PD Policies patches, flash grunt and run faft_ec&pd Change-Id: I18fd7e22dc77fe1dc6c21c38cd7f1bc53cae86cb Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949052 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213574 Tested-by: Dawid Niedźwiecki <dn@semihalf.com> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* usb_pd: use enum tcpc_rp_value instead of intCaveh Jalali2020-06-2519-19/+20
| | | | | | | | | | | | | | | | | | | | this changes the declaration and definitions of typec_set_source_current_limit() to take an enum tcpc_rp_value instead of int. BUG=none BRANCH=firmware-grunt-11031.B TEST=With other PD Policies patches, flash grunt and run faft_ec&pd Change-Id: If633641a581eeb6085b94bc727e23fb57f7cd435 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1889117 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213573 Tested-by: Dawid Niedźwiecki <dn@semihalf.com> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* usb: de-dup common code from old and new PD stackJett Rink2020-06-2511-59/+142
| | | | | | | | | | | | | | | | | | | We still need to pull out more common code between the two stacks, but this is scaffolding with a few examples. BUG=b:137493121 BRANCH=firmware-grunt-11031.B TEST=With other PD Policies patches, flash grunt and run faft_ec&pd Change-Id: Ibd9dda1e544e06f02aa3dde48ca7de1539700cfa Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1744655 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213572 Tested-by: Dawid Niedźwiecki <dn@semihalf.com> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* usb_mux: Send DP safe mode info to virtual MUXVijay Hiremath2020-06-252-0/+3
| | | | | | | | | | | | | | | | | | | Before entering into alternate mode, state of the USB-C MUX needs to be in safe mode so that the USB-C pins cab be re-purposed without getting damaged or do not damage their Port Partner. Hence, sending the DP safe mode info to virtual MUX from EC. BUG=b:139140865 BRANCH=firmware-grunt-11031.B TEST=With other PD Policies patches, flash grunt and run faft_ec&pd Change-Id: I3715b5118112b7744407ac5e652f63f6d7cd0a1b Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1745540 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213571 Tested-by: Dawid Niedźwiecki <dn@semihalf.com> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* pd_policy: Change DP AltMode event from host event to MKBP.Aseda Aboagye2020-06-253-14/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, the EC could notify the AP that it had entered into DisplayPort Alternate mode by sending a MODE_CHANGE host event. However, there was no mechanism to disable that functionality if desired without effecting the other MODE_CHANGE events (i.e. - base attach/detach). By changing the DisplayPort Alternate mode entry to an MKBP event, we can have more granularity and only affect this single event. - This commit adds a new MKBP event, EC_MKBP_EVENT_DP_ALT_MODE_ENTERED. - The commit also changes the DP AltMode entry notification from sending a MODE_CHANGE host event to this new MKBP event. BUG=chromium:786721 BRANCH=firmware-grunt-11031.B TEST=With other PD Policies patches, flash grunt and run faft_ec&pd Change-Id: Ia5f294b26701c3c98c9b7f948fc693d26234c835 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1685787 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213570 Tested-by: Dawid Niedźwiecki <dn@semihalf.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* common: Define markers for weak symbolsDaisuke Nojiri2020-06-251-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces macros to mark weak symbols. These macros are used to annotate weak definitions, declarations, and overriding definitions. __override_proto: declarations __override: definitions which take precedence __overridable: default (weak) definitions Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium.org/964060 BRANCH=firmware-grunt-11031.B TEST=With other PD Policies patches, flash grunt and run faft_ec&pd Change-Id: I44cec41e0523e285db19a890d084b52337f64a9c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1633911 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Tested-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213569 Tested-by: Dawid Niedźwiecki <dn@semihalf.com>
* Flapjack: Disable charging from BC 1.2 charger as USB-C chargerDaisuke Nojiri2020-06-251-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | Currently, if a charger shows Rp=USB on USB-C port, the charge manager chooses it and sets the max current to 500 mA even if it can provide higher power as a BC 1.2 charger. This patch introduces CONFIG_USBC_DISABLE_CHARGE_FROM_RP_DEF. When it's defined, a BC 1.2 charger won't be recognized as a USB-C charger. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/131353444 BRANCH=firmware-grunt-11031.B TEST=With other PD Policies patches, flash grunt and run faft_ec&pd Change-Id: I50969973026185dd2aecdb768985cd116c1d32f7 Reviewed-on: https://chromium-review.googlesource.com/1586580 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213568 Tested-by: Dawid Niedźwiecki <dn@semihalf.com> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* common: pd_policy: Add notification for DP AltModeAseda Aboagye2020-06-253-1/+30
| | | | | | | | | | | | | | | | | | | | | | | | This commit simply adds a notification that can be called when the device enters DisplayPort Alternate mode or a DP attention VDM is received. Calling the notification will send a MODE_CHANGE host event which may wake the AP. BUG=chromium:786721 BRANCH=firmware-grunt-11031.B TEST=With other PD Policies patches, flash grunt and run faft_ec&pd Change-Id: Iaa221e69060a7d1015f7c1e2f6f053e6810a674a Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1666366 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213567 Tested-by: Dawid Niedźwiecki <dn@semihalf.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* Liara: adjust Sunwoda and SMP precharge_currentEdward Hill2020-04-251-2/+2
| | | | | | | | | | | | | BUG=b:151877162 BRANCH=grunt TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: Icc7c1349db9ecfbb0fa71ab2305a3094dd1ecdac Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2128891 Reviewed-by: Diana Z <dzigterman@chromium.org> (cherry picked from commit e0da937f6e9f5bf507b80e18d041be8bd7dc8d7a) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2166928
* grunt/baseboard: Slow keyboard scan rateDevin Lu2020-04-081-2/+7
| | | | | | | | | | | | | | | | | Slow the keyboard scan rate from 60 us to 80 us. This compensates the additional delay added to the KBO line by H1. BUG=b:153470574 BRANCH=grunt TEST=make sure defect unit will not output t Key while pressing F3 key. Change-Id: I9548ccc2368ac7be5ea566577a479e98291efb29 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2141372 Reviewed-by: Edward Hill <ecgh@chromium.org> (cherry picked from commit dbfc6ded455817d6de0ddd9ecfe454bc564d0362) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2141376 Commit-Queue: Edward Hill <ecgh@chromium.org>
* nuwani : Add SKU ID check for different sku boardxiaoqiang.zhu2020-04-062-8/+14
| | | | | | | | | | | | | | | nuwani sku id range is from 0xd0 to 0xdf, and nuwani180 sku id is 0xd0, nuwani360 sku id is 0xd8. BUG=b:150846518 BRANCH=firmware-grunt-11031.B TEST=boot nuwani180/360 board, function as expected. Signed-off-by: xiaoqiang.zhu <xiaoqiang.zhu@bitland.corp-partner.google.com> Change-Id: I3be5df864d52415f8b471cf990ff6b50c9ad7909 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2134337 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* stm32: Fix manual interrupt clearing functionCraig Hesling2020-03-161-1/+3
| | | | | | | | | | | | | | | | | | | | | This fixes a bug in gpio_clear_pending_interrupt, where all pending interrupts are unintentionally cleared. This is not in the code path for normal gpio interrupt handlers, since the normal interrupt clearing occurs in gpio_interrupt (right below this function). BRANCH=none BUG=chromium:1059520 TEST=none Signed-off-by: Craig Hesling <hesling@chromium.org> Change-Id: I4d6fe7947f4d76cf3b57dfbf3bb926e41851c80c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2101208 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> (cherry picked from commit c2c2c083fef813e3e3c70f8c13a1418717ba682d) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2106673
* nuwani : Add new battery informationxiaoqiang.zhu2020-03-122-3/+29
| | | | | | | | | | | | | | | | | | nuwani need support new battery --AEC:bq40z50-R3 This CL add to support the AEC battery BUG=b:151045912 BRANCH=firmware-grunt-11031.B TEST=boot treeya board with new battery, charging/discharging/cutoff work as expected. Signed-off-by: xiaoqiang.zhu <xiaoqiang.zhu@bitland.corp-partner.google.com> Change-Id: I96d627a270ee16376f30a3471f8bfa6e44293ca8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2094925 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* driver: lis2dw12: Fix maximal ODRGwendal Grignou2020-03-101-1/+3
| | | | | | | | | | | | | | | | Be sure EC max frequency is taken into account. BUG=chromium:615059,chromium:1059318 BRANCH=hatch, grunt TEST=Check tast run <IP> hardware.SensorRing works on Akemi(hatch) with new firwmare. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: I8c4bf1213c876ceec4b20a4dd87094aab79d7b0b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2092214 Reviewed-by: Heng-ruey Hsu <henryhsu@chromium.org> (cherry picked from commit b13856bc9f193c8c7f4a045b684131b5cf7d0900) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2094746
* nuwani: Add new grunt-family board.Peichao Wang2020-03-108-0/+750
| | | | | | | | | | | | | | | | | | | | Add nuwani board. Initially base on treeya. BUG=b:150799568 BRANCH=11031.B TEST=emerge-grunt chromeos-ec Ensure that ec.bin are created Change-Id: I2eb264dbd96aa7cda10b1d8e20fc0e67bc195254 Signed-off-by: xiaoqiang.zhu <xiaoqiang.zhu@bitland.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2087435 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Martin Roth <martinroth@google.com> Tested-by: Martin Roth <martinroth@google.com> (cherry picked from commit 56f8aebc855ad5f031e5a1db975bff43503fe7fd) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2094556 Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* ppc: Use hard reset to recover from CC overvoltageEdward Hill2019-12-063-66/+40
| | | | | | | | | | | | | | | | When sn5s330 PPC detects CC overvoltage, recover via hard reset and don't enable PP2 sink FET directly. Also clean up the interrupt unmasking in sn5s330_init(). BUG=b:144892533 BRANCH=grunt TEST=Do ESD test to trigger CC1/CC2 OVP, device recovers to sink Change-Id: I662bf164b55508be4d5cc1b3ad639c9613bd1935 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949264 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949267
* helios: Detect PPC sn5s330 CC1/CC2 OVP and release OVP.Michael5 Chen2019-12-062-14/+58
| | | | | | | | | | | | | | | | | | | | If PPC have CC OVP protection, check VBUS_GOOD. If VBUS_GOOD is ok, release CC OVP. BUG=b:141587322 BRANCH=Master TEST=Manual Do ESD test to trigger CC1/CC2 OVP. Using EC console command PPC_DUMP to check ppc regiset is correct. Change-Id: I3b817cc1dcec4c14ed4e2098b7ad7582b938f613 Signed-off-by: Michael5 Chen <michael5_chen@pegatroncorp.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1826098 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1933787 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* treeya : Add new battery informationxiaoqiang.zhu2019-11-262-1/+94
| | | | | | | | | | | | | | | | | | | | | | | | treeya need support three new batteries --SMP:L19M3PG1 --LGC:L19L3PG1 --Celxpert:L19C3PG1 The same manufacturer(SMP) has two kinds of batteries, manuf_name can't specify the unique battery, so need to check device_name. BUG=none BRANCH=none TEST=boot treeya board with new batteries, charging/discharging/cutoff work as expected. Change-Id: I09e2a68961e5df92c6b6d639963ac8894eb7ec20 Signed-off-by: xiaoqiang.zhu <xiaoqiang.zhu@bitland.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1935469 Reviewed-by: Peichao Li <peichao.wang@bitland.corp-partner.google.com> Reviewed-by: Edward Hill <ecgh@chromium.org> Tested-by: Peichao Li <peichao.wang@bitland.corp-partner.google.com> Auto-Submit: Peichao Li <peichao.wang@bitland.corp-partner.google.com> Commit-Queue: Edward Hill <ecgh@chromium.org>
* Aleena: support factory keyboard test.David Huang2019-11-062-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | connector-to-GPIO map: {-1, -1}, {0, 5}, {1, 1}, {1, 0}, {0, 6}, {0, 7}, {-1, -1}, {-1, -1}, {1, 4}, {1, 3}, {-1, -1}, {1, 6}, {1, 7}, {3, 1}, {2, 0}, {1, 5}, {2, 6}, {2, 7}, {2, 1}, {2, 4}, {2, 5}, {1, 2}, {2, 3},{2, 2}, {3, 0}, {-1, -1}, {0, 4}, {-1, -1}, {8, 2}, {-1, -1}, {-1, -1}, BUG=b:143848117 BRANCH=master TEST="ectool kbfactorytest" Pass. Change-Id: I087c4f11338e58d20ad82ce94c4c64380945c56f Signed-off-by: David Huang <David.Huang@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1893909 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: David Huang <david.huang@quanta.corp-partner.google.com> Tested-by: David Huang <david.huang@quanta.corp-partner.google.com> (cherry picked from commit 49d43283668c702a984bdc52d91b1d645e1042f1) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1899663 Commit-Queue: Edward Hill <ecgh@chromium.org>
* treeya: fix rotation matrix of kx022 lid sensorLu Zhang2019-11-051-1/+0
| | | | | | | | | | | | | | | | | | | The layout has been changed. Need to follow the HW changes. BUG=b:143848116 BRANCH=none TEST=Using ec console 'accelinfo on' verified lid angle now goes from 0 to 360 and swtiches to tablet mode after crossing 180 threshold. Signed-off-by: Lu Zhang <lu.zhang@bitland.corp-partner.google.com> Change-Id: I3ad16a44b419bcce38f0cdbf8d74e6b4876c7250 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1886590 Tested-by: Peichao Li <peichao.wang@bitland.corp-partner.google.com> Reviewed-by: Peichao Li <peichao.wang@bitland.corp-partner.google.com> Reviewed-by: Edward Hill <ecgh@chromium.org> (cherry picked from commit b5053b038fde3e62bd260f5a61bf63df10b0c20c) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1898252 Commit-Queue: Edward Hill <ecgh@chromium.org>
* driver: lis2dw12/lis2dwl: fix wrong __fls usagePaul Ma2019-10-252-10/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | __fls(n) is defined as (31 - __builtin_clz(n)) in include/common.h. Because of the definition, n can't be 0. When n is 0, __fls(0) will be -1 and it is a wrong result. Since sensor data rate can be set lower than LIS2DW12_ODR_MIN_VAL, it is possible for __fls() to get a 0 parameter. This CL will fix this condition. Because macros are getting complex, move them to c file and convert to functions. BUG=b:143242489 BRANCH=none TEST=run 'suspend_stress_test --suspend_min=10 --wake_min=10 \ --count=2500' on DUTs, test pass and no EC crash. Change-Id: I46febb602b47624ba5d0106abaedd34a23ebe96f Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1876297 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> (cherry picked from commit 16275bb36d338dd952b9312450c0cee110d5468c) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1880349 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* motionsense: remove panicJett Rink2019-10-241-3/+9
| | | | | | | | | | | | | | | | | | | | | | Remove a panic that should never happen. If there was a bug to make the EC go down that code path, it seems better to log and error about motion sense than take down the entire system with an EC panic. BRANCH=none TEST=builds BUG=none Change-Id: I6231b0b2bf14f9bcb3701040d0844f765d5637ad Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1678254 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> (cherry picked from commit aa329f49dc65ec251133fd745ef3f8fc16fd79eb) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1876303 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* common: motion_sense: Fix pop logicYuval Peress2019-10-241-3/+12
| | | | | | | | | | | | | | | | | | | | | | | The logic for popping data from the staged partition of the fifo was incorrect. We never ended up decrementing the count. BUG=b:135239484 BRANCH=None TEST=Added code in motion_sense_init() to fake staging data into the fifo. This replicated the issue, with the fix the issue was resolved. Change-Id: Ic4a0338131defbdfa44e1121d26ee3c5e8238b3b Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1665213 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Enrico Granata <egranata@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> (cherry picked from commit 2d21c2e419c493afe175b9cc00ccd71a5857ce29) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1876302 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* Grunt: Add GPIO_LOCKED to EC_RST_ODL PSL inputEdward Hill2019-10-224-4/+4
| | | | | | | | | | | | | BRANCH=grunt BUG=b:143095616 TEST=GPIO is locked as input Change-Id: I36b123ed068db268d1cd02e990dd720663eaae57 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1873008 Reviewed-by: Keith Short <keithshort@chromium.org> (cherry picked from commit e78c4c3c1e0839ba915e15ee2e711e4c0e5bb5d5) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1874585
* treeya: apply USB EQ setting to PS8751 USB muxLu Zhang2019-10-151-1/+12
| | | | | | | | | | | | | | | | | | | | | | The default USB TYPE C connector facing receiver equalization setting is 0x90, compensate for channel loss up to 15.4dB It's high for some dongles. Apply lower USB EQ to 8.7dB BUG=b:140472120 BRANCH=none TEST=build and boot on, read back registers to verify > ectool i2cread 8 2 0x16 0xe7 0x40 Signed-off-by: Lu Zhang <lu.zhang@bitland.corp-partner.google.com> Change-Id: I1fce255d0dbe8c5a12cf8c8ff5b3c506e8d19475 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1830538 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Paul Ma <magf@bitland.corp-partner.google.com> Tested-by: Paul Ma <magf@bitland.corp-partner.google.com> (cherry picked from commit c469aa1bcbef30ee57f12e4f99799ca8b95d576c) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1862871 Commit-Queue: Edward Hill <ecgh@chromium.org>
* treeya: add battery informationLu Zhang2019-09-182-45/+43
| | | | | | | | | | | | | | | | | | | | Copied from phaser board. Add battery information for: - SMP 5B10Q13163 - LGC 5B10Q13162 - Sunwoda 5B10S75394 BRANCH=none BUG=b:141128721, b:138744661 TEST=builds Signed-off-by: Lu Zhang <lu.zhang@bitland.corp-partner.google.com> Change-Id: I761417280820904e10e78939886acdf7cdf8aa1e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1808822 Reviewed-by: Edward Hill <ecgh@chromium.org> (cherry picked from commit e6ef834fe6ad38e8b6cf2e1c32cfc1d43c072304) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1808984 Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* Barla: add simplo HIGHPOWER 996QA168H batteryDevin Lu2019-09-102-0/+31
| | | | | | | | | | | | | | BUG=b:140452269 BRANCH=grunt TEST=Test on charging/discharging/battery cut off pass. Change-Id: Iba19c113d94ed0c88372b5bd4317b333dee6d146 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1782398 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> (cherry picked from commit 4576018f783b5645794924a562308adbe192ed6f) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1792419
* treeya: fix rotation matrices of lid and base sensorslu zhang2019-09-031-5/+16
| | | | | | | | | | | | | | | | | | | | Now there are two sets of lid/base sensors in proto phase. Both of rotation matrices need to be fixed. BUG=b:138744661 BRANCH=none TEST=Using ec console 'accelinfo on' verified lid angle now goes from 0 to 360 and swtiches to tablet mode after crossing 180 threshold. Change-Id: I93a89a878cf064071eb5f3786f4f5f5475ba2de2 Signed-off-by: lu zhang <lu.zhang@bitland.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1773032 Reviewed-by: Paul Ma <magf@bitland.corp-partner.google.com> Reviewed-by: Edward Hill <ecgh@chromium.org> Tested-by: Paul Ma <magf@bitland.corp-partner.google.com> (cherry picked from commit 2fdaf6623c5c73c694b0a1c1b3750b7cb1987584) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1780965 Commit-Queue: Edward Hill <ecgh@chromium.org>
* grunt: Disable ec_feature kbbacklit for barla refresh SKUsDevin Lu2019-08-301-0/+1
| | | | | | | | | | | | | | BUG=b:139686328 BRANCH=grunt TEST=make buildall -j Change-Id: I588874c2f4f9556137d4cc9e895c3f2f6aaa5436 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1772868 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> (cherry picked from commit a15ef31af52679f715a10589ef89b4343141dd91) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1773030
* treeya: disable battery leds when discharging in S0/S3lu.zhang2019-08-261-3/+2
| | | | | | | | | | | | | | | | | | | | | Battery leds would be on when discharging in S0/S3. It's not needed, so change the led behavior. BRANCH=none BUG=b:138744661 TEST=1. Power on the device and plug out the adapter to see if leds are OK then. 2. Use powerd_dbus_suspend command to see leds are OK or not. Signed-off-by: lu.zhang <lu.zhang@bitland.corp-partner.google.com> Change-Id: I7df285c3c8f19612ec17ac64dcae6830aa1f68a2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1763900 Reviewed-by: Edward Hill <ecgh@chromium.org> (cherry picked from commit bfdf551cf25c51f0781d1e8e5aeb395c5213ba7c) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1768491 Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* treeya: enable motion sensor drivers and fix ec feature flagPaul Ma2019-08-234-3/+151
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Treeya use two sets of base/lid sensors, one is BMI160/KX022 which is supported by baseboard, another is LSM6DS3TR/LIS2DWL. This patch will enable one of them according to sku_id. This patch also remove keyboard backlight feature from ec feature flags according to sku_id since both Treeya and Treeya360 do not support keyboard backlight. BUG=b:138744661, b:137945787, b:137849739 BRANCH=none TEST=boot treeya boards which mounted BMI160/KX022 or LSM6DS3TR/LIS2DWL, use 'accelinfo on' to enable sensor output, make sure that their x/y/x value are correct. Cq-Depend: chromium:1741598, chromium:1751302 Change-Id: I213a2073c2232ef0f2f70be788f859a264e09425 Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1746006 Tested-by: Martin Roth <martinroth@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767535 Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* Grunt/Treeya: Add ANX3447 variant for TCPC 0.Paul Ma2019-08-2313-888/+207
| | | | | | | | | | | | | | | | | | | | | | | Merge common TCPC code into baseboard, and add choice of ANX3429 or ANX3447 for port 0 TCPC. Treeya uses ANX3447, all others use ANX3429. BUG=b:138744661 BRANCH=none TEST=build -j BOARD=treeya Change-Id: I66f84ae50be0b5fe80479dfdc699717427e4457c Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1751302 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767534 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* driver: lis2dw12/lis2dwl: add polling mode supportPaul Ma2019-08-232-10/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add polling (forced mode) support for lis2dw family. 'froced mode' is a common usage model for lid accel sensor. Treeya will support two set (BMI160/KX022 and LSM6DS3/LIS2DWL) of base/lid sensors and both of their lid sensor should work in the same mode (forced mode or interrupt). Since KX022 driver only support polling, so lis2dwl also need polling support. This patch add it. BUG=b:138768226, b:138978278 BRANCH=none TEST=on Akemi board, build both interrupt and polling (by define CONFIG_ACCEL_LIS2DW_AS_BASE or not) mode firmware, boot and confirm sensors init suscess and 'accelinfo on' has correct sensor x/y/z output. Cq-Depend: chromium:1739026 Change-Id: Ib0dcb7b317eec51a38598a644f965d7ecc5928c6 Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1741598 Tested-by: Martin Roth <martinroth@chromium.org> Reviewed-by: Martin Roth <martinroth@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767533 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* driver: lis2dwl: add driver supportPaul Ma2019-08-237-4/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | lis2dwl has almost the same register interface as lis2dw12. lis2dwl only has one low power mode and when in low power mode, it has only 12 bit resolution. In order to get 14 bit resolution, we only use its high performance mode. Add MOTIONSENSE_FLAG_INT_ACTIVE_HIGH flag to support both active high and active low interrupt. BUG=b:138768226, b:138978278 BRANCH=none TEST=use Akemi board, add lis2dwl as accel sensor, boot the board and make sure sensor x/y/z get correct value by 'accelinfo on' Cq-Depend: chromium:515302 Change-Id: I37fcc0f43af3c8055079e09db00757b665813ba8 Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1739026 Tested-by: Martin Roth <martinroth@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Martin Roth <martinroth@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: mario tesi <mario.tesi@st.com> Commit-Queue: Martin Roth <martinroth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767532 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* driver: lis2dw12: Add driver supportmario tesi2019-08-237-0/+793
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added ACC LIS2DW12 driver support. Features included in this driver are: - Basic Sensor Read acceleration data - ODR and FS runtime configuration - FIFO support with watermark interrupt events - Shared commons function with ST MEMs devices - Switch Low Power to High perf. mode in case of ODR > 200 Hz - Configure D-TAP event detection in Hardware BUG=b:73546254 BRANCH=master TEST=Tested on discovery_stmems target BOARD with LIS2DW12 connected to EC i2c master bus and motion sense task running. To build firmware for discovery_stmems target with LIS2DW12 sensor connected, simply uncomment CONFIG_ACCEL_LIS2DW12 define in board.h target file and make with target BOARD=discovery_stmems. Commands used to test LIS2DW12 device are: - accelinit 0 (to configure accel. device) All basic features tested, including changing in ODR: - accelrate 0 10000 (set ODR to 10 Hz) - accelrate 0 12500 (set ODR to 12.5 Hz) - accelrate 0 25000 (set ODR to 25 Hz) - accelrate 0 50000 (set ODR to 50 Hz) - accelrate 0 100000 (set ODR to 100 Hz) - accelrate 0 200000 (set ODR to 200 Hz) - accelrate 0 400000 (set ODR to 400 Hz) - accelrate 0 800000 (set ODR to 800 Hz) - accelrate 0 1600000 (set ODR to 1.6 kHz) Full Scale Range: - accelrange 0 2 (set Full Scale Range to 2g) - accelrange 0 4 (set Full Scale Range to 4g) - accelrange 0 8 (set Full Scale Range to 8g) - accelrange 0 16 (set Full Scale Range to 16g) FIFO features and interrupt management: - accelinfo on 1000 (motion info task with refresh rate 1 s) and polling data read: - accelread 0 (to read data from accelerometer) Change-Id: I0b9861a71e81052e7ee8eb235a1a5b2a57d4c6f5 Signed-off-by: mario tesi <mario.tesi@st.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/515302 Reviewed-by: Yuval Peress <peress@chromium.org> Reviewed-by: Paul Ma <magf@bitland.corp-partner.google.com> Tested-by: Paul Ma <magf@bitland.corp-partner.google.com> Commit-Queue: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767531 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* i2c: don't scan i2c addresses less than 0x08Jett Rink2019-08-233-5/+19
| | | | | | | | | | | | | | | | | | | None of the existing i2c addresses in the EC code base are less than 0x08 and those addresses are reserved by the i2c and SMBus specification. BRANCH=none BUG=b:138156666 TEST=i2c bus scan with a smart battery doesn't "misbehave" any more and other devices can be detected properly. Change-Id: I561b082c4c7e3df7caaa33b6ef6ad467dabbd5a5 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1715326 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767530 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* npcx: make i2c slave address uint16_t to be standardDenis Brockus2019-08-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | EC code changed over to a 7-bit slave address and stored in a uint16_t to generically be able to handle 10-bit addresses, if they are ever needed, as well as common bit flags in the most significant bits. This code does not use more than the 8 least significant bits but to be EC consistent, I am making this 16 bits. BUG=none BRANCH=none TEST=make buildall -j Change-Id: Ic5f4b3500ae7b3c18380b188efbc37c01d58d7e9 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1714136 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767529 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-08-23251-1718/+1693
| | | | | | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767528 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* drivers/tcpm/ps8xxx: Return hardcoded vendor and product idKarthikeyan Ramasubramanian2019-08-231-0/+5
| | | | | | | | | | | | | | | | | | | | | | When the requester does not expect the chip information from the live target, return the hardcoded vendor and product id. BUG=b:128820536,b:119046668 BRANCH=None TEST=Boot to ChromeOS Change-Id: I74affb00951411a3483258a8db165038e7eb683f Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1617894 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org> Auto-Submit: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767527 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* ec_commands: Rename 'renew' to 'live' in EC_CMD_USB_PD_CHIP_INFOKarthikeyan Ramasubramanian2019-08-2311-23/+256
| | | | | | | | | | | | | | | | | | | | | | | | | | Semantics of renew field in EC_CMD_USB_PD_CHIP_INFO is changing as follows: 0 -> Return hard-coded info for Vendor ID/Product ID and cached info for the Firmware Version 1 -> Return the live chip info for Vendor ID/Product ID/Firmware Version Also rename the 'renew' field to 'live' to match the new semantics. BUG=b:128820536,b:119046668 BRANCH=None TEST=make -j buildall; Boot to ChromeOS. Change-Id: Ie3dd022336b0be5c9728bb0ebabef32b7a6b5d57 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1617893 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org> Auto-Submit: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767526 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
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