| Commit message (Collapse) | Author | Age | Files | Lines |
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BUG=none
TEST=none
Change-Id: I0f03f432ada1064ffba9595be78ca7ab4d25ecd1
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3154581
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Owners-Override: Jora Jacobi <jora@google.com>
Tested-by: Jack Rosenthal <jrosenth@chromium.org>
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The charger task relies on calc_next_state() performing a delay before
returning. My reading of the code suggests that this doesn't happen
always. For example:
When pre-charging:
if (battery_temperature(&batt_temp) == EC_SUCCESS)
return ST_CHARGING;
When discharging and capacity is low:
/* Check remaining charge % */
if (battery_state_of_charge(&capacity) == 0 && capacity < 10)
return notify_battery_low();
I would like to suggest that the code be refactored to more like:
int next_checkms = 5000; /* next time to check battery */
while (1) {
int action = ACTION_NONE;
err = get_state(&state);
if (!err) {
action = calculate_action(&state);
err = perform_action(action, &next_check_ms);
}
usleep(next_check_ms * 1000);
}
so that the delays are really clear, the state is all read at once,
there is no reliance on earlier state, and we always delay even on
error.
In the meantime, this CL inserts a mandatory 5 second delay in the
loop, which should prevent the charger task lockup.
BUG=chrome-os-partner:11285
TEST=manual
(please do this test before committing)
1. boot to kernel, see that battery can be seen
2. suspend and resume device
3. see that the charger loop does not cause an EC watchdog reset and
AP power off/reset. There should be no watchdog warning message on the
EC console.
Change-Id: I141e374933c4dc0ec60bcdccf96443f57067c585
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27371
Reviewed-by: Jon Kliegman <kliegs@chromium.org>
Reviewed-by: Katie Roberts-Hoffman <katierh@chromium.org>
Tested-by: Katie Roberts-Hoffman <katierh@chromium.org>
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This test checks charging state machine works correctly:
- Charge when AC plugged. Discharge when AC unplugged.
- Shutdown when over/under-temperature during discharging.
- Stop charging when over/under-temperature during charging.
BUG=chrome-os-partner:10270
TEST=Test passed
Change-Id: I460645c70f5dcd30e258c43956ffe416c8bce906
Reviewed-on: https://gerrit.chromium.org/gerrit/26383
Reviewed-by: Rong Chang <rongchang@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
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For I2C bus connected to PCH, clock frequency must not exceed 100KHz.
Lower temp sensor I2C bus to meet PCH spec.
BUG=chrome-os-partner:9928
TEST=Still able to read I2C temperature sensors.
Change-Id: Idec66d9124f61dc12e763561e0364c9ddb9ffeb0
Reviewed-on: https://gerrit.chromium.org/gerrit/26884
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
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Also add new 'invalid' host event bit; if the host reads this, it
knows the memory-mapped data for current events is invalid.
BUG=chrome-os-partner:11146
TEST=manual
On host, ectool eventget -> should print events = 0
On EC, hostevent set 0x80000000
On host, ectool eventget -> should print events = invalid
Reboot EC; should see debug output where event mask 0x2000 is set
during the boot process.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I8d3f161eec25db50ac06e3642a1a1fb8edb9590e
Reviewed-on: https://gerrit.chromium.org/gerrit/26876
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512 bytes isn't enough to capture all the debug output early in the
init process, and Link EC has lots of unused RAM. stm32 doesn't, so
only do this for LM4 processor.
BUG=none
TEST=build; debug output during init shouldn't be garbled
Change-Id: Ie4fd204fa4e0c6ca99ea7eae94b095ef175836e4
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26877
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This enables lid open on Snow (and presumably Daisy).
For now we only care about interrupting on lid open (rising edge of
LID_OPEN) to turn on the AP.
BUG=chrome-os-partner:9708
TEST=Tested on Snow
Signed-off-by: David Hendricks <dhedndrix@chromium.org>
Change-Id: I8f6cb4dd9d3ebc0380c8a5e7a3f2ce967e3eff48
Reviewed-on: https://gerrit.chromium.org/gerrit/26648
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Commit-Ready: David Hendricks <dhendrix@chromium.org>
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This adds a small interrupt handler for lid open/close event which
updates a state variable and wakes up the power task to decide if
action must be taken. For the suspend mode path, it will determine
which state to set the power LED in.
BUG=chrome-os-partner:9708
TEST=Lid open turns on Snow, suspend mode to be tested separately
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Change-Id: Ib8bb682affc5b9f6d729eb5f05d23098074e1a77
Reviewed-on: https://gerrit.chromium.org/gerrit/26647
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Commit-Ready: David Hendricks <dhendrix@chromium.org>
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If we don't store PWM module state, fan would be disabled after system
jump until the next reboot. Let's preserve fan and keyboard backlight
state.
BUG=chrome-os-partner:11027
TEST=Boot and "sysjump a". Check fan is still enabled.
Change-Id: I57dbcabef79264af7fcedb8fa0c00ff6299b97d5
Reviewed-on: https://gerrit.chromium.org/gerrit/26757
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
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BUG=chrome-os-partner:11090
TEST=suspend laptop, then press power button; should resume from suspend
Change-Id: I36b7c62b2e115bb97d37defcd3c783af0f91d5f8
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26730
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And fix returning memory-mapped string length on LPC as well.
BUG=chrome-os-partner:11090
TEST=manual
from EC, 'hostevent set 0x40000'
from host, 'ectool eventget' --> should print 0x40000
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I9edbd0a1468b5d4160ce67c471332226e51fa868
Reviewed-on: https://gerrit.chromium.org/gerrit/26719
Reviewed-by: Simon Glass <sjg@chromium.org>
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There are a lot of timeous in the i2c driver. When one occurs, print
out the number of it so that the root cause can more easily be
examined.
BUG=chrome-os-partner:10888
TEST=manual:
Lock up the i2c bus from the AP by running the kernel without bus
arbitration doing i2c traffic:
while true; do i2cdump -f -y 4 0x48; done >/dev/null
and using 'pmu 100' on the EC.
Then see that a timeout error is printed, for example:
i2c wait_status timeout type 2, 101387 us
Change-Id: I3fb3fcf9f07966ef4e71d4358c791fea90aba5d5
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26830
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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This command is primarily useful for testing, since it repeatedly
hammers the i2c bus.
Enable the command on snow for now.
BUG=chrome-os-partner:10888
TEST=manual:
run 'pmu 100' on snow and see that it displays the correct output.
Change-Id: I36c15af195d17f67dff4c05559d1756693a65c19
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26829
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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Change the delay for bus claim to 100ms, since in testing with the AP
requesting the bus constantly, I was able to make a 50ms timeout happen
after about 3000 transactions. With 100ms, the timeout happens only
once in 130,000 i2c transactions with both AP and EC fully loading the
i2c bus simulataneously.
The bus claim failure should never happen, but in case it does, print
an error. Also make sure we delay for a bit, to allow the AP to see the
change in state.
BUG=chrome-os-partner:10888
TEST=manual:
build for all boards
boot on snow, test:
on AP:
$ while true; do i2cdump -f -y 4 0x48; done >/dev/null
on EC:
$ pmu 10000
See that the machine operates normally with no lock-ups, etc.
Change-Id: I9a48144f560c596429c525a42c77ac41ec095ec0
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26828
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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Enable this feature so that we can be a bus master on the I2C host
port when the AP is not using it.
BUG=chrome-os-partner:10888
TEST=manual:
build for all boards
boot on snow, test that:
- keyboard still works in U-Boot
- battery charging is enabled
- U-Boot can see TPSCHROME
- keyboard works in kernel
- kernel reports battery levels correctly
Change-Id: Ie17e38feea721355a738d85f0295ed5f145c8a0c
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26826
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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This ensures that we have all available help enabled. For the moment
this is useful for development. We may revisit later.
BUG=chrome-os-partner:10895
TEST=manual:
build for all boards
Change-Id: I721e09995959638660ff417dd9420200e2e1a703
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26173
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Cherry-picked from factory-2475.B.
This feature is not implemented and accessing random flash
addresses.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:10237
TEST=on Snow, run flashrom -p internal:bus=lpc --wp-status
Reviewed-on: https://gerrit.chromium.org/gerrit/25979
Reviewed-by: Katie Roberts-Hoffman <katierh@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Change-Id: Idce19f4e2af37faa5fde9d6561779d981772c9ac
Reviewed-on: https://gerrit.chromium.org/gerrit/26666
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
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Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:11749
TEST=on snow with fully discharged dead battery
plug ac power and check if it can charge to full
Change-Id: Ie90255614bff879780edbd2bf1fc77bf8e2c04c8
Reviewed-on: https://gerrit.chromium.org/gerrit/26674
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
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The power button module now needs to know whether the chipset is in
the on state at init-time, in which case it doesn't need to send a
power button pulse to the chipset.
BUG=chrome-os-partner:11085
TEST=manual
1. power on AP to BIOS screen (e.g., in recovery mode)
2. At EC console, 'sysjump A'
3. system should stay powered on
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: Ic1f509204f502d1ddf87314f0e1582c21c991156
Reviewed-on: https://gerrit.chromium.org/gerrit/26700
Reviewed-by: Simon Glass <sjg@chromium.org>
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If flash starts at zero, then flash_dataptr() will return NULL for a valid
region. Change the function around so that it can be used in this case.
BUG=chrome-os-partner:10146
TEST=manual:
Modify code it print out parameters and problems, then:
Writing 256 bytes to 0x0...
0 256 64
ok 131072
Command returned error 1
> flashwrite 0 256
Writing 256 bytes to 0x0...
0 256 64
ok 131072
Command returned error 1
> flashwrite 0 255
Writing 255 bytes to 0x0...
0 255 64
Command usage/param invalid.
Usage: flashwrite offset [size]
Change-Id: I5683fc181ef780310ceff50f120735659e973784
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26749
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
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Rather than go through the task queue, host_command_process() processes
the command immediately, has all of its required state passed in,
allowing the caller complete control of the buffers.
BUG=chrome-os-partner:10533
TEST=manual:
build and boot on link, see that messages are stil processed
build and boot on snow, which uses this new command
See that the SPI keyboard works now
Change-Id: Ib7587de10c42caf01bc95bb4d515fd0afc3da7d8
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25983
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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We see some intermittent failure on PECI read. This CL lower PECI baud
rate from 150K to 100K. Also, we poll PECI temperature 4 times per
second and average over last 4 values. We only report read error when
last 4 read all fails.
This CL also increases the external path delay, increases retry count,
and also enable timing negotiation error bypass.
BUG=chrome-os-partner:10382
TEST=Still able to read from all temperature sensors
Change-Id: I38cefeabd9e3eff4bb8e4df4138c4ffd49cd84a2
Reviewed-on: https://gerrit.chromium.org/gerrit/26554
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
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BUG=chrome-os-partner:11053
TEST='ectool tempsinfo 0' works.
Change-Id: Ia4f33f2fce3b38ac7bfeaff0fdd4ef0840a0b58f
Reviewed-on: https://gerrit.chromium.org/gerrit/26639
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
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When parameter 'len' is smaller or equal to 0, do not null-terminate.
BUG=chrome-os-partner:11041
TEST=Build success.
Change-Id: Ia5267e7d31e3ade8828ba0bc2d68405b4cd236be
Reviewed-on: https://gerrit.chromium.org/gerrit/26640
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
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The current gpio_get_level() is pretty slow because it looks things up each
time. Add a new function to find out the register address and mask to use
to check the value for a particular GPIO.
Time-critical code can then use this to check a GPIO.
BUG=chrome-os-partner:10146
TEST=manual:
build and boot on snow;
Power on the board, hold power button for 10s and see that it powers off
Power control still works, thus GPIOs are functional
Change-Id: Ifc6c56f5cb811e0243e7712725a51948eabd42ab
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26175
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Sometimes it is useful to get access to the flash directly, without using
flash_read(). Add a function to do this.
Since the range checking is done in every function in flash_common,
use the new function to do it for us. That way we get a slight (64 byte)
code size reduction.
BUG=chrome-os-partner:10146
TEST=manual:
build and boot on snow with SPI flash emulation, in U-Boot:
See that the 32KB of flash has been provided correctly.
Change-Id: I6622a24234edaed371dd5b9bf43d1f3974d55e39
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26174
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The WWDG is not ideal for this purpose, since if we fail to handle its
interrupt withint 60ms or so, we get a reset. This can be a problem when we
are reporting a panic, since the uart output takes a long time.
Change to using timer 9, which is free, and make it print a watchdog warning
after one second.
BUG=chrome-os-partner:10146
TEST=manual:
build and boot on snow; waitms 1200 and see that a watchdog timeout is
reported correctly.
See that the panic message is displayed in full without a reset happening
before the end.
Change-Id: Ifc3671098e1f3a7ef409b8d1fb919d22eaa90358
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26172
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This allows us to repeatedly read the battery for testing.
BUG=chrome-os-partner:10888
TEST=manual:
build for all boards
boot on snow (cannot test i2c as it is
Change-Id: I0ed99d59355e1f228486070dcf37863563b16023
Reviewed-on: https://gerrit.chromium.org/gerrit/26290
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Commit-Ready: Simon Glass <sjg@chromium.org>
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This driver was not refactored when the host_command changes were made,
although i2c was. Tidy this up.
SPI requests the command response immediately rather than going through
the task queue, since otherwise a response may take long enough that the
SPI master misses it altogether.
BUG=chrome-os-partner:10533
TEST=manual:
build and boot on snow; In U-Boot:
> sspi 4:0 240 20
See that it gets key messages back now
Change-Id: Ia2c24d4c8876fefedad4c02802f77e50d7159d03
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25982
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Use two suitable GPIOs to implement a simple arbitration scheme.
Each side owns one of the GPIOs, which are normally pulled high.
When one side wants to use I2C as a master, it pulls its GPIO low,
waits for a short period to make sure that the other side is not
also pulling its GPIO low, and then goes ahead with the transaction.
When the transaction is over, the GPIO is released, thus freeing the
I2C bus up for use by the other end.
For simplicity the terminolgy used here is EC for us, and AP for the
other end.
BUG=chrome-os-partner:10888
TEST=manual:
build for all boards
boot on snow (cannot test i2c as it is broken)
Change-Id: I97d9fbd5aba8248c8c1240baaec17db22860665c
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26142
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This corrects a small bug where by the UG bit in EGR was
not getting set, so the shadow registers were not being
reloaded as the comments suggest they should be.
This is really only a minor clean-up. The timer appears to
work fine with or without the patch.
Signed-off-by: David Hendricks <dhendrix@chromium.org>
BUG=none
TEST=timerinfo appears sane on Snow
Change-Id: I637e2fc1f5dbfa1e70d33f96c8bf38ac57cc7b2c
Reviewed-on: https://gerrit.chromium.org/gerrit/26520
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Commit-Ready: David Hendricks <dhendrix@chromium.org>
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Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:10779
TEST=manual
plug/unplug ac power and check powerled
Change-Id: I1f75a67aa20fd076f1c367d7086bfc54fb050dc9
Reviewed-on: https://gerrit.chromium.org/gerrit/26564
Reviewed-by: Vic Yang <victoryang@chromium.org>
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
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This increases the size of each image for STM32 devices from 32KB
to 64KB.
Signed-off-by: David Hendricks <dhendrix@chromium.org>
BUG=none
TEST=Built and flashed to Snow, built for Daisy
Change-Id: Ide9b0a9e9929c8861a701c868e7ad3010aa575e1
Reviewed-on: https://gerrit.chromium.org/gerrit/26635
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Commit-Ready: Simon Glass <sjg@chromium.org>
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Simplify this code, so that it does only one pass of the response data,
calculating the checksum as it copies.
BUG=chrome-os-partner:10535
TEST=manual:
build for all boards
build and boot on daisy
see that keyboard still works
Change-Id: I8b0a2ce1632dd4c1ff54736fb636d9a5cf8c9214
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25981
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This seems to be a hangover from the LPC protocol. We can send a result
just by sending a response with no data.
Drop this function and remove all uses of it.
Also use 'enum ec_status' instead of int, since this is the correct
response type.
BUG=chrome-os-partner:10533
TEST=manual:
build for all boards
build and boot on daisy
Change-Id: I93a029bd6ba8cec567b61af3b410bcead015b5c0
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/25980
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This function has been defined and used in several tests. Let's
consolidate them into the helper class.
BUG=none
TEST=The four tests passed
Change-Id: I069bec84e0f2ce12ef9e8b7fe610f54bb58af0de
Reviewed-on: https://gerrit.chromium.org/gerrit/26534
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
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This test checks the keypress repeat speed. However, there is inevitable
delay incurred by each keypress and thus we cannot be 100% certain about
the number of keypress to expect. Let's set a range instead of expecting
a fixed amount of keypress.
BUG=chrome-os-partner:10287
TEST=Test passed
Change-Id: Ib43bead68e5497cd64251fb45fab522cbaf3ea86
Reviewed-on: https://gerrit.chromium.org/gerrit/26533
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
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This drives the power LED for Snow (PB3) using TIM2 in PWM mode.
Since timer setup and manipulation is STM32-specific, the power LED
logic moved to to chip/stm32/power_led.c.
This also adds a "powerled" console command for testing.
Signed-off-by: David Hendricks <dhendrix@chromium.org>
BUG=chrome-os-partner:10647
TEST=Tested on Snow with powerled command, compiled for Daisy
Change-Id: I5a7dc20d201ea058767e3e76d54e7c8567a3b83c
Reviewed-on: https://gerrit.chromium.org/gerrit/26267
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
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Faults should be enabled, otherwise we just get a hard fault whenever they
occur.
BUG=chrome-os-partner:10146
TEST=manual:
build and boot on snow; cause a fault and see that it is reported correctly
in the panic message, rather than just a hard fault.
Also tested on link, 'rw 1':
> rw 1
=== EXCEPTION: 06 ====== xPSR: 01000000 ===========
r0 :0000000b r1 :00000041 r2 :00000001 r3 :20003720
r4 :00000000 r5 :0000bbb4 r6 :2000371c r7 :00000002
r8 :00000000 r9 :20003721 r10:00000000 r11:00000000
r12:00000000 sp :200019a0 lr :00004ad1 pc :000054f6
Unaligned
mmfs = 01000000, shcsr = 00070008, hfsr = 00000000, dfsr = 00000000
Time: 0x00000000006f0938 us
Deadline: 0x00000000006ec3d4 -> -0.017764 s from now
Active timers:
Tsk 1 0x000000000072bc1e -> 0.242406
Tsk 4 0x00000000006ec3d4 -> -0.017764
Tsk 5 0x00000000007a2333 -> 0.727547
Tsk 6 0x00000000007a2193 -> 0.727131
Tsk 7 0x00000000007a1fd9 -> 0.726689
Tsk 9 0x0000000000eeb452 -> 8.366874
Task Ready Name Events Time (s)
0 R << idle >> 00000000 6.854007
1 WATCHDOG 00000000 0.000442
2 VBOOTHASH 00000000 0.286203
3 LIGHTBAR 00000000 0.018957
4 POWERSTATE 00000000 0.020656
5 TEMPSENSOR 00000000 0.000851
6 THERMAL 00000000 0.000643
7 PWM 00000000 0.000243
8 TYPEMATIC 00000000 0.000015
9 X86POWER 00000000 0.010582
10 I8042CMD 00000000 0.000015
11 HOSTCMD 00000000 0.000014
12 R CONSOLE 00000000 0.000336
13 POWERBTN 00000000 0.003883
14 KEYSCAN 00000000 0.000297
Rebooting...
Change-Id: I95a4a7fae14359aa4e2b645d2110f91161e7df88
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26170
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Add a new function to dump the current dma state, and hide it behind
a more official-sounding CONFIG_DMA_HELP.
BUG=chrome-os-partner:10533
TEST=build and boot on snow
Change-Id: I42fb101628e9044284a6b39447b0b1fc2d36587b
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26168
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By subtracting the current dma count from the number of bytes originally
requested to be transferred, we can find out how many bytes have been
transferred so far.
BUG=chrome-os-partner:10533
TEST=build and boot on snow
Change-Id: Ideee1ed27c08b56882f5d2095341fe04bbe9c34b
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26167
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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VBOOTHASH task is needed for all unit tests to compile. Let's add it to
all task lists.
BUG=none
TEST=all test build success.
Change-Id: I378cd8bcdced193fe4751b33881f7d14ec88c935
Reviewed-on: https://gerrit.chromium.org/gerrit/26532
Reviewed-by: Rong Chang <rongchang@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
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This change fixes mutiple snow charging issues. Including:
- disable i2c host auto selection
- i2c_read8 got wrong output value
- pmu CHARGE_EN control workaround
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:11010
TEST=Only test on snow dvt with AP turned off
plug/unplug ac adapter and check charging led
check console command 'battery'
Change-Id: I29d554b3daa4cfc538bd5bf5ba5233976d381861
Reviewed-on: https://gerrit.chromium.org/gerrit/26529
Tested-by: Rong Chang <rongchang@chromium.org>
Commit-Ready: Rong Chang <rongchang@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Chain TIM3/4 as the 32-bit timer instead of TIM2/3. This frees
up TIM2 to be used for other purposes.
BUG=chrome-os-partner:10647
TEST=Flashed onto Snow, stuff works and timerinfo output is sane
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Change-Id: Icdfe3596a15bc2ee8536f160b1f08ac3041b9193
Reviewed-on: https://gerrit.chromium.org/gerrit/26202
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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BUG=none
TEST=none
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I3353a5a8bd31b69e60908f8a6823b71b05b022ef
Reviewed-on: https://gerrit.chromium.org/gerrit/26489
Commit-Ready: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
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BUG=none
TEST=if it builds, it blends
Change-Id: I619c6ee45eda8e853190ea1267d9751d22afd33d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26453
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This is now superseded by the hash command, which uses a more robust
SHA-256 check.
BUG=none
TEST=if it compiles it's fine
Change-Id: I5ad9256e7af346464301252d62b47bd37852d24a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26452
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In preparation for being able to copy ec_commands.h to u-boot, which
is itself in preparation for u-boot picking it up from /usr/src/ec/
BUG=none
TEST=make link, snow, bds
Change-Id: If256434b6722ff0787ce21a8ed4c7035c28024a8
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26451
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
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Add a way for boards to permit or deny access to the I2C port. This
works in a board-specific manner.
All I2C master traffic requires that board_i2c_claim() be called
first. A dummy function is provided for boards which do not require
this.
BUG=chrome-os-partner:10888
TEST=manual:
build for all boards
boot on snow (cannot test i2c as it is broken)
Change-Id: I786d4ae17f1d798faf13b303b5389679fb6720cb
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26141
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This is more compatible with kernel and u-boot, and will make it
easier to share code between the ec project and those.
BUG=none
TEST=manual:
ectool version -> should work normally
on ec, do 'hostevent set 0x40000'. Then at root shell
ectool queryec
EC returned error result code 19
ectool flashread 0x100000 16 foo
Reading 16 bytes at offset 1048576...
EC returned error result code 2
Read error at offset 0
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I5e2a85f96c874d0730c14e1438a533649cd594f8
Reviewed-on: https://gerrit.chromium.org/gerrit/26359
Commit-Ready: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
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