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Diffstat (limited to 'chip/stm32/registers-stm32f3.h')
-rw-r--r--chip/stm32/registers-stm32f3.h22
1 files changed, 2 insertions, 20 deletions
diff --git a/chip/stm32/registers-stm32f3.h b/chip/stm32/registers-stm32f3.h
index eb753a79fb..79cb8286d0 100644
--- a/chip/stm32/registers-stm32f3.h
+++ b/chip/stm32/registers-stm32f3.h
@@ -585,7 +585,7 @@ typedef volatile struct stm32_spi_regs stm32_spi_regs_t;
#define EXTI_RTC_ALR_EVENT BIT(17)
/* --- ADC --- */
-#if defined(CHIP_VARIANT_STM32F373) || defined(CHIP_FAMILY_STM32F4)
+#if defined(CHIP_VARIANT_STM32F373)
#define STM32_ADC_SR REG32(STM32_ADC1_BASE + 0x00)
#define STM32_ADC_CR1 REG32(STM32_ADC1_BASE + 0x04)
#define STM32_ADC_CR2 REG32(STM32_ADC1_BASE + 0x08)
@@ -740,21 +740,13 @@ enum dma_channel {
STM32_DMAC_I2C2_RX = STM32_DMAC_CH5,
STM32_DMAC_USART1_TX = STM32_DMAC_CH4,
STM32_DMAC_USART1_RX = STM32_DMAC_CH5,
-// TODO(hesling): The following sections will need some manual fixing.
-#if !defined(CHIP_VARIANT_STM32F03X) && !defined(CHIP_VARIANT_STM32F05X)
STM32_DMAC_USART2_RX = STM32_DMAC_CH6,
STM32_DMAC_USART2_TX = STM32_DMAC_CH7,
STM32_DMAC_I2C1_TX = STM32_DMAC_CH6,
STM32_DMAC_I2C1_RX = STM32_DMAC_CH7,
STM32_DMAC_PMSE_ROW = STM32_DMAC_CH6,
STM32_DMAC_PMSE_COL = STM32_DMAC_CH7,
-#ifdef CHIP_FAMILY_STM32L4
- STM32_DMAC_SPI2_RX = STM32_DMAC_CH4,
- STM32_DMAC_SPI2_TX = STM32_DMAC_CH5,
- STM32_DMAC_SPI3_RX = STM32_DMAC_CH9,
- STM32_DMAC_SPI3_TX = STM32_DMAC_CH10,
- STM32_DMAC_COUNT = 14,
-#elif defined(CHIP_VARIANT_STM32F373)
+#if defined(CHIP_VARIANT_STM32F373)
STM32_DMAC_SPI2_RX = STM32_DMAC_CH4,
STM32_DMAC_SPI2_TX = STM32_DMAC_CH5,
STM32_DMAC_SPI3_RX = STM32_DMAC_CH9,
@@ -768,10 +760,6 @@ enum dma_channel {
/* Only DMA1 (with 7 channels) is present on STM32L151x */
STM32_DMAC_COUNT = 7,
#endif
-
-#else /* stm32f03x and stm32f05x have only 5 channels */
- STM32_DMAC_COUNT = 5,
-#endif
};
#define STM32_DMAC_PER_CTLR 8
@@ -806,18 +794,12 @@ typedef volatile struct stm32_dma_regs stm32_dma_regs_t;
#define STM32_DMA_CCR_CHANNEL(channel) (0)
-// TODO(hesling): The following section will need some manual fixing.
-#if defined(CHIP_FAMILY_STM32F3) || defined(CHIP_FAMILY_STM32L4) || \
- defined(CHIP_VARIANT_STM32F09X)
#define STM32_DMA2_REGS ((stm32_dma_regs_t *)STM32_DMA2_BASE)
#define STM32_DMA_REGS(channel) \
((channel) < STM32_DMAC_PER_CTLR ? STM32_DMA1_REGS : STM32_DMA2_REGS)
#define STM32_DMA_CSELR(channel) \
REG32(((channel) < STM32_DMAC_PER_CTLR ? \
STM32_DMA1_BASE : STM32_DMA2_BASE) + 0xA8)
-#else
-#define STM32_DMA_REGS(channel) STM32_DMA1_REGS
-#endif
/* Bits for DMA controller regs (isr and ifcr) */
#define STM32_DMA_CH_OFFSET(channel) (4 * ((channel) % STM32_DMAC_PER_CTLR))