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Diffstat (limited to 'chip/stm32/config-stm32f07x.h')
-rw-r--r--chip/stm32/config-stm32f07x.h18
1 files changed, 0 insertions, 18 deletions
diff --git a/chip/stm32/config-stm32f07x.h b/chip/stm32/config-stm32f07x.h
index d1d01824e9..45b340355c 100644
--- a/chip/stm32/config-stm32f07x.h
+++ b/chip/stm32/config-stm32f07x.h
@@ -6,7 +6,6 @@
/* Memory mapping */
#define CONFIG_FLASH_BASE 0x08000000
#define CONFIG_FLASH_PHYSICAL_SIZE (128 * 1024)
-#define CONFIG_FLASH_SIZE CONFIG_FLASH_PHYSICAL_SIZE
#define CONFIG_FLASH_BANK_SIZE 0x1000
#define CONFIG_FLASH_ERASE_SIZE 0x0800 /* erase bank size */
#define CONFIG_FLASH_WRITE_SIZE 0x0002 /* minimum write size */
@@ -17,23 +16,6 @@
#define CONFIG_RAM_BASE 0x20000000
#define CONFIG_RAM_SIZE 0x00004000
-/* Size of the first firmware image in flash */
-#define CONFIG_FW_IMAGE_SIZE (CONFIG_FLASH_SIZE / 2)
-
-#define CONFIG_RO_MEM_OFF 0
-#define CONFIG_RO_SIZE (CONFIG_FW_IMAGE_SIZE - CONFIG_FW_PSTATE_SIZE)
-#define CONFIG_RW_MEM_OFF (CONFIG_RO_MEM_OFF + CONFIG_FW_IMAGE_SIZE)
-#define CONFIG_RW_SIZE (CONFIG_FLASH_SIZE - CONFIG_FW_IMAGE_SIZE)
-#define CONFIG_WP_OFF CONFIG_RO_MEM_OFF
-#define CONFIG_WP_SIZE CONFIG_FW_IMAGE_SIZE
-
-/*
- * Put pstate after RO to give RW more space and make RO write protect region
- * contiguous.
- */
-#define CONFIG_FW_PSTATE_SIZE CONFIG_FLASH_BANK_SIZE
-#define CONFIG_FW_PSTATE_OFF (CONFIG_RO_MEM_OFF + CONFIG_RO_SIZE)
-
/* Number of IRQ vectors on the NVIC */
#define CONFIG_IRQ_COUNT 32