diff options
Diffstat (limited to 'board/hatch_fp/board.c')
-rw-r--r-- | board/hatch_fp/board.c | 85 |
1 files changed, 85 insertions, 0 deletions
diff --git a/board/hatch_fp/board.c b/board/hatch_fp/board.c new file mode 100644 index 0000000000..b86f0b8f46 --- /dev/null +++ b/board/hatch_fp/board.c @@ -0,0 +1,85 @@ +/* Copyright 2019 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +/* Meowth Fingerprint MCU configuration */ + +#include "common.h" +#include "console.h" +#include "gpio.h" +#include "hooks.h" +#include "registers.h" +#include "spi.h" +#include "system.h" +#include "task.h" +#include "util.h" + +#ifndef HAS_TASK_FPSENSOR +void fps_event(enum gpio_signal signal) +{ +} +#endif + +static void ap_deferred(void) +{ + /* + * in S3: SLP_S3_L is 0 and SLP_S0_L is X. + * in S0ix: SLP_S3_L is X and SLP_S0_L is 0. + * in S0: SLP_S3_L is 1 and SLP_S0_L is 1. + * in S5/G3, the FP MCU should not be running. + */ + int running = gpio_get_level(GPIO_PCH_SLP_S3_L) + && gpio_get_level(GPIO_PCH_SLP_S0_L); + + if (running) { /* S0 */ + disable_sleep(SLEEP_MASK_AP_RUN); + hook_notify(HOOK_CHIPSET_RESUME); + } else { /* S0ix/S3 */ + hook_notify(HOOK_CHIPSET_SUSPEND); + enable_sleep(SLEEP_MASK_AP_RUN); + } +} +DECLARE_DEFERRED(ap_deferred); + +/* PCH power state changes */ +void slp_event(enum gpio_signal signal) +{ + hook_call_deferred(&ap_deferred_data, 0); +} + +#include "gpio_list.h" + +/* SPI devices */ +const struct spi_device_t spi_devices[] = { + /* Fingerprint sensor (SCLK at 4Mhz) */ + { CONFIG_SPI_FP_PORT, 3, GPIO_SPI2_NSS } +}; +const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices); + +static void spi_configure(void) +{ + /* Configure SPI GPIOs */ + gpio_config_module(MODULE_SPI_MASTER, 1); + /* + * Set all SPI master signal pins to very high speed: + * pins B12/13/14/15 + */ + STM32_GPIO_OSPEEDR(GPIO_B) |= 0xff000000; + /* Enable clocks to SPI2 module (master) */ + STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI2; + + spi_enable(CONFIG_SPI_FP_PORT, 1); +} + +/* Initialize board. */ +static void board_init(void) +{ + spi_configure(); + + /* Enable interrupt on PCH power signals */ + gpio_enable_interrupt(GPIO_PCH_SLP_S3_L); + gpio_enable_interrupt(GPIO_PCH_SLP_S0_L); + /* enable the SPI slave interface if the PCH is up */ + hook_call_deferred(&ap_deferred_data, 0); +} +DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); |