summaryrefslogtreecommitdiff
path: root/board/drallion_ish/gpio.inc
diff options
context:
space:
mode:
Diffstat (limited to 'board/drallion_ish/gpio.inc')
-rw-r--r--board/drallion_ish/gpio.inc22
1 files changed, 22 insertions, 0 deletions
diff --git a/board/drallion_ish/gpio.inc b/board/drallion_ish/gpio.inc
new file mode 100644
index 0000000000..89b025e178
--- /dev/null
+++ b/board/drallion_ish/gpio.inc
@@ -0,0 +1,22 @@
+/* -*- mode:c -*-
+ *
+ * Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+GPIO_INT(ACCEL_GYRO_INT_L, PIN(0), GPIO_INT_FALLING, lsm6dsm_interrupt)
+GPIO_INT(LID_OPEN, PIN(5), GPIO_INT_BOTH, lid_interrupt) /* LID_CL_NB_L */
+GPIO_INT(TABLET_MODE_L, PIN(6), GPIO_INT_BOTH, hall_sensor_isr) /* LID_CL_TAB_L */
+
+GPIO(NB_MODE_L, PIN(4), GPIO_OUT_LOW)
+
+/*
+ * We don't have a ENTERING_RW signal wired to the cr50 but common code needs
+ * it to be defined.
+ */
+UNIMPLEMENTED(ENTERING_RW)
+
+/*
+ * SDA and SCL gpio must be set correctly in coreboot gpio
+ */