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Diffstat (limited to 'board/cr50/board.c')
-rw-r--r--board/cr50/board.c29
1 files changed, 28 insertions, 1 deletions
diff --git a/board/cr50/board.c b/board/cr50/board.c
index 2463534167..e61f9be991 100644
--- a/board/cr50/board.c
+++ b/board/cr50/board.c
@@ -186,6 +186,11 @@ int board_has_ec_cr50_comm_support(void)
return !!(board_properties & BOARD_EC_CR50_COMM_SUPPORT);
}
+int board_get_ccd_rec_lid_pin(void)
+{
+ return board_properties & BOARD_CCD_REC_LID_PIN_MASK;
+}
+
/* Get header address of the backup RW copy. */
const struct SignedHeader *get_other_rw_addr(void)
{
@@ -303,7 +308,8 @@ static struct board_cfg board_cfg_table[] = {
{
.strap_cfg = 0x0E,
.board_properties = BOARD_SLAVE_CONFIG_SPI |
- BOARD_USE_PLT_RESET | BOARD_EC_CR50_COMM_SUPPORT,
+ BOARD_USE_PLT_RESET | BOARD_EC_CR50_COMM_SUPPORT |
+ BOARD_CCD_REC_LID_PIN_DIOA9,
},
/* Zork: DIOA12 = 5K PU, DIOA6 = 1M PU */
{
@@ -657,6 +663,27 @@ static void configure_board_specific_gpios(void)
/* Enable powerdown exit on DIOM0 */
GWRITE_FIELD(PINMUX, EXITEN0, DIOM0, 1);
}
+ /* Connect the correct pin to the lid open/recovery switch gpio. */
+ switch (board_get_ccd_rec_lid_pin()) {
+ case BOARD_CCD_REC_LID_PIN_DIOA1:
+ GWRITE(PINMUX, GPIO1_GPIO10_SEL, GC_PINMUX_DIOA1_SEL);
+ GWRITE(PINMUX, DIOA1_SEL, GC_PINMUX_GPIO1_GPIO10_SEL);
+ GWRITE_FIELD(PINMUX, DIOA1_CTL, IE, 1);
+ break;
+ case BOARD_CCD_REC_LID_PIN_DIOA9:
+ GWRITE(PINMUX, GPIO1_GPIO10_SEL, GC_PINMUX_DIOA9_SEL);
+ GWRITE(PINMUX, DIOA9_SEL, GC_PINMUX_GPIO1_GPIO10_SEL);
+ GWRITE_FIELD(PINMUX, DIOA9_CTL, IE, 1);
+ break;
+ case BOARD_CCD_REC_LID_PIN_DIOA12:
+ GWRITE(PINMUX, GPIO1_GPIO10_SEL, GC_PINMUX_DIOA12_SEL);
+ GWRITE(PINMUX, DIOA12_SEL, GC_PINMUX_GPIO1_GPIO10_SEL);
+ GWRITE_FIELD(PINMUX, DIOA12_CTL, IE, 1);
+ break;
+ default:
+ gpio_set_flags(GPIO_CCD_REC_LID_SWITCH, 0);
+ break;
+ }
if (board_uses_closed_source_set1())
closed_source_set1_configure_gpios();