diff options
| -rw-r--r-- | zephyr/Kconfig | 16 | ||||
| -rw-r--r-- | zephyr/shim/src/system.c | 21 |
2 files changed, 31 insertions, 6 deletions
diff --git a/zephyr/Kconfig b/zephyr/Kconfig index 6253631156..58961630ce 100644 --- a/zephyr/Kconfig +++ b/zephyr/Kconfig @@ -115,6 +115,22 @@ config PLATFORM_EC_BOARD_RESET_AFTER_POWER_ON the EC starts up, performs some amount of processing and then gets a reset that it is not expecting. +config PLATFORM_EC_WAIT_RESET_CYCLES_PER_ITERATION + int "CPU execution cycle per iteration for waiting the H1 reset" + default 4 + depends on PLATFORM_EC_BOARD_RESET_AFTER_POWER_ON + help + This options specifies the number of CPU execution cycles per delay + loop iteration, while waiting for the H1 to reset. + +config PLATFORM_EC_PREINIT_HW_CYCLES_PER_SEC + int "CPU power up clock cycle per second" + default 100000000 + depends on PLATFORM_EC_BOARD_RESET_AFTER_POWER_ON + help + This option specifies the frequency (in Hz) of the CPU core when + coming out of a power on reset. + config PLATFORM_EC_BRINGUP bool "Enable early bringup debugging features" help diff --git a/zephyr/shim/src/system.c b/zephyr/shim/src/system.c index 2614a1fcb4..8db8ba437a 100644 --- a/zephyr/shim/src/system.c +++ b/zephyr/shim/src/system.c @@ -24,6 +24,11 @@ DT_PROP(DT_PATH(named_bbram_regions, node), offset) #define GET_BBRAM_SIZE(node) DT_PROP(DT_PATH(named_bbram_regions, node), size) +/* 2 second delay for waiting the H1 reset */ +#define WAIT_RESET_TIME \ + (CONFIG_PLATFORM_EC_PREINIT_HW_CYCLES_PER_SEC * 2 / \ + CONFIG_PLATFORM_EC_WAIT_RESET_CYCLES_PER_ITERATION) + LOG_MODULE_REGISTER(shim_system, LOG_LEVEL_ERR); STATIC_IF_NOT(CONFIG_ZTEST) const struct device *bbram_dev; @@ -355,13 +360,17 @@ static int system_preinitialize(const struct device *unused) * previous power-on, and treat the second reset as a power-on instead * of a reset. */ - if (IS_ENABLED(CONFIG_BOARD_RESET_AFTER_POWER_ON) && - system_get_reset_flags() & EC_RESET_FLAG_INITIAL_PWR) { - /* TODO(b/182875520): Change to use 2 second delay. */ - while (1) - continue; +#ifdef CONFIG_BOARD_RESET_AFTER_POWER_ON + if (system_get_reset_flags() & EC_RESET_FLAG_INITIAL_PWR) { + /* + * The current initial stage couldn't use the kernel delay + * function. Use CPU nop instruction to wait for the external + * reset from H1. + */ + for (uint32_t i = WAIT_RESET_TIME; i; i--) + arch_nop(); } - +#endif return 0; } |