diff options
| -rw-r--r-- | chip/ish/gpio.c | 8 | ||||
| -rw-r--r-- | chip/ish/registers.h | 4 | ||||
| -rw-r--r-- | core/minute-ia/interrupts.c | 1 |
3 files changed, 12 insertions, 1 deletions
diff --git a/chip/ish/gpio.c b/chip/ish/gpio.c index 92304fc9b7..1458240115 100644 --- a/chip/ish/gpio.c +++ b/chip/ish/gpio.c @@ -31,4 +31,12 @@ static void gpio_init(void) { /* TBD */ } + +static void gpio_interrupt(void) +{ + /*TODO*/ +} + +DECLARE_IRQ(ISH_GPIO_IRQ, gpio_interrupt); + DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); diff --git a/chip/ish/registers.h b/chip/ish/registers.h index 74306e9159..4ad9176a0e 100644 --- a/chip/ish/registers.h +++ b/chip/ish/registers.h @@ -43,6 +43,8 @@ enum ish_i2c_port { /* HW interrupt pins mapped to IOAPIC, from I/O sources */ #define ISH_I2C0_IRQ 0 #define ISH_I2C1_IRQ 1 +#define ISH_I2C2_IRQ 40 +#define ISH_GPIO_IRQ 7 #define ISH_HPET_TIMER0_IRQ 55 #define ISH_HPET_TIMER1_IRQ 8 #define ISH_HPET_TIMER2_IRQ 11 @@ -50,7 +52,6 @@ enum ish_i2c_port { #define ISH_IPC_ISH2HOST_CLR_IRQ 24 #define ISH_UART0_IRQ 34 #define ISH_UART1_IRQ 35 -#define ISH_I2C2_IRQ 40 /* Interrupt vectors 0-31 are architecture reserved. * Vectors 32-255 are user-defined. @@ -68,6 +69,7 @@ enum ish_i2c_port { #define ISH_I2C0_VEC IRQ_TO_VEC(ISH_I2C0_IRQ) #define ISH_I2C1_VEC IRQ_TO_VEC(ISH_I2C1_IRQ) #define ISH_I2C2_VEC IRQ_TO_VEC(ISH_I2C2_IRQ) +#define ISH_GPIO_VEC IRQ_TO_VEC(ISH_GPIO_IRQ) #define ISH_HPET_TIMER0_VEC IRQ_TO_VEC(ISH_HPET_TIMER0_IRQ) #define ISH_HPET_TIMER1_VEC IRQ_TO_VEC(ISH_HPET_TIMER1_IRQ) #define ISH_HPET_TIMER2_VEC IRQ_TO_VEC(ISH_HPET_TIMER2_IRQ) diff --git a/core/minute-ia/interrupts.c b/core/minute-ia/interrupts.c index 885e94449d..398c6cbb5c 100644 --- a/core/minute-ia/interrupts.c +++ b/core/minute-ia/interrupts.c @@ -70,6 +70,7 @@ static const irq_desc_t system_irqs[] = { LEVEL_INTR(ISH_I2C0_IRQ, ISH_I2C0_VEC), LEVEL_INTR(ISH_I2C1_IRQ, ISH_I2C1_VEC), LEVEL_INTR(ISH_I2C2_IRQ, ISH_I2C2_VEC), + LEVEL_INTR(ISH_GPIO_IRQ, ISH_GPIO_VEC), LEVEL_INTR(ISH_IPC_HOST2ISH_IRQ, ISH_IPC_VEC), LEVEL_INTR(ISH_HPET_TIMER0_IRQ, ISH_HPET_TIMER0_VEC), LEVEL_INTR(ISH_HPET_TIMER1_IRQ, ISH_HPET_TIMER1_VEC), |