diff options
| -rw-r--r-- | chip/stm32/registers.h | 5 | ||||
| -rw-r--r-- | chip/stm32/spi.c | 12 |
2 files changed, 11 insertions, 6 deletions
diff --git a/chip/stm32/registers.h b/chip/stm32/registers.h index 2037ecd234..0b64208e20 100644 --- a/chip/stm32/registers.h +++ b/chip/stm32/registers.h @@ -684,8 +684,9 @@ struct stm32_spi_regs { uint16_t cr2; uint16_t _pad1; unsigned sr; - uint16_t dr; - uint16_t _pad2; + uint8_t dr; + uint8_t _pad2; + uint16_t _pad3; unsigned crcpr; unsigned rxcrcr; unsigned txcrcr; diff --git a/chip/stm32/spi.c b/chip/stm32/spi.c index c6fd24bc36..f784d94e31 100644 --- a/chip/stm32/spi.c +++ b/chip/stm32/spi.c @@ -26,12 +26,12 @@ /* DMA channel option */ static const struct dma_option dma_tx_option = { STM32_DMAC_SPI1_TX, (void *)&STM32_SPI1_REGS->dr, - STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_16_BIT + STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_8_BIT }; static const struct dma_option dma_rx_option = { STM32_DMAC_SPI1_RX, (void *)&STM32_SPI1_REGS->dr, - STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_16_BIT + STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_8_BIT }; /* @@ -550,8 +550,12 @@ static void spi_init(void) /* Enable clocks to SPI1 module */ STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI1; - /* Enable rx DMA and get ready to receive our first transaction */ - spi->cr2 = STM32_SPI_CR2_RXDMAEN | STM32_SPI_CR2_TXDMAEN; + /* + * Enable rx/tx DMA and get ready to receive our first transaction and + * "disable" FIFO by setting event to happen after only 1 byte + */ + spi->cr2 = STM32_SPI_CR2_RXDMAEN | STM32_SPI_CR2_TXDMAEN | + STM32_SPI_CR2_FRXTH; /* Enable the SPI peripheral */ spi->cr1 |= STM32_SPI_CR1_SPE; |