diff options
-rw-r--r-- | common/build.mk | 1 | ||||
-rw-r--r-- | common/cbi.c | 3 | ||||
-rw-r--r-- | common/cbi_gpio.c | 72 | ||||
-rw-r--r-- | include/config.h | 7 | ||||
-rw-r--r-- | include/cros_board_info.h | 12 | ||||
-rw-r--r-- | zephyr/CMakeLists.txt | 3 | ||||
-rw-r--r-- | zephyr/Kconfig | 25 | ||||
-rw-r--r-- | zephyr/drivers/cros_cbi/CMakeLists.txt | 1 | ||||
-rw-r--r-- | zephyr/shim/include/config_chip.h | 5 | ||||
-rw-r--r-- | zephyr/shim/src/CMakeLists.txt | 1 |
10 files changed, 124 insertions, 6 deletions
diff --git a/common/build.mk b/common/build.mk index 36724d619e..5d76188f7b 100644 --- a/common/build.mk +++ b/common/build.mk @@ -51,6 +51,7 @@ common-$(CONFIG_BODY_DETECTION)+=body_detection.o common-$(CONFIG_CAPSENSE)+=capsense.o common-$(CONFIG_CEC)+=cec.o common-$(CONFIG_CBI_EEPROM)+=cbi.o cbi_eeprom.o +common-$(CONFIG_CBI_GPIO)+=cbi.o cbi_gpio.o ifeq ($(HAS_MOCK_CHARGE_MANAGER),) common-$(CONFIG_CHARGE_MANAGER)+=charge_manager.o endif diff --git a/common/cbi.c b/common/cbi.c index 9e6aa2cda1..345e313c54 100644 --- a/common/cbi.c +++ b/common/cbi.c @@ -145,7 +145,8 @@ static int do_cbi_read(void) } /* Check CRC. This supports new fields unknown to this parser. */ - if (cbi_crc8(head) != head->crc) { + if (cbi_config.storage_type != CBI_STORAGE_TYPE_GPIO && + cbi_crc8(head) != head->crc) { CPRINTS("Bad CRC"); return EC_ERROR_INVAL; } diff --git a/common/cbi_gpio.c b/common/cbi_gpio.c new file mode 100644 index 0000000000..7b9fb25ebb --- /dev/null +++ b/common/cbi_gpio.c @@ -0,0 +1,72 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Support Cros Board Info GPIO */ + +#include "console.h" +#include "cros_board_info.h" +#include "gpio.h" +#include "system.h" +#include "util.h" + +#define CPRINTS(format, args...) cprints(CC_SYSTEM, "CBI " format, ## args) + +static int cbi_gpio_read(uint8_t offset, uint8_t *data, int len) +{ + int board_id; + int sku_id; + int rv; + int err = 0; + + if (cbi_get_cache_status() == CBI_CACHE_STATUS_SYNCED) + return EC_SUCCESS; + + cbi_create(); + + board_id = system_get_board_version(); + if (board_id < 0) { + CPRINTS("Failed (%d) to get a valid board id", -board_id); + err++; + } else { + rv = cbi_set_board_info(CBI_TAG_BOARD_VERSION, + (uint8_t *)&board_id, sizeof(int)); + if (rv) { + CPRINTS("Failed (%d) to set BOARD_VERSION tag", rv); + err++; + } + } + + sku_id = system_get_sku_id(); + rv = cbi_set_board_info(CBI_TAG_SKU_ID, + (uint8_t *)&sku_id, sizeof(int)); + if (rv) { + CPRINTS("Failed (%d) to set SKU_ID tag", rv); + err++; + } + + if (err > 0) + return EC_ERROR_UNKNOWN; + + return EC_SUCCESS; +} + +static int cbi_gpio_is_write_protected(void) +{ + /* + * When CBI comes from strapping pins, any attempts for updating CBI + * storage should be rejected. + */ + return 1; +} + +const struct cbi_storage_driver gpio_drv = { + .load = cbi_gpio_read, + .is_protected = cbi_gpio_is_write_protected, +}; + +const struct cbi_storage_config_t cbi_config = { + .storage_type = CBI_STORAGE_TYPE_GPIO, + .drv = &gpio_drv, +}; diff --git a/include/config.h b/include/config.h index 32ba1b71aa..3136dd18fe 100644 --- a/include/config.h +++ b/include/config.h @@ -5167,6 +5167,9 @@ */ #undef CONFIG_CBI_EEPROM +/* Define this to support Cros Board Info from GPIO. */ +#undef CONFIG_CBI_GPIO + /*****************************************************************************/ /* * ISH config defaults @@ -6365,6 +6368,10 @@ "are mutually exclusive. " #endif /* CONFIG_BOARD_VERSION_CBI && CONFIG_BOARD_VERSION_GPIO */ +#if defined(CONFIG_CBI_EEPROM) && defined(CONFIG_CBI_GPIO) +#error "CONFIG_CBI_EEPROM and CONFIG_CBI_GPIO are mutually exclusive." +#endif + #if !defined(CONFIG_ZEPHYR) && !defined(CONFIG_ACCELGYRO_ICM_COMM_SPI) && \ !defined(CONFIG_ACCELGYRO_ICM_COMM_I2C) #ifdef I2C_PORT_ACCEL diff --git a/include/cros_board_info.h b/include/cros_board_info.h index 6f2871916e..ee5a717ee5 100644 --- a/include/cros_board_info.h +++ b/include/cros_board_info.h @@ -12,7 +12,18 @@ #define CBI_VERSION_MAJOR 0 #define CBI_VERSION_MINOR 0 + +#ifdef CONFIG_CBI_GPIO +/* + * if CBI is sourced from GPIO, the CBI cache only needs to accomondate + * BOARD_VERSION and SKU_ID + */ +#define CBI_IMAGE_SIZE (sizeof(struct cbi_header) + (2 * \ + (sizeof(struct cbi_data) + sizeof(uint32_t)))) +#else #define CBI_IMAGE_SIZE 256 +#endif + static const uint8_t cbi_magic[] = { 0x43, 0x42, 0x49 }; /* 'C' 'B' 'I' */ struct cbi_header { @@ -48,6 +59,7 @@ enum cbi_cache_status { enum cbi_storage_type { CBI_STORAGE_TYPE_EEPROM = 0, + CBI_STORAGE_TYPE_GPIO = 1 }; /* diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt index 496c1574ef..51c1b8b7da 100644 --- a/zephyr/CMakeLists.txt +++ b/zephyr/CMakeLists.txt @@ -191,6 +191,9 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGE_RAMP_SW zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CBI_EEPROM "${PLATFORM_EC}/common/cbi.c" "${PLATFORM_EC}/common/cbi_eeprom.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CBI_GPIO + "${PLATFORM_EC}/common/cbi.c" + "${PLATFORM_EC}/common/cbi_gpio.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CONSOLE_CMD_MEM "${PLATFORM_EC}/common/memory_commands.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_DPTF diff --git a/zephyr/Kconfig b/zephyr/Kconfig index ef41309d28..ea437bda40 100644 --- a/zephyr/Kconfig +++ b/zephyr/Kconfig @@ -141,20 +141,35 @@ config PLATFORM_EC_BYPASS_CBI_EEPROM_WP_CHECK When defined, ectool can be used to reprogram all CBI fields, regardless of the state of the hardware write protect. +choice PLATFORM_EC_CBI_STORAGE_TYPE + prompt "Select CBI storage Type" + optional + help + CBI is a means for accessing board information, typically set + during the factory process. This allows selection of the physical + storage of CBI source. + + See here for detailed information on CBI: + + https://chromium.googlesource.com/chromiumos/docs/+/master/design_docs/cros_board_info.md + config PLATFORM_EC_CBI_EEPROM bool "CBI EEPROM support" depends on PLATFORM_EC_I2C help - Enables various Chromium OS Board Info (CBI) accessors as well as - host and console commands. CBI is a means for accessing information - about a board, typically written during the factory process. + Enables Chromium OS Board Info (CBI) from EEPROM. One must specify both I2C_PORT_EEPROM and I2C_ADDR_EEPROM_FLAGS to the CBI EEPROM's i2c port and 7-bit i2c address. - See here for information on CBI: +config PLATFORM_EC_CBI_GPIO + bool "CBI GPIO support" + help + Enables Chromium OS Board Info (CBI) from strapping pins. EC reads + the BOARD ID and SKU ID from GPIOs and then substantiate in-memory + CBI for AP to query. - https://chromium.googlesource.com/chromiumos/docs/+/master/design_docs/cros_board_info.md +endchoice config PLATFORM_EC_CHIPSET_RESET_HOOK bool "Provide a hook for when the AP resets" diff --git a/zephyr/drivers/cros_cbi/CMakeLists.txt b/zephyr/drivers/cros_cbi/CMakeLists.txt index 6ba5b25a97..644865ae77 100644 --- a/zephyr/drivers/cros_cbi/CMakeLists.txt +++ b/zephyr/drivers/cros_cbi/CMakeLists.txt @@ -1,3 +1,4 @@ # SPDX-License-Identifier: Apache-2.0 zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CBI_EEPROM cros_cbi.c) +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CBI_GPIO cros_cbi.c) diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h index f04e5f9945..0cfd9de4d7 100644 --- a/zephyr/shim/include/config_chip.h +++ b/zephyr/shim/include/config_chip.h @@ -1425,6 +1425,11 @@ #define I2C_ADDR_EEPROM_FLAGS DT_REG_ADDR(DT_NODELABEL(cbi_eeprom)) #endif +#undef CONFIG_CBI_GPIO +#ifdef CONFIG_PLATFORM_EC_CBI_GPIO +#define CONFIG_CBI_GPIO +#endif + #undef CONFIG_VBOOT_HASH #ifdef CONFIG_PLATFORM_EC_VBOOT_HASH #define CONFIG_VBOOT_HASH diff --git a/zephyr/shim/src/CMakeLists.txt b/zephyr/shim/src/CMakeLists.txt index b10b3789ef..9b198ec3f2 100644 --- a/zephyr/shim/src/CMakeLists.txt +++ b/zephyr/shim/src/CMakeLists.txt @@ -17,6 +17,7 @@ zephyr_library_sources_ifdef(no_libgcc libgcc_${ARCH}.S) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ADC adc.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CBI_EEPROM cbi.c) +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CBI_GPIO cbi.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ESPI espi.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_FAN fan.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_FLASH_CROS flash.c) |