diff options
| -rw-r--r-- | board/cr50/gpio.inc | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/board/cr50/gpio.inc b/board/cr50/gpio.inc index d224189042..43e97ccc0e 100644 --- a/board/cr50/gpio.inc +++ b/board/cr50/gpio.inc @@ -149,12 +149,14 @@ GPIO(EC_TX_CR50_RX, PIN(1, 11), GPIO_INPUT) /* Pull this low to interrupt the AP */ GPIO(INT_AP_L, PIN(0, 0), GPIO_OUT_HIGH) -/* Use these to take over the AP & EC flash (only when AP & EC are off!) */ -GPIO(EC_FLASH_SELECT, PIN(0, 1), GPIO_OUT_LOW) +/* + * Use these to take over the AP & EC flash (only when AP & EC are off!) + * Disable sleep when they're set to 1. + */ +GPIO(EC_FLASH_SELECT, PIN(0, 1), GPIO_OUT_LOW | GPIO_SLEEP_DIS_HIGH) /* * If this gpio is changed, you must update the AP_FLASH_SELECT pinmux * setup in board.c accordingly. - * Disable sleep when the signal is set high. */ GPIO(AP_FLASH_SELECT, PIN(0, 2), GPIO_OUT_LOW | GPIO_SLEEP_DIS_HIGH) @@ -221,8 +223,10 @@ GPIO(I2CP_SDA, PIN(0, 14), GPIO_INPUT) * Fake open drain on EC_TX_CR50_RX_OUT. When asserted, the signal can be used * to enable UART programming mode on the EC. The signal needs to fake open * drain so it can still be used as the cr50 rx signal when it is deasserted. + * + * Disable sleep when cr50 sets it to 0. */ -GPIO(EC_TX_CR50_RX_OUT, PIN(0, 15), GPIO_ODR_HIGH) +GPIO(EC_TX_CR50_RX_OUT, PIN(0, 15), GPIO_ODR_HIGH | GPIO_SLEEP_DIS_LOW) /* * ENTERING_RW is not a GPIO in H1, but an input pin to RBOX module. |