diff options
| -rw-r--r-- | driver/retimer/ps8818.c | 23 | ||||
| -rw-r--r-- | driver/retimer/ps8818.h | 82 |
2 files changed, 93 insertions, 12 deletions
diff --git a/driver/retimer/ps8818.c b/driver/retimer/ps8818.c index 99802b7fcc..d9c89ef7e4 100644 --- a/driver/retimer/ps8818.c +++ b/driver/retimer/ps8818.c @@ -14,17 +14,17 @@ #include "ps8818.h" #include "usb_mux.h" -static int ps8818_i2c_read(int port, int offset, int *data) +static int ps8818_i2c_read(int port, int page, int offset, int *data) { return i2c_read8(usb_retimers[port].i2c_port, - usb_retimers[port].i2c_addr_flags, + usb_retimers[port].i2c_addr_flags + page, offset, data); } -static int ps8818_i2c_write(int port, int offset, int data) +static int ps8818_i2c_write(int port, int page, int offset, int data) { return i2c_write8(usb_retimers[port].i2c_port, - usb_retimers[port].i2c_addr_flags, + usb_retimers[port].i2c_addr_flags + page, offset, data); } @@ -35,7 +35,10 @@ int ps8818_detect(int port) /* Detected if we are powered and can read the device */ if (!chipset_in_state(CHIPSET_STATE_HARD_OFF)) - rv = ps8818_i2c_read(port, PS8818_REG_FLIP, &val); + rv = ps8818_i2c_read(port, + PS8818_REG_PAGE0, + PS8818_REG0_FLIP, + &val); return rv; } @@ -54,7 +57,10 @@ static int ps8818_set_mux(int port, mux_state_t mux_state) if (mux_state & USB_PD_MUX_DP_ENABLED) val |= PS8818_MODE_DP_ENABLE; - rv = ps8818_i2c_write(port, PS8818_REG_MODE, val); + rv = ps8818_i2c_write(port, + PS8818_REG_PAGE0, + PS8818_REG0_MODE, + val); if (rv) return rv; @@ -62,7 +68,10 @@ static int ps8818_set_mux(int port, mux_state_t mux_state) if (mux_state & USB_PD_MUX_POLARITY_INVERTED) val |= PS8818_FLIP_CONFIG; - return ps8818_i2c_write(port, PS8818_REG_FLIP, val); + return ps8818_i2c_write(port, + PS8818_REG_PAGE0, + PS8818_REG0_FLIP, + val); } const struct usb_retimer_driver ps8818_usb_retimer = { diff --git a/driver/retimer/ps8818.h b/driver/retimer/ps8818.h index 39e6f04b13..a42605229e 100644 --- a/driver/retimer/ps8818.h +++ b/driver/retimer/ps8818.h @@ -10,12 +10,84 @@ #define PS8818_I2C_ADDR_FLAGS 0x28 -#define PS8818_REG_FLIP 0x00 -#define PS8818_FLIP_CONFIG BIT(7) +/* + * PAGE 0 Register Definitions + */ +#define PS8818_REG_PAGE0 0x00 + +#define PS8818_REG0_FLIP 0x00 +#define PS8818_FLIP_CONFIG BIT(7) + +#define PS8818_REG0_MODE 0x01 +#define PS8818_MODE_DP_ENABLE BIT(7) +#define PS8818_MODE_USB_ENABLE BIT(6) + +#define PS8818_REG0_DPHPD_CONFIG 0x02 +#define PS8818_DPHPD_CONFIG_INHPD_DISABLE BIT(7) + +/* + * PAGE 1 Register Definitions + */ +#define PS8818_REG_PAGE1 0x01 + +#define PS8818_REG1_APTX1EQ_10G_LEVEL 0x00 +#define PS8818_REG1_APTX2EQ_10G_LEVEL 0x02 +#define PS8818_REG1_CRX1EQ_10G_LEVEL 0x08 +#define PS8818_REG1_CRX2EQ_10G_LEVEL 0x0A +#define PS8818_REG1_APTX1EQ_5G_LEVEL 0x70 +#define PS8818_REG1_APTX2EQ_5G_LEVEL 0x72 +#define PS8818_REG1_CRX1EQ_5G_LEVEL 0x78 +#define PS8818_REG1_CRX2EQ_5G_LEVEL 0x7A +#define PS8818_EQ_LEVEL_UP_9DB (0) +#define PS8818_EQ_LEVEL_UP_10DB (1) +#define PS8818_EQ_LEVEL_UP_12DB (2) +#define PS8818_EQ_LEVEL_UP_13DB (3) +#define PS8818_EQ_LEVEL_UP_16DB (4) +#define PS8818_EQ_LEVEL_UP_17DB (5) +#define PS8818_EQ_LEVEL_UP_18DB (6) +#define PS8818_EQ_LEVEL_UP_19DB (7) +#define PS8818_EQ_LEVEL_UP_20DB (8) +#define PS8818_EQ_LEVEL_UP_21DB (9) +#define PS8818_EQ_LEVEL_UP_MASK (0x0F) + +#define PS8818_REG1_DPEQ_LEVEL 0xB6 +#define PS8818_DPEQ_LEVEL_UP_9DB (0 << 3) +#define PS8818_DPEQ_LEVEL_UP_10DB (1 << 3) +#define PS8818_DPEQ_LEVEL_UP_12DB (2 << 3) +#define PS8818_DPEQ_LEVEL_UP_13DB (3 << 3) +#define PS8818_DPEQ_LEVEL_UP_16DB (4 << 3) +#define PS8818_DPEQ_LEVEL_UP_17DB (5 << 3) +#define PS8818_DPEQ_LEVEL_UP_18DB (6 << 3) +#define PS8818_DPEQ_LEVEL_UP_19DB (7 << 3) +#define PS8818_DPEQ_LEVEL_UP_20DB (8 << 3) +#define PS8818_DPEQ_LEVEL_UP_21DB (9 << 3) +#define PS8818_DPEQ_LEVEL_UP_MASK (0x0F << 3) + +#define PS8818_REG1_LINK_TRAINING 0xB7 +#define PS8818_LINK_TRAINING_DISABLE BIT(4) + +/* + * PAGE 2 Register Definitions + */ +#define PS8818_REG_PAGE2 0x02 + +#define PS8818_REG2_TX_STATUS 0x42 +#define PS8818_REG2_RX_STATUS 0x46 +#define PS8818_STATUS_NORMAL_OPERATION BIT(7) +#define PS8818_STATUS_10_GBPS BIT(5) + +#define PS8818_REG2_LINK_BW_SET 0x60 +#define PS8818_LINK_BW_SET_1_62_GBPS 0x06 +#define PS8818_LINK_BW_SET_2_7_GBPS 0x0A +#define PS8818_LINK_BW_SET_5_4_GBPS 0x14 +#define PS8818_LINK_BW_SET_8_1_GBPS 0x1E +#define PS8818_LINK_BW_SET_MASK 0xFF -#define PS8818_REG_MODE 0x01 -#define PS8818_MODE_DP_ENABLE BIT(7) -#define PS8818_MODE_USB_ENABLE BIT(6) +#define PS8818_REG2_LANE_COUNT_SET 0x61 +#define PS8818_LANE_COUNT_SET_1_LANE 0x01 +#define PS8818_LANE_COUNT_SET_2_LANE 0x02 +#define PS8818_LANE_COUNT_SET_4_LANE 0x04 +#define PS8818_LANE_COUNT_SET_MASK 0x1F extern const struct usb_retimer_driver ps8818_usb_retimer; |