diff options
| -rw-r--r-- | chip/ish/ipc_heci.c | 21 | ||||
| -rw-r--r-- | chip/ish/registers.h | 12 |
2 files changed, 10 insertions, 23 deletions
diff --git a/chip/ish/ipc_heci.c b/chip/ish/ipc_heci.c index 85182b3617..1d6a59d95b 100644 --- a/chip/ish/ipc_heci.c +++ b/chip/ish/ipc_heci.c @@ -51,27 +51,6 @@ #define MNG_SYNC_FW_CLOCK 5 #define MNG_ILLEGAL_CMD 0xFF -/* Peripheral Interrupt Satus Register */ -#define IPC_PISR_HOST2ISH_BIT BIT(0) -#define IPC_PISR_PMC2ISH_BIT BIT(1) -#define IPC_PISR_CSME2ISH_BIT BIT(2) - -/* Peripheral Interrupt Mask Register */ -#define IPC_PIMR_HOST2ISH_BIT BIT(0) -#define IPC_PIMR_PMC2ISH_BIT BIT(1) -#define IPC_PIMR_CSME2ISH_BIT BIT(2) - -#define IPC_PIMR_ISH2HOST_CLR_BIT BIT(11) -#define IPC_PIMR_ISH2PMC_CLR_BIT BIT(12) -#define IPC_PIMR_ISH2CSME_CLR_BIT BIT(13) - -/* Peripheral Interrupt DB(DoorBell) Clear Status Register */ -#define IPC_DB_CLR_STS_ISH2HOST_BIT BIT(0) -#define IPC_DB_CLR_STS_ISH2ISP_BIT BIT(2) -#define IPC_DB_CLR_STS_ISH2AUDIO_BIT BIT(3) -#define IPC_DB_CLR_STS_ISH2PMC_BIT BIT(8) -#define IPC_DB_CLR_STS_ISH2CSME_BIT BIT(16) - /* Doorbell */ #define IPC_DB_MSG_LENGTH_FIELD 0x3FF #define IPC_DB_MSG_LENGTH_SHIFT 0 diff --git a/chip/ish/registers.h b/chip/ish/registers.h index f6e1a292fa..84c6e901fc 100644 --- a/chip/ish/registers.h +++ b/chip/ish/registers.h @@ -128,8 +128,13 @@ enum ish_i2c_port { /* IPC_Registers */ #define IPC_PISR (ISH_IPC_BASE + 0x0) +#define IPC_PISR_HOST2ISH_BIT BIT(0) + #define IPC_PIMR (ISH_IPC_BASE + 0x4) -#define IPC_PIMR_CSME_CSR_BIT (0x1 << 23) +#define IPC_PIMR_HOST2ISH_BIT BIT(0) +#define IPC_PIMR_ISH2HOST_CLR_BIT BIT(11) +#define IPC_PIMR_CSME_CSR_BIT BIT(23) + #define IPC_ISH2HOST_MSG_REGS (ISH_IPC_BASE + 0x60) #define IPC_ISH_FWSTS (ISH_IPC_BASE + 0x34) #define IPC_HOST2ISH_DOORBELL (ISH_IPC_BASE + 0x48) @@ -140,8 +145,11 @@ enum ish_i2c_port { #define IPC_ISH_RMP0 (ISH_IPC_BASE + 0x360) #define IPC_ISH_RMP1 (ISH_IPC_BASE + 0x364) #define IPC_ISH_RMP2 (ISH_IPC_BASE + 0x368) -#define DMA_ENABLED_MASK (0x1 << 0) +#define DMA_ENABLED_MASK BIT(0) + #define IPC_BUSY_CLEAR (ISH_IPC_BASE + 0x378) +#define IPC_DB_CLR_STS_ISH2HOST_BIT BIT(0) + #define IPC_UMA_RANGE_LOWER_0 REG32(ISH_IPC_BASE + 0x380) #define IPC_UMA_RANGE_LOWER_1 REG32(ISH_IPC_BASE + 0x384) #define IPC_UMA_RANGE_UPPER_0 REG32(ISH_IPC_BASE + 0x388) |