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-rw-r--r--chip/npcx/config_chip-npcx7.h15
-rw-r--r--chip/npcx/config_flash_layout.h2
-rw-r--r--chip/npcx/registers.h8
-rw-r--r--chip/npcx/system.c18
4 files changed, 29 insertions, 14 deletions
diff --git a/chip/npcx/config_chip-npcx7.h b/chip/npcx/config_chip-npcx7.h
index 7ca1e2257f..a932fa5836 100644
--- a/chip/npcx/config_chip-npcx7.h
+++ b/chip/npcx/config_chip-npcx7.h
@@ -20,13 +20,14 @@
/* The optional hardware features depend on chip variant */
#if defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6FB) || \
- defined(CHIP_VARIANT_NPCX7M7WB)
+ defined(CHIP_VARIANT_NPCX7M6FC) || defined(CHIP_VARIANT_NPCX7M7WB)
#define NPCX_INT_FLASH_SUPPORT /* Internal flash support */
#define NPCX_PSL_MODE_SUPPORT /* Power switch logic mode for ultra-low power */
#define NPCX_EXT32K_OSC_SUPPORT /* External 32KHz crytal osc. input support */
#endif
-#if defined(CHIP_VARIANT_NPCX7M6FB) || defined(CHIP_VARIANT_NPCX7M7WB)
+#if defined(CHIP_VARIANT_NPCX7M6FB) || defined(CHIP_VARIANT_NPCX7M6FC) || \
+ defined(CHIP_VARIANT_NPCX7M7WB)
#define NPCX_UART_FIFO_SUPPORT
/* Number of UART modules. */
#define NPCX_SECOND_UART
@@ -60,14 +61,14 @@
/* Memory mapping */
#define NPCX_BTRAM_SIZE 0x800 /* 2KB data ram used by booter. */
#define CONFIG_RAM_BASE 0x200C0000 /* memory address of data ram */
-/* 63KB data RAM */
+/* 62 KB data RAM + 2 KB BT RAM size */
#define CONFIG_DATA_RAM_SIZE 0x00010000
#define CONFIG_RAM_SIZE (CONFIG_DATA_RAM_SIZE - NPCX_BTRAM_SIZE)
/* no low power ram in npcx7 series */
/* Use chip variant to specify the size and start address of program memory */
#if defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6FB) || \
- defined(CHIP_VARIANT_NPCX7M6G)
+ defined(CHIP_VARIANT_NPCX7M6FC) || defined(CHIP_VARIANT_NPCX7M6G)
/* 192KB RAM for FW code */
#define NPCX_PROGRAM_MEMORY_SIZE (192 * 1024)
/* program memory base address for 192KB Code RAM (ie. 0x100C0000 - 192KB) */
@@ -84,15 +85,15 @@
/* Total RAM size checking for npcx ec */
#define NPCX_RAM_SIZE (CONFIG_DATA_RAM_SIZE + NPCX_PROGRAM_MEMORY_SIZE)
#if defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6FB) || \
- defined(CHIP_VARIANT_NPCX7M6G)
-/* 256KB RAM in NPCX7M6F/NPCX7M6G/NPCX7M6FB */
+ defined(CHIP_VARIANT_NPCX7M6FC) || defined(CHIP_VARIANT_NPCX7M6G)
+/* 256KB RAM in NPCX7M6F/NPCX7M6FB/NPCX7M6FC/NPCX7M6G */
#if (NPCX_RAM_SIZE != 0x40000)
#error "Wrong memory mapping layout for NPCX7M6F"
#endif
#elif defined(CHIP_VARIANT_NPCX7M7WB)
/* 384KB RAM in NPCX7M7WB */
#if (NPCX_RAM_SIZE != 0x60000)
-#error "Wrong memory mapping layout for NPCX7M6F"
+#error "Wrong memory mapping layout for NPCX7M7W"
#endif
#endif
diff --git a/chip/npcx/config_flash_layout.h b/chip/npcx/config_flash_layout.h
index 8413453167..86891cd26d 100644
--- a/chip/npcx/config_flash_layout.h
+++ b/chip/npcx/config_flash_layout.h
@@ -31,7 +31,7 @@
#define CONFIG_EC_WRITABLE_STORAGE_OFF 0x40000
#define CONFIG_EC_WRITABLE_STORAGE_SIZE 0x40000
#elif defined(CHIP_VARIANT_NPCX7M6F) || defined(CHIP_VARIANT_NPCX7M6FB) || \
- defined(CHIP_VARIANT_NPCX7M6G)
+ defined(CHIP_VARIANT_NPCX7M6FC) || defined(CHIP_VARIANT_NPCX7M6G)
#define CONFIG_EC_PROTECTED_STORAGE_OFF 0
#define CONFIG_EC_PROTECTED_STORAGE_SIZE 0x40000
#define CONFIG_EC_WRITABLE_STORAGE_OFF 0x40000
diff --git a/chip/npcx/registers.h b/chip/npcx/registers.h
index 3d78bf1542..7c2b076912 100644
--- a/chip/npcx/registers.h
+++ b/chip/npcx/registers.h
@@ -952,9 +952,12 @@ enum {
#define NPCX_PWDWN_CTL7_SMB5_PD 0
#define NPCX_PWDWN_CTL7_SMB6_PD 1
#define NPCX_PWDWN_CTL7_SMB7_PD 2
-#if defined(CHIP_VARIANT_NPCX7M6FB) || defined(CHIP_VARIANT_NPCX7M7WB)
+#if defined(CHIP_VARIANT_NPCX7M6FB) || defined(CHIP_VARIANT_NPCX7M6FC) || \
+ defined(CHIP_VARIANT_NPCX7M7WB)
#define NPCX_PWDWN_CTL7_ITIM64_PD 5
#define NPCX_PWDWN_CTL7_UART2_PD 6
+#endif
+#ifdef CHIP_VARIANT_NPCX7M7WB
#define NPCX_PWDWN_CTL7_WOV_PD 7
#endif
#endif
@@ -1233,7 +1236,8 @@ enum PM_CHANNEL_T {
/* BBRAM register fields */
#define NPCX_BKUP_STS_IBBR 7
-#if defined(CHIP_VARIANT_NPCX7M6FB) || defined(CHIP_VARIANT_NPCX7M7WB)
+#if defined(CHIP_VARIANT_NPCX7M6FB) || defined(CHIP_VARIANT_NPCX7M6FC) || \
+ defined(CHIP_VARIANT_NPCX7M7WB)
#define NPCX_BKUP_STS_VSBY_STS 1
#define NPCX_BKUP_STS_VCC1_STS 0
#define NPCX_BKUP_STS_ALL_MASK \
diff --git a/chip/npcx/system.c b/chip/npcx/system.c
index edfbcf455b..edb9e2335e 100644
--- a/chip/npcx/system.c
+++ b/chip/npcx/system.c
@@ -99,8 +99,10 @@ void system_check_bbram_on_reset(void)
CPRINTF("VBAT drop!\n");
/*
- * npcx5/npcx7m6g/npcx7m6f - Clear IBBR bit
- * npcx7m6fb/npcx7m7wb - Clear IBBR/VSBY_STS/VCC1_STS bit
+ * npcx5/npcx7m6g/npcx7m6f:
+ * Clear IBBR bit
+ * npcx7m6fb/npcx7m6fc/npcx7m7wb:
+ * Clear IBBR/VSBY_STS/VCC1_STS bit
*/
NPCX_BKUP_STS = NPCX_BKUP_STS_ALL_MASK;
}
@@ -699,7 +701,8 @@ void system_pre_init(void)
NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_6) = pwdwn6;
#if defined(CHIP_FAMILY_NPCX7)
-#if defined(CHIP_VARIANT_NPCX7M6FB) || defined(CHIP_VARIANT_NPCX7M7WB)
+#if defined(CHIP_VARIANT_NPCX7M6FB) || defined(CHIP_VARIANT_NPCX7M6FC) || \
+ defined(CHIP_VARIANT_NPCX7M7WB)
NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_7) = 0xE7;
#else
NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_7) = 0x07;
@@ -811,6 +814,7 @@ const char *system_get_chip_name(void)
case 0x1F:
return "NPCX787G";
case 0x21:
+ case 0x29:
return "NPCX796F";
case 0x24:
return "NPCX797W";
@@ -831,6 +835,9 @@ const char *system_get_chip_revision(void)
uint8_t chip_gen = NPCX_SRID_CR;
/* Read ROM data for chip revision directly */
uint8_t rev_num = *((uint8_t *)CHIP_REV_ADDR);
+#ifdef CHIP_FAMILY_NPCX7
+ uint8_t chip_id = NPCX_DEVICE_ID_CR;
+#endif
switch (chip_gen) {
#if defined(CHIP_FAMILY_NPCX5)
@@ -842,7 +849,10 @@ const char *system_get_chip_revision(void)
*p++ = 'A';
break;
case 0x07:
- *p++ = 'B';
+ if (chip_id == 0x21 || chip_id == 0x24)
+ *p++ = 'B';
+ else
+ *p++ = 'C';
break;
#endif
default: