diff options
| -rw-r--r-- | chip/stm32/clock-stm32f100.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/chip/stm32/clock-stm32f100.c b/chip/stm32/clock-stm32f100.c index 803695b227..bbe4a63e33 100644 --- a/chip/stm32/clock-stm32f100.c +++ b/chip/stm32/clock-stm32f100.c @@ -35,14 +35,14 @@ int clock_init(void) * no MCO => PLLCLK = 16 Mhz */ BUILD_ASSERT(CPU_CLOCK == 16000000); - STM32_RCC_CFGR = 0x00880001; + STM32_RCC_CFGR = 0x00080000; /* Enable the PLL */ STM32_RCC_CR |= 1 << 24; /* Wait for the PLL to lock */ while (!(STM32_RCC_CR & (1 << 25))) ; /* switch to SYSCLK to the PLL */ - STM32_RCC_CFGR = 0x00880002; + STM32_RCC_CFGR = 0x00080002; /* wait until the PLL is the clock source */ while ((STM32_RCC_CFGR & 0xc) != 0x8) ; |