zephyr: adlrvp: Add support to get Board ID

Add support to get Board ID for ADL RVP

BUG=b:218684235
BRANCH=none
TEST=zmake configure -B ~/tmp/adlrvp_npcx/ adlrvp_npcx -b
         EC Boot up logs: BID:0x13, FID:0x1, BOM:0x4

Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com>
Change-Id: I181e8c6eb5235547b36adf76519b3155affac572
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3462922
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>

9 files changed, 196 insertions, 1 deletions

diff --git a/zephyr/dts/bindings/intel/intel,rvp-board-id.yaml b/zephyr/dts/bindings/intel/intel,rvp-board-id.yaml
new file mode 100644
index 0000000000..6ef25aa6bd
--- /dev/null
+++ b/zephyr/dts/bindings/intel/intel,rvp-board-id.yaml
@@ -0,0 +1,26 @@
+# Copyright 2022 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+description: Intel RVP Board id
+
+compatible: "intel,rvp-board-id"
+
+properties:
+    bom-gpios:
+      type: phandle-array
+      required: true
+      description: |
+       A list contains GPIO pins corresponding to BOM ID bits.
+
+    fab-gpios:
+      type: phandle-array
+      required: true
+      description: |
+       A list contains GPIO pins corresponding to FAB ID bits.
+
+    board-gpios:
+      type: phandle-array
+      required: true
+      description: |
+       A list contains GPIO pins corresponding to BOARD ID bits.
diff --git a/zephyr/projects/intelrvp/CMakeLists.txt b/zephyr/projects/intelrvp/CMakeLists.txt
index 5995dd8791..bbd39a4df7 100644
--- a/zephyr/projects/intelrvp/CMakeLists.txt
+++ b/zephyr/projects/intelrvp/CMakeLists.txt
@@ -7,7 +7,8 @@ cmake_minimum_required(VERSION 3.13.1)
 find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
 project(intelrvp)
 
-zephyr_include_directories(include)
+cros_ec_library_include_directories(include)
+zephyr_library_sources("src/intel_rvp_board_id.c")
 
 if(DEFINED CONFIG_BOARD_ADLRVP_NPCX)
   add_subdirectory(adlrvp)
diff --git a/zephyr/projects/intelrvp/adlrvp/CMakeLists.txt b/zephyr/projects/intelrvp/adlrvp/CMakeLists.txt
index 65e4b97762..bd961ff89d 100644
--- a/zephyr/projects/intelrvp/adlrvp/CMakeLists.txt
+++ b/zephyr/projects/intelrvp/adlrvp/CMakeLists.txt
@@ -2,4 +2,5 @@
 # Use of this source code is governed by a BSD-style license that can be
 # found in the LICENSE file.
 
+cros_ec_library_include_directories("include")
 zephyr_library_sources("src/adlrvp.c")
diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/adlrvp_npcx.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/adlrvp_npcx.dts
index 8b4ad4476e..038a269e13 100644
--- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/adlrvp_npcx.dts
+++ b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/adlrvp_npcx.dts
@@ -52,6 +52,36 @@
 &i2c7_0 {
 	status = "okay";
 	clock-frequency = <I2C_BITRATE_STANDARD>;
+
+	pca95xx: pca95xx@22 {
+		compatible = "nxp,pca95xx";
+		label = "PCA95XX";
+		reg = <0x22>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		ngpios = <16>;
+	};
+
+	rvp_board_id: rvp-board-id {
+		compatible = "intel,rvp-board-id";
+
+		/*
+		 * BOM ID [2]   : IOEX[0]
+		 * BOM ID [1:0] : IOEX[15:14]
+		 */
+		bom-gpios = <&pca95xx 0 0>, <&pca95xx 15 0>, <&pca95xx 14 0>;
+
+		/*
+		 * FAB ID [1:0] : IOEX[2:1]
+		 */
+		fab-gpios = <&pca95xx 2 0>, <&pca95xx 1 0>;
+
+		/*
+		 * BOARD ID[5:0] : IOEX[13:8]
+		 */
+		board-gpios = <&pca95xx 13 0>, <&pca95xx 12 0>, <&pca95xx 11 0>,
+			      <&pca95xx 10 0>, <&pca95xx 9 0>, <&pca95xx 8 0>;
+	};
 };
 
 &i2c_ctrl7 {
diff --git a/zephyr/projects/intelrvp/adlrvp/prj.conf b/zephyr/projects/intelrvp/adlrvp/prj.conf
index b09d8bd33a..3ffa1370b2 100644
--- a/zephyr/projects/intelrvp/adlrvp/prj.conf
+++ b/zephyr/projects/intelrvp/adlrvp/prj.conf
@@ -14,3 +14,4 @@ CONFIG_PLATFORM_EC_BATTERY_TYPE_NO_AUTO_DETECT=y
 # IOEX
 CONFIG_PLATFORM_EC_IOEX=y
 CONFIG_PLATFORM_EC_IOEX_PCA9675=y
+CONFIG_GPIO_PCA95XX=y
diff --git a/zephyr/projects/intelrvp/adlrvp/src/adlrvp.c b/zephyr/projects/intelrvp/adlrvp/src/adlrvp.c
index fd0ab451cf..eaf48c1548 100644
--- a/zephyr/projects/intelrvp/adlrvp/src/adlrvp.c
+++ b/zephyr/projects/intelrvp/adlrvp/src/adlrvp.c
@@ -6,6 +6,13 @@
 /* TODO: b/218904113: Convert to using Zephyr GPIOs */
 #include "gpio_signal.h"
 #include "power/icelake.h"
+#include "common.h"
+#include "console.h"
+#include "intelrvp.h"
+#include "intel_rvp_board_id.h"
+
+#define CPRINTF(format, args...) cprintf(CC_COMMAND, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_COMMAND, format, ## args)
 
 /******************************************************************************/
 /* PWROK signal configuration */
@@ -27,3 +34,71 @@ const struct intel_x86_pwrok_signal pwrok_signal_deassert_list[] = {
 	},
 };
 const int pwrok_signal_deassert_count = ARRAY_SIZE(pwrok_signal_deassert_list);
+
+/*
+ * Returns board information (board id[7:0] and Fab id[15:8]) on success
+ * -1 on error.
+ */
+__override int board_get_version(void)
+{
+	/* Cache the board ID */
+	static int adlrvp_board_id;
+
+	int i;
+	int rv = EC_ERROR_UNKNOWN;
+
+	int fab_id, board_id, bom_id;
+
+	/* Board ID is already read */
+	if (adlrvp_board_id)
+		return adlrvp_board_id;
+
+	/*
+	 * IOExpander that has Board ID information is on DSW-VAL rail on
+	 * ADL RVP. On cold boot cycles, DSW-VAL rail is taking time to settle.
+	 * This loop retries to ensure rail is settled and read is successful
+	 */
+	for (i = 0; i < RVP_VERSION_READ_RETRY_CNT; i++) {
+
+		rv  = gpio_pin_get_dt(&bom_id_config[0]);
+
+		if (rv >= 0)
+			break;
+
+		k_msleep(1);
+	}
+
+	/* retrun -1 if failed to read board id */
+	if (rv < 0)
+		return -1;
+
+	/*
+	 * BOM ID [2]   : IOEX[0]
+	 * BOM ID [1:0] : IOEX[15:14]
+	 */
+	bom_id  = gpio_pin_get_dt(&bom_id_config[0]) << 2;
+	bom_id |= gpio_pin_get_dt(&bom_id_config[1]) << 1;
+	bom_id |= gpio_pin_get_dt(&bom_id_config[2]);
+
+	/*
+	 * FAB ID [1:0] : IOEX[2:1] + 1
+	 */
+	fab_id  = gpio_pin_get_dt(&fab_id_config[0]) << 1;
+	fab_id |= gpio_pin_get_dt(&fab_id_config[1]);
+	fab_id += 1;
+
+	/*
+	 * BOARD ID[5:0] : IOEX[13:8]
+	 */
+	board_id  = gpio_pin_get_dt(&board_id_config[0]) << 5;
+	board_id |= gpio_pin_get_dt(&board_id_config[1]) << 4;
+	board_id |= gpio_pin_get_dt(&board_id_config[2]) << 3;
+	board_id |= gpio_pin_get_dt(&board_id_config[3]) << 2;
+	board_id |= gpio_pin_get_dt(&board_id_config[4]) << 1;
+	board_id |= gpio_pin_get_dt(&board_id_config[5]);
+
+	CPRINTF("BID:0x%x, FID:0x%x, BOM:0x%x", board_id, fab_id, bom_id);
+
+	adlrvp_board_id = board_id | (fab_id << 8);
+	return adlrvp_board_id;
+}
diff --git a/zephyr/projects/intelrvp/include/intel_rvp_board_id.h b/zephyr/projects/intelrvp/include/intel_rvp_board_id.h
new file mode 100644
index 0000000000..77ac4f9054
--- /dev/null
+++ b/zephyr/projects/intelrvp/include/intel_rvp_board_id.h
@@ -0,0 +1,17 @@
+/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef __INTEL_RVP_BOARD_ID_H
+#define __INTEL_RVP_BOARD_ID_H
+
+#include <drivers/gpio.h>
+
+extern const struct gpio_dt_spec bom_id_config[];
+
+extern const struct gpio_dt_spec fab_id_config[];
+
+extern const struct gpio_dt_spec board_id_config[];
+
+#endif /* __INTEL_RVP_BOARD_ID_H */
diff --git a/zephyr/projects/intelrvp/include/intelrvp.h b/zephyr/projects/intelrvp/include/intelrvp.h
new file mode 100644
index 0000000000..c0e7e411a1
--- /dev/null
+++ b/zephyr/projects/intelrvp/include/intelrvp.h
@@ -0,0 +1,11 @@
+/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+#ifndef __INTELRVP_BOARD_H
+#define __INTELRVP_BOARD_H
+
+/* RVP ID read retry count */
+#define RVP_VERSION_READ_RETRY_CNT	2
+
+#endif /* __INTELRVP_BOARD_H */
diff --git a/zephyr/projects/intelrvp/src/intel_rvp_board_id.c b/zephyr/projects/intelrvp/src/intel_rvp_board_id.c
new file mode 100644
index 0000000000..15517953d2
--- /dev/null
+++ b/zephyr/projects/intelrvp/src/intel_rvp_board_id.c
@@ -0,0 +1,33 @@
+/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include <devicetree.h>
+#include "intel_rvp_board_id.h"
+
+#define DT_DRV_COMPAT intel_rvp_board_id
+
+BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) <= 1,
+	"Unsupported RVP Board ID instance");
+
+#define RVP_ID_GPIO_DT_SPEC_GET(idx, node_id, prop) \
+	GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, idx),
+
+#define RVP_ID_CONFIG_LIST(node_id, prop)           \
+	LISTIFY(DT_PROP_LEN(node_id, prop),         \
+	RVP_ID_GPIO_DT_SPEC_GET, (), node_id, prop)
+
+#if DT_HAS_COMPAT_STATUS_OKAY(DT_DRV_COMPAT)
+const struct gpio_dt_spec bom_id_config[] = {
+	RVP_ID_CONFIG_LIST(DT_DRV_INST(0), bom_gpios)
+};
+
+const struct gpio_dt_spec fab_id_config[] = {
+	RVP_ID_CONFIG_LIST(DT_DRV_INST(0), fab_gpios)
+};
+
+const struct gpio_dt_spec board_id_config[] = {
+	RVP_ID_CONFIG_LIST(DT_DRV_INST(0), board_gpios)
+};
+#endif /* #if DT_HAS_COMPAT_STATUS_OKAY */