diff options
| author | YH Lin <yueherngl@google.com> | 2023-05-11 20:47:00 +0000 |
|---|---|---|
| committer | YH Lin <yueherngl@google.com> | 2023-05-11 20:47:00 +0000 |
| commit | 8641442366bd7c2c133e302a57f904dfac3c896b (patch) | |
| tree | d0dca100ca02a89210decc54b7124d26bb75ef6a /zephyr/program/corsola/src/npcx_usbc.c | |
| parent | e79a9dab1721c3d7da1475f3f802c4ea871a48ec (diff) | |
| parent | 5df400b0377c9e1b5bb6cfc53ba7dfedde91f944 (diff) | |
| download | chrome-ec-8641442366bd7c2c133e302a57f904dfac3c896b.tar.gz | |
Merge remote-tracking branch cros/main into firmware-brya-14505.B-main
Generated by: util/update_release_branch.py --baseboard brya --relevant_paths_file
baseboard/brya/relevant-paths.txt firmware-brya-14505.B-main
Relevant changes:
git log --oneline e79a9dab17..5df400b037 -- baseboard/brya board/agah
board/anahera board/banshee board/brya board/crota board/felwinter
board/gimble board/hades board/kano board/marasov board/mithrax
board/omnigul board/osiris board/primus board/redrix board/taeko
board/taniks board/vell board/volmar driver/bc12/pi3usb9201_public.*
driver/charger/bq25710.* driver/ppc/nx20p348x.*
driver/ppc/syv682x_public.* driver/retimer/bb_retimer_public.*
driver/tcpm/nct38xx.* driver/tcpm/ps8xxx_public.* driver/tcpm/tcpci.*
include/power/alderlake* include/intel_x86.h power/alderlake*
power/intel_x86.c util/getversion.sh
76d2b9b1e4 battery: Deprecate CONFIG_BATTERY_LEVEL_NEAR_FULL
3d5b996f73 Hades: Fast forward DSW_PWROK to PCH_PWROK
56af450c1a Agah: Fast forward DSW_PWROK to PCH_PWROK
b729eab7c7 charger: Move charger_state_v2.h into charge_state.h
47acf64182 charger: Rename charge_get_state() to led_pwr_get_state()
632c7c935a power/x86: Add dedicated interrupt handler for pwrok
0fff3a0bd4 omnigul: Add condition use Accel and Gyro by FWCONFIG.
7540daff3f driver/tcpm/nct38xx: Remove write to RO register
3f279f30d4 GPU: Rename DC_ATLEAST_SOC to DC_ATMOST_SOC
BRANCH=None
BUG=b:218332694 b:216485035 b:280818345 b:280351196 b:280001153
BUG=b:279918234
TEST=`emerge-[brya,hades,draco] chromeos-ec`
Force-Relevant-Builds: all
Change-Id: I19f2f6c5573d8c748ac63b488a808f10de352b1d
Signed-off-by: YH Lin <yueherngl@google.com>
Diffstat (limited to 'zephyr/program/corsola/src/npcx_usbc.c')
| -rw-r--r-- | zephyr/program/corsola/src/npcx_usbc.c | 30 |
1 files changed, 23 insertions, 7 deletions
diff --git a/zephyr/program/corsola/src/npcx_usbc.c b/zephyr/program/corsola/src/npcx_usbc.c index 10a977696e..2e1d8d11c5 100644 --- a/zephyr/program/corsola/src/npcx_usbc.c +++ b/zephyr/program/corsola/src/npcx_usbc.c @@ -11,6 +11,7 @@ #endif #include "baseboard_usbc_config.h" +#include "battery.h" #include "console.h" #include "driver/ppc/nx20p348x.h" #include "driver/tcpm/anx7447.h" @@ -53,8 +54,10 @@ DECLARE_HOOK(HOOK_INIT, board_usb_mux_init, HOOK_PRIO_INIT_I2C + 1); void board_tcpc_init(void) { - /* Only reset TCPC if not sysjump */ - if (!system_jumped_late()) { + /* Reset TCPC if we only we have a battery connected, or the SINK + * gpio to the PPC might be reset and cause brown-out. + */ + if (!system_jumped_late() && battery_is_present() == BP_YES) { /* TODO(crosbug.com/p/61098): How long do we need to wait? */ board_reset_pd_mcu(); } @@ -84,7 +87,13 @@ __override int board_rt1718s_init(int port) { static bool gpio_initialized; - if (!system_jumped_late() && !gpio_initialized) { + /* Reset TCPC sink/source control when it's a power-on reset or has a + * battery. Do not alter the carried GPIO status or this might stop PPC + * sinking and brown-out the system when battery disconnected. + */ + if (!system_jumped_late() && !gpio_initialized && + (battery_is_present() == BP_YES || + (system_get_reset_flags() & EC_RESET_FLAG_POWER_ON))) { /* set GPIO 1~3 as push pull, as output, output low. */ rt1718s_gpio_set_flags(port, RT1718S_GPIO1, GPIO_OUT_LOW); rt1718s_gpio_set_flags(port, RT1718S_GPIO2, GPIO_OUT_LOW); @@ -94,11 +103,18 @@ __override int board_rt1718s_init(int port) /* gpio1 low, gpio2 output high when receiving frs signal */ RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO1_VBUS_CTRL, - RT1718S_GPIO1_VBUS_CTRL_FRS_RX_VBUS, + RT1718S_GPIO_VBUS_CTRL_FRS_RX_VBUS, 0)); - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO2_VBUS_CTRL, - RT1718S_GPIO2_VBUS_CTRL_FRS_RX_VBUS, - 0xFF)); + /* GPIO1 EN_SNK high when received TCPCI SNK enabled command */ + RETURN_ERROR(rt1718s_update_bits8( + port, RT1718S_GPIO1_VBUS_CTRL, + RT1718S_GPIO_VBUS_CTRL_ENA_SNK_VBUS_GPIO, 0xFF)); + /* GPIO2 EN_SRC high when received TCPCI SRC enabled command */ + RETURN_ERROR(rt1718s_update_bits8( + port, RT1718S_GPIO2_VBUS_CTRL, + RT1718S_GPIO_VBUS_CTRL_FRS_RX_VBUS | + RT1718S_GPIO_VBUS_CTRL_ENA_SRC_VBUS_GPIO, + 0xFF)); /* Trigger GPIO 1/2 change when FRS signal received */ RETURN_ERROR(rt1718s_update_bits8( |