zephyr: npcx_evb: Add pinctrl driver support

In order to support 'Road from pinmux to pinctrl' on zephyr community.
Nuvoton has summbited the PR for npcx ec pin-muxing and pad's property
configuration via pinctrl driver. Hence, this CL collects the necessary
changes for npcx7/9 evb.

BUG=b:232543902
BRANCH=none
TEST=zmake build npcx7 --clobber, zmake build npcx9 --clobber
     Passed basic verification for peripheral devices on npcx evb.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Change-Id: I2a3da73e060a4d492e7aec8eecd374ea521f02ae
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3647371
Tested-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Sam Hurst <shurst@google.com>
Commit-Queue: Keith Short <keithshort@chromium.org>

5 files changed, 35 insertions, 2 deletions

diff --git a/zephyr/boards/arm/npcx_evb/npcx7_evb.dts b/zephyr/boards/arm/npcx_evb/npcx7_evb.dts
index c20589d637..1780495feb 100644
--- a/zephyr/boards/arm/npcx_evb/npcx7_evb.dts
+++ b/zephyr/boards/arm/npcx_evb/npcx7_evb.dts
@@ -6,6 +6,7 @@
 /dts-v1/;
 
 #include <cros/nuvoton/npcx7.dtsi>
+#include <nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi>
 
 /*
  * #include <nuvoton/npcx7m6fb.dtsi>
@@ -18,5 +19,6 @@
 &uart1 {
 	status = "okay";
 	current-speed = <115200>;
-	pinctrl-0 = <&altc_uart1_sl2>; /* Use UART1_SL2 ie. PIN64.65 */
+	pinctrl-0 = <&uart1_2_sin_sout_gp64_65>;
+	pinctrl-names = "default";
 };
diff --git a/zephyr/boards/arm/npcx_evb/npcx7_evb_defconfig b/zephyr/boards/arm/npcx_evb/npcx7_evb_defconfig
index 5f79c4ce8a..169108f18b 100644
--- a/zephyr/boards/arm/npcx_evb/npcx7_evb_defconfig
+++ b/zephyr/boards/arm/npcx_evb/npcx7_evb_defconfig
@@ -24,6 +24,9 @@ CONFIG_UART_CONSOLE=y
 # Pinmux Driver
 CONFIG_PINMUX=y
 
+# Pinctrl Driver
+CONFIG_PINCTRL=y
+
 # GPIO Controller
 CONFIG_GPIO=y
 
diff --git a/zephyr/boards/arm/npcx_evb/npcx9_evb.dts b/zephyr/boards/arm/npcx_evb/npcx9_evb.dts
index e47a6ba1ce..6669575466 100644
--- a/zephyr/boards/arm/npcx_evb/npcx9_evb.dts
+++ b/zephyr/boards/arm/npcx_evb/npcx9_evb.dts
@@ -6,6 +6,7 @@
 /dts-v1/;
 
 #include <cros/nuvoton/npcx9.dtsi>
+#include <nuvoton/npcx/npcx9/npcx9-pinctrl.dtsi>
 
 /*
  * #include <nuvoton/npcx9m3f.dtsi>
@@ -18,5 +19,7 @@
 &uart1 {
 	status = "okay";
 	current-speed = <115200>;
-	pinctrl-0 = <&altj_cr_sin1_sl2 &altj_cr_sout1_sl2>;
+	pinctrl-0 = <&uart1_2_sin_gp64
+		     &uart1_2_sout_gp65>;
+	pinctrl-names = "default";
 };
diff --git a/zephyr/boards/arm/npcx_evb/npcx9_evb_defconfig b/zephyr/boards/arm/npcx_evb/npcx9_evb_defconfig
index d4473b0f64..e64abd9e73 100644
--- a/zephyr/boards/arm/npcx_evb/npcx9_evb_defconfig
+++ b/zephyr/boards/arm/npcx_evb/npcx9_evb_defconfig
@@ -24,6 +24,9 @@ CONFIG_UART_CONSOLE=y
 # Pinmux Driver
 CONFIG_PINMUX=y
 
+# Pinctrl Driver
+CONFIG_PINCTRL=y
+
 # GPIO Controller
 CONFIG_GPIO=y
 
diff --git a/zephyr/boards/arm/npcx_evb/npcx_evb.dtsi b/zephyr/boards/arm/npcx_evb/npcx_evb.dtsi
index b49be6222c..f1fb277302 100644
--- a/zephyr/boards/arm/npcx_evb/npcx_evb.dtsi
+++ b/zephyr/boards/arm/npcx_evb/npcx_evb.dtsi
@@ -76,6 +76,8 @@
 &i2c0_0 {
 	status = "okay";
 	clock-frequency = <I2C_BITRATE_STANDARD>;
+	pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>;
+	pinctrl-names = "default";
 };
 
 &i2c_ctrl0 {
@@ -85,6 +87,8 @@
 &i2c1_0 {
 	status = "okay";
 	clock-frequency = <I2C_BITRATE_STANDARD>;
+	pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>;
+	pinctrl-names = "default";
 };
 
 &i2c_ctrl1 {
@@ -94,6 +98,8 @@
 &i2c2_0 {
 	status = "okay";
 	clock-frequency = <I2C_BITRATE_STANDARD>;
+	pinctrl-0 = <&i2c2_0_sda_scl_gp91_92>;
+	pinctrl-names = "default";
 };
 
 &i2c_ctrl2 {
@@ -103,6 +109,8 @@
 &i2c3_0 {
 	status = "okay";
 	clock-frequency = <I2C_BITRATE_STANDARD>;
+	pinctrl-0 = <&i2c3_0_sda_scl_gpd0_d1>;
+	pinctrl-names = "default";
 };
 
 &i2c_ctrl3 {
@@ -112,6 +120,8 @@
 &i2c7_0 {
 	status = "okay";
 	clock-frequency = <I2C_BITRATE_STANDARD>;
+	pinctrl-0 = <&i2c7_0_sda_scl_gpb2_b3>;
+	pinctrl-names = "default";
 };
 
 &i2c_ctrl7 {
@@ -120,6 +130,18 @@
 
 &adc0 {
 	status = "okay";
+	pinctrl-0 = <&adc0_chan0_gp45
+		     &adc0_chan1_gp44
+		     &adc0_chan2_gp43
+		     &adc0_chan3_gp42
+		     &adc0_chan4_gp41>;
+	pinctrl-names = "default";
+};
+
+&espi0 {
+	status = "okay";
+	pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>;
+	pinctrl-names = "default";
 };
 
 &cros_kb_raw {