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| author | Jack Rosenthal <jrosenth@chromium.org> | 2021-09-17 16:02:42 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-09-17 23:51:26 +0000 |
| commit | ef1a31ced60aba0e1b54c8ae2c28e6c3fdd6f4c1 (patch) | |
| tree | 51e9026515fcffd4c9fee4030df2f90c078ff180 /zephyr/Kconfig.powerseq | |
| parent | bcf687bce6f31a10e60e831c3f5133a3e5332401 (diff) | |
| download | chrome-ec-ef1a31ced60aba0e1b54c8ae2c28e6c3fdd6f4c1.tar.gz | |
zephyr: guybrush: Bringup power sequencing
Bringup power sequencing for AMD and enable for guybrush.
Note that at the moment we had to copy-paste the power signals and
related funcitons, the code was a bit too far from shimming without
extensive editing. We can try and merge together later.
BUG=b:195137794
BRANCH=none
TEST=power sequence to S0, nothing useful on ap console (yet!)
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I9a577e24d80fe0ff992af4b847e14695b82f871d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3169568
Reviewed-by: Diana Z <dzigterman@chromium.org>
Diffstat (limited to 'zephyr/Kconfig.powerseq')
| -rw-r--r-- | zephyr/Kconfig.powerseq | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/zephyr/Kconfig.powerseq b/zephyr/Kconfig.powerseq index 89a2d5729e..0045a69ad8 100644 --- a/zephyr/Kconfig.powerseq +++ b/zephyr/Kconfig.powerseq @@ -44,11 +44,31 @@ config PLATFORM_EC_HOSTCMD_AP_RESET config PLATFORM_EC_POWERSEQ_PP5000_CONTROL bool "Enable a task-safe way to control the PP5000 rail" + depends on !AP_X86_AMD default y help Guard access to the PP5000 GPIO using mutex locks, allowing the rail to be changed in a task-safe manner. +menuconfig PLATFORM_EC_POWERSEQ_AMD + bool "AMD power sequencing" + depends on AP_X86_AMD + select HAS_TASK_POWERBTN + default y + help + Enable AMD power sequencing code. + +if PLATFORM_EC_POWERSEQ_AMD + +config PLATFORM_EC_POWER_BUTTON_TO_PCH_CUSTOM + bool "Custom board_pwrbtn_to_pch" + help + The board support code provides a custom function, + board_pwrbtn_to_pch, that replaces the standard GPIO set + level to the SoC. + +endif # PLATFORM_EC_POWERSEQ_AMD + menuconfig PLATFORM_EC_POWERSEQ_INTEL bool "Enable shimming common Intel power sequencing code" depends on AP_X86_INTEL |