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| author | Wai-Hong Tam <waihong@google.com> | 2018-04-17 09:57:11 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-04-17 23:34:41 -0700 |
| commit | b21f335c40568060cbd0b671d138f0ff69a47a05 (patch) | |
| tree | d683334e697d40c367cfbf8fe4583a676399fdef /util/uut/opr.c | |
| parent | 8f1657aa394096f3d3cb3204cf19b739e64d1598 (diff) | |
| download | chrome-ec-b21f335c40568060cbd0b671d138f0ff69a47a05.tar.gz | |
cheza: Lower the I2C speeds on TCPC buses to 400kHz
The initial I2C operating speed of the port-0 TCPC chip is 400kHz.
It requires changing a register addr:0x48 to a value 0x03 to increase
its speed to 1MHz.
The BC1.2 chips on port-0 and port-1 also operate at 400kHz, according
to the datasheet.
So lower the I2C speeds on two TCPC buses to 400kHz.
BRANCH=none
BUG=b:78142256
TEST=Use console to enable TPCP power and check I2C communication:
> gpioset EN_USB_C0_TCPC_PWR 1
> gpioset USB_C0_PD_RST_R_L 1
> i2cscan 1
Scanning 1 tcpc0......................................
0x4a...
0x50........................
0x80...............................................................
> i2cxfer r 1 0x50 0x00
0xaa [170]
Change-Id: I665136d738de50db8beeed338e3102fb5ca6fc84
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1015763
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Diffstat (limited to 'util/uut/opr.c')
0 files changed, 0 insertions, 0 deletions