tigerlake/icelake: add support for SYS_PWROK

Add code to pass through PG_EC_ALL_SYS_PWRGD from the platform to the
PCH signal PCH_SYS_PWROK.

These signals correspond to the Intel signal names ALL_SYS_PWRGD and
PCH_SYS_PWROK, respectively.

BUG=b:143373337
BRANCH=none
TEST=make buildall -j

Change-Id: Iff86508450a5bca8c97fb855fa1a3a586edd99ff
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1881753
Commit-Queue: Sean Abraham <seanabraham@chromium.org>

2 files changed, 53 insertions, 18 deletions

diff --git a/power/icelake.c b/power/icelake.c
index 175a4269b3..66c7105ca6 100644
--- a/power/icelake.c
+++ b/power/icelake.c
@@ -25,34 +25,40 @@ static int forcing_shutdown;  /* Forced shutdown in progress? */
 /* Power signals list. Must match order of enum power_signal. */
 const struct power_signal_info power_signal_list[] = {
 	[X86_SLP_S0_DEASSERTED] = {
-		GPIO_PCH_SLP_S0_L,
-		POWER_SIGNAL_ACTIVE_HIGH | POWER_SIGNAL_DISABLE_AT_BOOT,
-		"SLP_S0_DEASSERTED",
+		.gpio = GPIO_PCH_SLP_S0_L,
+		.flags = POWER_SIGNAL_ACTIVE_HIGH |
+			POWER_SIGNAL_DISABLE_AT_BOOT,
+		.name = "SLP_S0_DEASSERTED",
 	},
 	[X86_SLP_S3_DEASSERTED] = {
-		SLP_S3_SIGNAL_L,
-		POWER_SIGNAL_ACTIVE_HIGH,
-		"SLP_S3_DEASSERTED",
+		.gpio = SLP_S3_SIGNAL_L,
+		.flags = POWER_SIGNAL_ACTIVE_HIGH,
+		.name = "SLP_S3_DEASSERTED",
 	},
 	[X86_SLP_S4_DEASSERTED] = {
-		SLP_S4_SIGNAL_L,
-		POWER_SIGNAL_ACTIVE_HIGH,
-		"SLP_S4_DEASSERTED",
+		.gpio = SLP_S4_SIGNAL_L,
+		.flags = POWER_SIGNAL_ACTIVE_HIGH,
+		.name = "SLP_S4_DEASSERTED",
 	},
 	[X86_SLP_SUS_DEASSERTED] = {
-		GPIO_SLP_SUS_L,
-		POWER_SIGNAL_ACTIVE_HIGH,
-		"SLP_SUS_DEASSERTED",
+		.gpio = GPIO_SLP_SUS_L,
+		.flags = POWER_SIGNAL_ACTIVE_HIGH,
+		.name = "SLP_SUS_DEASSERTED",
 	},
 	[X86_RSMRST_L_PGOOD] = {
-		GPIO_PG_EC_RSMRST_ODL,
-		POWER_SIGNAL_ACTIVE_HIGH,
-		"RSMRST_L_PGOOD",
+		.gpio = GPIO_PG_EC_RSMRST_ODL,
+		.flags = POWER_SIGNAL_ACTIVE_HIGH,
+		.name = "RSMRST_L_PGOOD",
 	},
 	[X86_DSW_DPWROK] = {
-		GPIO_PG_EC_DSW_PWROK,
-		POWER_SIGNAL_ACTIVE_HIGH,
-		"DSW_DPWROK",
+		.gpio = GPIO_PG_EC_DSW_PWROK,
+		.flags = POWER_SIGNAL_ACTIVE_HIGH,
+		.name = "DSW_DPWROK",
+	},
+	[X86_ALL_SYS_PGOOD] = {
+		.gpio = GPIO_PG_EC_ALL_SYS_PWRGD,
+		.flags = POWER_SIGNAL_ACTIVE_HIGH,
+		.name = "ALL_SYS_PWRGD",
 	},
 };
 BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
@@ -117,10 +123,22 @@ enum power_state chipset_force_g3(void)
 	return POWER_G3;
 }
 
+/*
+ * Ice Lake and Tiger Lake permit PCH_PWROK and SYS_PWROK signals coming
+ * up in any order.  If the platform needs extra time for peripherals to come
+ * up, the board can override this function.
+ */
+__overridable void board_icl_tgl_all_sys_pwrgood(void)
+{
+
+}
+
 enum power_state power_handle_state(enum power_state state)
 {
 	int dswpwrok_in = gpio_get_level(GPIO_PG_EC_DSW_PWROK);
 	static int dswpwrok_out = -1;
+	int all_sys_pwrgd_in;
+	int all_sys_pwrgd_out;
 
 	/* Pass-through DSW_PWROK to ICL. */
 	if (dswpwrok_in != dswpwrok_out) {
@@ -189,6 +207,22 @@ enum power_state power_handle_state(enum power_state state)
 			return POWER_S5G3;
 		break;
 
+	case POWER_S0:
+		/*
+		 * Check value of PG_EC_ALL_SYS_PWRGD to see if PCH_SYS_PWROK
+		 * needs to be changed. If it's low->high transition, call board
+		 * specific handling if provided.
+		 */
+		all_sys_pwrgd_in = gpio_get_level(GPIO_PG_EC_ALL_SYS_PWRGD);
+		all_sys_pwrgd_out = gpio_get_level(GPIO_PCH_SYS_PWROK);
+
+		if (all_sys_pwrgd_in != all_sys_pwrgd_out) {
+			if (all_sys_pwrgd_in)
+				board_icl_tgl_all_sys_pwrgood();
+			gpio_set_level(GPIO_PCH_SYS_PWROK, all_sys_pwrgd_in);
+		}
+		break;
+
 	default:
 		break;
 	}
diff --git a/power/icelake.h b/power/icelake.h
index 5eeb3fb037..c051a2516a 100644
--- a/power/icelake.h
+++ b/power/icelake.h
@@ -34,6 +34,7 @@ enum power_signal {
 	X86_SLP_SUS_DEASSERTED,
 	X86_RSMRST_L_PGOOD,
 	X86_DSW_DPWROK,
+	X86_ALL_SYS_PGOOD,
 
 	/* Number of X86 signals */
 	POWER_SIGNAL_COUNT