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| author | Yilun Lin <yllin@chromium.org> | 2019-11-21 11:31:01 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-12-10 10:40:27 +0000 |
| commit | 313faa4a8c4d4349f6a8857ad7ceb2421a630dfa (patch) | |
| tree | ea3776477b20732e937fe8e82804121f5976551e /power | |
| parent | 73d1e0310aa3f13ea20bd3eb2a695ecfc26735d3 (diff) | |
| download | chrome-ec-313faa4a8c4d4349f6a8857ad7ceb2421a630dfa.tar.gz | |
power/mt8183: correct EN_PP1800_S5_L enable timing
The power rail should be turned on at G3S5 rather than S5S3,
and should be turned off after stay in G3 for 20ms.
TEST=Ensure the power rail is on/off at correct timing
BUG=b:144144075 b:145255107
BRANCH=none
Change-Id: Ie621ab1ac5332da6718201c44266f41aafcac296
Signed-off-by: Yilun Lin <yllin@chromium.org>
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1928413
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Diffstat (limited to 'power')
| -rw-r--r-- | power/mt8183.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/power/mt8183.c b/power/mt8183.c index 44012eeb6a..b7ef591932 100644 --- a/power/mt8183.c +++ b/power/mt8183.c @@ -20,6 +20,14 @@ #include "timer.h" #include "util.h" +/* + * mt8183 has two different power sequence versions + * 0: for normal tablet and detachable form factor + * 1: for boards have GPIO_EN_PP1800_S5_L + * CONFIG_CHIPSET_POWER_SEQ_VERSION defaults to 0, re-define the power seq + * version if needed. + */ + /* Console output macros */ #define CPUTS(outstr) cputs(CC_CHIPSET, outstr) #define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) @@ -57,6 +65,9 @@ */ #define PMIC_FORCE_RESET_TIME (10 * SECOND) +/* Time delay in G3 to deassert EN_PP1800_S5_L */ +#define EN_PP1800_S5_L_DEASSERT_TIME (20 * MSEC) + /* Data structure for a GPIO operation for power sequencing */ struct power_seq_op { /* enum gpio_signal in 8 bits */ @@ -230,6 +241,14 @@ static void power_seq_run(const struct power_seq_op *power_seq_ops, } } +#if CONFIG_CHIPSET_POWER_SEQ_VERSION == 1 +static void deassert_en_pp1800_s5_l(void) +{ + gpio_set_level(GPIO_EN_PP1800_S5_L, 1); +} +DECLARE_DEFERRED(deassert_en_pp1800_s5_l); +#endif + enum power_state power_handle_state(enum power_state state) { /* @@ -249,6 +268,12 @@ enum power_state power_handle_state(enum power_state state) switch (state) { case POWER_G3: + +#if CONFIG_CHIPSET_POWER_SEQ_VERSION == 1 + hook_call_deferred(&deassert_en_pp1800_s5_l_data, + EN_PP1800_S5_L_DEASSERT_TIME); +#endif + /* Go back to S5->G3 if the PMIC unexpectedly starts again. */ if (power_get_signals() & IN_PGOOD_PMIC) return POWER_S5G3; @@ -305,8 +330,14 @@ enum power_state power_handle_state(enum power_state state) case POWER_G3S5: forcing_shutdown = 0; +#if CONFIG_CHIPSET_POWER_SEQ_VERSION == 1 + hook_call_deferred(&deassert_en_pp1800_s5_l_data, -1); +#endif hook_call_deferred(&release_pmic_force_reset_data, -1); gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1); +#if CONFIG_CHIPSET_POWER_SEQ_VERSION == 1 + gpio_set_level(GPIO_EN_PP1800_S5_L, 0); +#endif /* Power up to next state */ return POWER_S5; |