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authorCaesar Wang <wxt@rock-chips.com>2017-09-08 10:22:58 +0800
committerchrome-bot <chrome-bot@chromium.org>2017-09-11 00:17:02 -0700
commit1d4c4530ac5bf2d2e4acb8950fba5dd8c5a12033 (patch)
treebb0eab75d82d9bac9d2570edf0caf2369343b587 /power
parent30287d4757f754d1feeebf45ea0af914eef60ead (diff)
downloadchrome-ec-1d4c4530ac5bf2d2e4acb8950fba5dd8c5a12033.tar.gz
power/rk3399: fixes pp900_s0 for power timing v2
Due to the power timing v2 had defined the S3_USB_WAKE, We need enable the PP900_S0 for power timing v2. Fixes: 098bde322f567 ("power/rk3399: Don't turn off the pp900_s0 during s3") CQ-DEPEND=CL:647053 BRANCH=none BUG=b:65270978 TEST=build and bring up on scarlet board Change-Id: If8aedc03d54e9f4953ab994da426272137440d36 Signed-off-by: Caesar Wang <wxt@rock-chips.com> Reviewed-on: https://chromium-review.googlesource.com/656858 Tested-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org>
Diffstat (limited to 'power')
-rw-r--r--power/rk3399.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/power/rk3399.c b/power/rk3399.c
index 9d90482ba4..c4db25e48c 100644
--- a/power/rk3399.c
+++ b/power/rk3399.c
@@ -87,6 +87,7 @@ BUILD_ASSERT(GPIO_COUNT < 256);
#if CONFIG_CHIPSET_POWER_SEQ_VERSION == 2
static const struct power_seq_op s5s3_power_seq[] = {
+ { GPIO_PP900_S0_EN, 1, 2 },
{ GPIO_PP900_S3_EN, 1, 2 },
{ GPIO_SYS_RST_L, 0, 0 },
{ GPIO_PP3300_S3_EN, 1, 2 },
@@ -207,6 +208,7 @@ static const struct power_seq_op s3s5_power_seq[] = {
{ GPIO_PP1800_S3_EN, 0, 2 },
{ GPIO_PP3300_S3_EN, 0, 2 },
{ GPIO_PP900_S3_EN, 0, 0 },
+ { GPIO_PP900_S0_EN, 0, 0 },
};
#elif CONFIG_CHIPSET_POWER_SEQ_VERSION == 3
static const struct power_seq_op s3s5_power_seq[] = {